From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 70256CA5FFF for ; Wed, 7 Oct 2026 06:13:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:CC:To:In-Reply-To:References :Message-ID:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=MXSM93xzZ4/WiERKjgUMclf77BQ7cyk6ElnHvqba5Eo=; b=M8CcotXmGt92TWouEc8VHtSaGI CZexSIDExqqINxXTW7PwARdfu8L/oUgPRoMH39k1pVJhYF/MFedWF5u2pqsw63lRL4kXui/2A8VXB mBg8CH+8ARuBjhw2iuoqYW0jbTx/2wZWC4vjeztLUl7vDkC7pSRlFyEEmh/Bk9UfnF/0wh4BDW8cd uJe/RY5SpuysUB0c0oFEw08T9lHm5m0uJV0Ra3ScPhekbhtCtv7lseYAXng/Cdy9o+/jS26Lb988S VgDYvn2nD4vjOPNP4Pg/PzS2OcWEXrdRBau2iDy0TWqLO2PqooFoo8V2gLph3c9D6S2SuKJDawaGO 7r2Nu2NQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1xEKuG-00000001kt2-3FFX; Wed, 07 Oct 2026 06:13:36 +0000 Received: from mail.aspeedtech.com ([211.20.114.72] helo=twmbx01.aspeedtech.com) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1xEKuC-00000001kor-2ZJ8 for linux-arm-kernel@lists.infradead.org; Wed, 07 Oct 2026 06:13:33 +0000 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 7 Oct 2026 14:13:19 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 7 Oct 2026 14:13:19 +0800 From: Ryan Chen Date: Wed, 7 Oct 2026 14:13:20 +0800 Subject: [PATCH v5 3/9] EDAC/aspeed: Clean up whitespace and include ordering MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20261007-edac-v5-3-5c31fc5df4cf@aspeedtech.com> References: <20261007-edac-v5-0-5c31fc5df4cf@aspeedtech.com> In-Reply-To: <20261007-edac-v5-0-5c31fc5df4cf@aspeedtech.com> To: Stefan Schaeckeler , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Borislav Petkov , Tony Luck CC: , , , , , Borislav Petkov , Ryan Chen X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1791353599; l=4651; i=ryan_chen@aspeedtech.com; s=20251126; h=from:subject:message-id; bh=RS3OpOKhMYVTDC20J31IVxG6aUxv8bXWHTMjE1xNY8A=; b=R7JXA6tTz/LSS6X/dzbCdqMKh2lLx3jkbFQ/biLLCZ5OKFWpv9U+tURAOtofdnkEUiBaJIBXo VMnyLzpFU4yD+p5gG0i1mEW3XnrWETAW8k9oJqQH6W1mg4wmFoMkvuX X-Developer-Key: i=ryan_chen@aspeedtech.com; a=ed25519; pk=Xe73xY6tcnkuRjjbVAB/oU30KdB3FvG4nuJuILj7ZVc= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261006_231332_668254_96B04274 X-CRM114-Status: GOOD ( 15.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The driver separates functions and definition groups with two blank lines where the kernel style uses one, its headers are not sorted, and it includes linux/stop_machine.h without using it. Collapse the double blank lines, drop the unused include and sort the rest alphabetically so the following changes start from a consistent style. Signed-off-by: Ryan Chen --- drivers/edac/aspeed_edac.c | 34 +++++++++------------------------- 1 file changed, 9 insertions(+), 25 deletions(-) diff --git a/drivers/edac/aspeed_edac.c b/drivers/edac/aspeed_edac.c index cb233a33d29a..bf1ff9a79d15 100644 --- a/drivers/edac/aspeed_edac.c +++ b/drivers/edac/aspeed_edac.c @@ -4,20 +4,17 @@ */ #include -#include #include #include -#include -#include #include +#include #include +#include #include #include "edac_module.h" - #define DRV_NAME "aspeed-edac" - #define ASPEED_MCR_PROT 0x00 /* protection key register */ #define ASPEED_MCR_CONF 0x04 /* configuration register */ #define ASPEED_MCR_INTR_CTRL 0x50 /* interrupt control/status register */ @@ -25,20 +22,17 @@ #define ASPEED_MCR_ADDR_REC 0x5c /* address of last recoverable error */ #define ASPEED_MCR_LAST ASPEED_MCR_ADDR_REC - -#define ASPEED_MCR_PROT_PASSWD 0xfc600309 -#define ASPEED_MCR_CONF_DRAM_TYPE BIT(4) -#define ASPEED_MCR_CONF_ECC BIT(7) -#define ASPEED_MCR_INTR_CTRL_CLEAR BIT(31) -#define ASPEED_MCR_INTR_CTRL_CNT_REC GENMASK(23, 16) -#define ASPEED_MCR_INTR_CTRL_CNT_UNREC GENMASK(15, 12) -#define ASPEED_MCR_INTR_CTRL_ENABLE (BIT(0) | BIT(1)) - +#define ASPEED_MCR_PROT_PASSWD 0xfc600309 +#define ASPEED_MCR_CONF_DRAM_TYPE BIT(4) +#define ASPEED_MCR_CONF_ECC BIT(7) +#define ASPEED_MCR_INTR_CTRL_CLEAR BIT(31) +#define ASPEED_MCR_INTR_CTRL_CNT_REC GENMASK(23, 16) +#define ASPEED_MCR_INTR_CTRL_CNT_UNREC GENMASK(15, 12) +#define ASPEED_MCR_INTR_CTRL_ENABLE (BIT(0) | BIT(1)) static struct regmap *aspeed_regmap; static int aspeed_irq; - static int regmap_reg_write(void *context, unsigned int reg, unsigned int val) { void __iomem *regs = (void __iomem *)context; @@ -54,7 +48,6 @@ static int regmap_reg_write(void *context, unsigned int reg, unsigned int val) return 0; } - static int regmap_reg_read(void *context, unsigned int reg, unsigned int *val) { void __iomem *regs = (void __iomem *)context; @@ -77,7 +70,6 @@ static bool regmap_is_volatile(struct device *dev, unsigned int reg) } } - static const struct regmap_config aspeed_regmap_config = { .reg_bits = 32, .val_bits = 32, @@ -89,7 +81,6 @@ static const struct regmap_config aspeed_regmap_config = { .fast_io = true, }; - static void count_rec(struct mem_ctl_info *mci, u8 rec_cnt, u32 rec_addr) { struct csrow_info *csrow = mci->csrows[0]; @@ -121,7 +112,6 @@ static void count_rec(struct mem_ctl_info *mci, u8 rec_cnt, u32 rec_addr) 0, 0, -1, "", ""); } - static void count_un_rec(struct mem_ctl_info *mci, u8 un_rec_cnt, u32 un_rec_addr) { @@ -154,7 +144,6 @@ static void count_un_rec(struct mem_ctl_info *mci, u8 un_rec_cnt, } } - static irqreturn_t mcr_isr(int irq, void *arg) { struct mem_ctl_info *mci = arg; @@ -201,7 +190,6 @@ static irqreturn_t mcr_isr(int irq, void *arg) return IRQ_HANDLED; } - static int config_irq(void *ctx, struct platform_device *pdev) { int irq; @@ -227,7 +215,6 @@ static int config_irq(void *ctx, struct platform_device *pdev) return 0; } - static int init_csrows(struct mem_ctl_info *mci) { struct csrow_info *csrow = mci->csrows[0]; @@ -276,7 +263,6 @@ static int init_csrows(struct mem_ctl_info *mci) return 0; } - static int aspeed_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -357,7 +343,6 @@ static int aspeed_probe(struct platform_device *pdev) return rc; } - static void aspeed_remove(struct platform_device *pdev) { struct mem_ctl_info *mci; @@ -374,7 +359,6 @@ static void aspeed_remove(struct platform_device *pdev) edac_mc_free(mci); } - static const struct of_device_id aspeed_of_match[] = { { .compatible = "aspeed,ast2400-sdram-edac" }, { .compatible = "aspeed,ast2500-sdram-edac" }, -- 2.34.1