From: <gabriel.fernandez@foss.st.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: <devicetree@vger.kernel.org>,
<linux-stm32@st-md-mailman.stormreply.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <gabriel.fernandez@foss.st.com>
Subject: [PATCH] arm64: dts: st: add optee interrupt on stm32mp211
Date: Thu, 8 Oct 2026 10:07:38 +0200 [thread overview]
Message-ID: <20261008080738.21355-1-gabriel.fernandez@foss.st.com> (raw)
From: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Describe the secure-world notification interrupt of the OP-TEE node
by adding interrupt-parent and interrupts properties.
OP-TEE uses the GIC PPI 15 (level low) as asynchronous notification
to the non-secure OS.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
---
arch/arm64/boot/dts/st/stm32mp211.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/st/stm32mp211.dtsi b/arch/arm64/boot/dts/st/stm32mp211.dtsi
index 4bfd58b26b51..11929bf00ecd 100644
--- a/arch/arm64/boot/dts/st/stm32mp211.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp211.dtsi
@@ -50,6 +50,8 @@ firmware {
optee {
compatible = "linaro,optee-tz";
method = "smc";
+ interrupt-parent = <&intc>;
+ interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
};
scmi: scmi {
base-commit: f831584128ac2a36fb4fa62fe106793d08c2dbf1
--
2.43.0
reply other threads:[~2026-10-08 8:08 UTC|newest]
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