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Tue, 13 Oct 2026 08:20:35 -0700 (PDT) Received: from buffalo-ssd.taila54753.ts.net ([240b:253:4760:f400:1ebf:ceff:fe7f:5e0b]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cd3da04596dsm5759888a12.29.2026.10.13.08.20.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Oct 2026 08:20:35 -0700 (PDT) From: Akari Tsuyukusa To: Brian Masney , Jerome Brunet , Matthias Brugger , AngeloGioacchino Del Regno , Yassine Oudjana , Richard Cochran Cc: Chen-Yu Tsai , Bartosz Golaszewski , Kees Cook , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig=20=28The=20Capable=20Hub=29?= , Danilo Krummrich , Nicolas Frattaroli , Bjorn Helgaas , Takashi Sakamoto , Haotian Zhang , Miles Chen , Sam Shih , Daniel Golle , Chun-Jie Chen , Laura Nao , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , linux-clk@vger.kernel.org (open list:COMMON CLK FRAMEWORK), linux-kernel@vger.kernel.org (open list), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Mediatek SoC support), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support), Akari Tsuyukusa Subject: [PATCH v2 27/35] clk: mediatek: mt8167-apmixedsys: Switch to common probe/remove helpers Date: Wed, 14 Oct 2026 00:17:26 +0900 Message-ID: <20261013151734.3177690-28-akkun11.open@gmail.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261013151734.3177690-1-akkun11.open@gmail.com> References: <20261013151734.3177690-1-akkun11.open@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261013_162038_206326_446B5717 X-CRM114-Status: GOOD ( 18.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The MT8167 apmixedsys driver used a custom probe to register PLLs and divider clocks but had no remove callback. With PLL registration now supported alongside the existing divider-clock support, the driver can use mtk_clk_simple_probe() and mtk_clk_simple_remove(). Switch to module_platform_driver() to support module unloading and ensure that registered clocks are unregistered on removal. Signed-off-by: Akari Tsuyukusa --- Changes in v2: - Improvement of commit messages - Add missing `.data = &apmixed_desc` entry to the OF match table. --- drivers/clk/mediatek/clk-mt8167-apmixedsys.c | 58 ++++++-------------- 1 file changed, 16 insertions(+), 42 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8167-apmixedsys.c b/drivers/clk/mediatek/clk-mt8167-apmixedsys.c index fb6c21bbeef8..aba33e5aafe6 100644 --- a/drivers/clk/mediatek/clk-mt8167-apmixedsys.c +++ b/drivers/clk/mediatek/clk-mt8167-apmixedsys.c @@ -89,59 +89,33 @@ static const struct mtk_clk_divider adj_divs[] = { 0x1c4, 24, 3, CLK_DIVIDER_POWER_OF_TWO), }; -static int clk_mt8167_apmixed_probe(struct platform_device *pdev) -{ - void __iomem *base; - struct clk_hw_onecell_data *clk_data; - struct device_node *node = pdev->dev.of_node; - struct device *dev = &pdev->dev; - int ret; - - base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(base)) - return PTR_ERR(base); - - clk_data = mtk_devm_alloc_clk_data(dev, MT8167_CLK_APMIXED_NR_CLK); - if (!clk_data) - return -ENOMEM; - - ret = mtk_clk_register_plls(dev, plls, ARRAY_SIZE(plls), clk_data); - if (ret) - return ret; - - ret = mtk_clk_register_dividers(dev, adj_divs, ARRAY_SIZE(adj_divs), base, - &mt8167_apmixed_clk_lock, clk_data); - if (ret) - goto unregister_plls; - - ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - if (ret) - goto unregister_dividers; - - return 0; - -unregister_dividers: - mtk_clk_unregister_dividers(adj_divs, ARRAY_SIZE(adj_divs), clk_data); -unregister_plls: - mtk_clk_unregister_plls(plls, ARRAY_SIZE(plls), clk_data); - - return ret; -} +static const struct mtk_clk_desc apmixed_desc = { + .plls = plls, + .num_plls = ARRAY_SIZE(plls), + .divider_clks = adj_divs, + .num_divider_clks = ARRAY_SIZE(adj_divs), + .clk_lock = &mt8167_apmixed_clk_lock, +}; static const struct of_device_id of_match_clk_mt8167_apmixed[] = { - { .compatible = "mediatek,mt8167-apmixedsys" }, - { /* sentinel */ } + { + .compatible = "mediatek,mt8167-apmixedsys", + .data = &apmixed_desc, + }, { + /* sentinel */ + }, }; MODULE_DEVICE_TABLE(of, of_match_clk_mt8167_apmixed); static struct platform_driver clk_mt8167_apmixed_drv = { - .probe = clk_mt8167_apmixed_probe, + .probe = mtk_clk_simple_probe, + .remove = mtk_clk_simple_remove, .driver = { .name = "clk-mt8167-apmixed", .of_match_table = of_match_clk_mt8167_apmixed, }, }; -builtin_platform_driver(clk_mt8167_apmixed_drv) +module_platform_driver(clk_mt8167_apmixed_drv) MODULE_DESCRIPTION("MediaTek MT8167 apmixedsys clocks driver"); MODULE_LICENSE("GPL"); -- 2.56.0