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Wed, 21 Oct 2026 21:00:25 +0000 (UTC) X-Farcaster-Flow-ID: d8ae2856-7a85-415a-be54-ff72d9aa0b5b Received: from EX19D001UWA001.ant.amazon.com (10.13.138.214) by EX19MTAUWC002.ant.amazon.com (10.250.64.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.2562.49; Wed, 21 Oct 2026 21:00:25 +0000 Received: from dev-dsk-patrzhan-2a-52a3f46b.us-west-2.amazon.com (172.22.91.11) by EX19D001UWA001.ant.amazon.com (10.13.138.214) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.2562.53; Wed, 21 Oct 2026 21:00:24 +0000 From: Patrick Zhang To: Marc Kleine-Budde , Vincent Mailhol , CC: Pavel Pisa , Ondrej Ille , Harini T , Michal Simek , , , Subject: [PATCH 2/3] can: xilinx_can: enable NAPI before starting the controller Date: Wed, 21 Oct 2026 20:59:23 +0000 Message-ID: <20261021205924.2538511-3-patrzhan@amazon.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20261021205924.2538511-1-patrzhan@amazon.com> References: <20261021205924.2538511-1-patrzhan@amazon.com> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: EX19D031UWA003.ant.amazon.com (10.13.139.47) To EX19D001UWA001.ant.amazon.com (10.13.138.214) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261021_140028_274063_B8D049EB X-CRM114-Status: GOOD ( 14.23 ) X-Spam-Score: -11.9 (-----------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-19.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 xcan_open() calls xcan_chip_start(), which writes XCAN_IER_OFFSET to unmask the RX interrupts and then sets XCAN_SRR_CEN_MASK to enable the controller, and only then calls napi_enable(). A frame that arrives in that window raises the RX interrupt. xcan_interrupt() clears the RX bits in XCAN_IER_OFFSET and calls napi_schedule(). NAPI is still disabled, so napi_schedule_prep() finds NAPI_STATE_SCHED set and the schedule is dropped. Only xcan_rx_poll() unmasks RX again, and it never runs. The interface receives nothing until the next close. Transmit still works and no rx_errors subcounter moves, so the stall is silent. Every re-open (ip link down/up, a driver rebind) runs the same race again. The window is only the tail of xcan_chip_start(), so the failure is rare. Adding an mdelay(50) at the end of xcan_chip_start() makes it reproducible with continuous traffic from another node and a single "ip link set down/up" on the test device. Enable NAPI before the controller starts, so that an early RX interrupt can schedule the poll. NAPI can be enabled while the controller is in reset, because nothing schedules it until an interrupt arrives. If xcan_chip_start() fails, disable NAPI again. Otherwise the next open would call napi_enable() on an already enabled instance and trip the BUG_ON() in napi_enable_locked(). This is the same race as in ctucanfd, fixed by the previous patch. Tested on a Versal board. Fixes: b1201e44f50b ("can: xilinx CAN controller support") Cc: stable@vger.kernel.org Assisted-by: LLM Signed-off-by: Patrick Zhang --- drivers/net/can/xilinx_can.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c index 43d7f2282..5c2412bf9 100644 --- a/drivers/net/can/xilinx_can.c +++ b/drivers/net/can/xilinx_can.c @@ -1570,18 +1570,22 @@ static int xcan_open(struct net_device *ndev) if (ret) goto err_irq; + /* Keep before xcan_chip_start(): the ISR masks RX interrupts and only + * the poll unmasks them. + */ + napi_enable(&priv->napi); ret = xcan_chip_start(ndev); if (ret < 0) { netdev_err(ndev, "xcan_chip_start failed!\n"); goto err_candev; } - napi_enable(&priv->napi); netif_start_queue(ndev); return 0; err_candev: + napi_disable(&priv->napi); close_candev(ndev); err_irq: free_irq(ndev->irq, ndev); -- 2.50.1