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[174.29.1.49]) by smtp.gmail.com with ESMTPSA id 5614622812f47-55be9880a99sm909562b6e.14.2026.10.23.00.33.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Oct 2026 00:33:51 -0700 (PDT) From: James Hilliard Subject: [PATCH 0/3] serial: 8250_dw: describe the Allwinner H616 UART configuration Date: Fri, 23 Oct 2026 01:33:48 -0600 Message-Id: <20261023-submit-h616-uart-fifo-v1-v1-0-e4a3bae2eba8@gmail.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAAAAAAAC/yXMQQqEMAxA0atI1gbagl14FXFRY6IZGJW2iiDe3 TqzfIv/L0gclRO01QWRD026LgW2roDmsEyMOhaDM85b4xymffhqxtlbj3uIGUVlxcMiNUFoFG5 oMFDyLbLo+Vt3/d+l/TDl9wf3/QBuxM/gfAAAAA== X-Change-ID: 20261022-submit-h616-uart-fifo-v1-c5afcdfe5cb0 To: Greg Kroah-Hartman , Jiri Slaby , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, James Hilliard X-Mailer: b4 0.15.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261023_003354_864961_A12AEBB7 X-CRM114-Status: GOOD ( 11.26 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 H616 has 256-byte UART FIFOs, but lacks the DesignWare component parameter register used to discover their capacity. Its debug-divisor and RS485 registers also overlap offsets used to probe optional DesignWare features. Add an H616 compatible and select a fixed port configuration with the documented FIFO capacity and receive trigger levels. Preserve the BUSY-safe integer divisor path and keep the UART gate enabled during termios changes. Attach the existing 8250 DMA path using single-byte peripheral bursts, with channel acquisition and PIO fallback handled by the normal startup path. The patches add the binding, driver configuration and SoC DTS compatible in that order. Based on tty-next at 1184f87e2790. Assisted-by: Codex:gpt-6-astra Signed-off-by: James Hilliard --- James Hilliard (3): dt-bindings: serial: snps-dw-apb-uart: add Allwinner H616 serial: 8250_dw: configure the Allwinner H616 UART arm64: dts: allwinner: h616: identify the UART integration .../bindings/serial/snps-dw-apb-uart.yaml | 1 + arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 12 +++--- drivers/tty/serial/8250/8250.h | 1 + drivers/tty/serial/8250/8250_dw.c | 45 ++++++++++++++++++---- drivers/tty/serial/8250/8250_port.c | 8 ++++ 5 files changed, 54 insertions(+), 13 deletions(-) --- base-commit: 1184f87e2790e8af9be3116f608d2e86b4792d7d change-id: 20261022-submit-h616-uart-fifo-v1-c5afcdfe5cb0 Best regards, -- James Hilliard