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Fri, 23 Oct 2026 09:30:19 +0000 Received: from ubuntu (unknown [172.20.64.99]) by smtprelay.cixcomputing.com (Postfix) with ESMTPSA id CD5D440920E2; Fri, 23 Oct 2026 17:30:18 +0800 (CST) From: Jelly Jia To: vkoul@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.murphy@arm.com Cc: devicetree@vger.kernel.org, Frank.Li@kernel.org, cix-kernel-upstream@cixtech.com, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jelly.Jia@cixtech.com Subject: [PATCH v4 3/5] dt-bindings: dma: arm,dma-350: Document optional clocks and resets Date: Fri, 23 Oct 2026 17:30:15 +0800 Message-ID: <20261023093017.3248454-4-Jelly.Jia@cixtech.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261023093017.3248454-1-Jelly.Jia@cixtech.com> References: <20261023093017.3248454-1-Jelly.Jia@cixtech.com> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SG1PEPF000082E1:EE_|TYUPR06MB6078:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: dddd38c7-a459-47a5-1c23-08df30e84169 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|7416014|23010399003|376014|1800799024|6133799003|22082099003|10067099003|261021123027099003|261022105027099003|18002099003|56012099006|261021121427099003|261009223027099003; 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X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-17.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Some integrations gate the DMA-350 controller with a bus clock or hold it in reset. Sky1 provides a clock for both its FCH and AUDSS instances, and a reset for the AUDSS instance. Document these standard resources on the DMA controller node. Neither property is required, so existing device trees are unchanged. Signed-off-by: Jelly Jia --- .../devicetree/bindings/dma/arm,dma-350.yaml | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml index 429f682f15d8..43279878207c 100644 --- a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml +++ b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml @@ -9,9 +9,6 @@ title: Arm CoreLink DMA-350 Controller maintainers: - Robin Murphy -allOf: - - $ref: dma-controller.yaml# - properties: compatible: const: arm,dma-350 @@ -36,9 +33,22 @@ properties: const: 1 description: The cell is the trigger input number + clocks: + maxItems: 1 + description: + Optional bus clock, where the integration gates the controller clock. + + resets: + maxItems: 1 + description: + Optional reset line, where the integration exposes one. + required: - compatible - reg - interrupts +allOf: + - $ref: dma-controller.yaml# + unevaluatedProperties: false -- 2.54.0