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Fri, 23 Oct 2026 09:30:20 +0000 Received: from ubuntu (unknown [172.20.64.99]) by smtprelay.cixcomputing.com (Postfix) with ESMTPSA id 6D5C540920F3; Fri, 23 Oct 2026 17:30:19 +0800 (CST) From: Jelly Jia To: vkoul@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.murphy@arm.com Cc: devicetree@vger.kernel.org, Frank.Li@kernel.org, cix-kernel-upstream@cixtech.com, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jelly.Jia@cixtech.com Subject: [PATCH v4 5/5] arm64: dts: cix: Describe the Sky1 FCH DMA-350 integration Date: Fri, 23 Oct 2026 17:30:17 +0800 Message-ID: <20261023093017.3248454-6-Jelly.Jia@cixtech.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261023093017.3248454-1-Jelly.Jia@cixtech.com> References: <20261023093017.3248454-1-Jelly.Jia@cixtech.com> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SG1PEPF000082E7:EE_|OSNPR06MB8369:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: dbb1a260-3881-458d-66c2-08df30e8420d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|23010399003|82310400026|36860700016|7416014|376014|18002099003|22082099003|261022105027099003|261009223027099003|261021123027099003|10067099003|261021121427099003|56012099006; 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X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-17.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 The FCH DMA-350 master accesses the CPU physical peripheral window at 0x040b0000 through DMA address 0x040a0000. Describe this fixed translation and the reachable DRAM windows with dma-ranges on the parent simple-bus. The CPU register address view remains unchanged. Keep the existing controller register region and eight interrupt specifiers, and add its SCMI bus clock. Signed-off-by: Jelly Jia --- arch/arm64/boot/dts/cix/sky1.dtsi | 36 ++++++++++++++++++++----------- 1 file changed, 24 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi index 0a820f45feb9..cd498ee7e9a7 100644 --- a/arch/arm64/boot/dts/cix/sky1.dtsi +++ b/arch/arm64/boot/dts/cix/sky1.dtsi @@ -518,18 +518,30 @@ iomuxc: pinctrl@4170000 { reg = <0x0 0x04170000 0x0 0x1000>; }; - fch_dmac: dma-controller@4190000 { - compatible = "arm,dma-350"; - reg = <0x0 0x4190000 0x0 0x10000>; - interrupts = , - , - , - , - , - , - , - ; - #dma-cells = <1>; + fch-dma-bus { + compatible = "simple-bus"; + ranges; + #address-cells = <2>; + dma-ranges = <0x0 0x040a0000 0x0 0x040b0000 0x0 0x00040000>, + <0x0 0x80000000 0x0 0x80000000 0x8 0x00000000>, + <0x80 0x00000000 0x80 0x00000000 0x80 0x00000000>; + #size-cells = <2>; + + fch_dmac: dma-controller@4190000 { + compatible = "arm,dma-350"; + reg = <0x0 0x04190000 0x0 0x10000>; + clocks = <&scmi_clk CLK_TREE_FCH_DMA_ACLK>; + #dma-cells = <1>; + interrupts = + , + , + , + , + , + , + , + ; + }; }; mbox_ap2se: mailbox@5060000 { -- 2.54.0