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Fri, 23 Oct 2026 09:30:48 +0000 Received: from ubuntu (unknown [172.20.64.99]) by smtprelay.cixcomputing.com (Postfix) with ESMTPSA id 5212D40920F2; Fri, 23 Oct 2026 17:30:47 +0800 (CST) From: Jelly Jia To: vkoul@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.murphy@arm.com, sboyd@kernel.org, bmasney+clk@redhat.com, jbrunet+clk@baylibre.com Cc: devicetree@vger.kernel.org, Frank.Li@kernel.org, cix-kernel-upstream@cixtech.com, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jelly.Jia@cixtech.com, linux-clk@vger.kernel.org, joakim.zhang@cixtech.com Subject: [PATCH v1 4/5] dmaengine: arm-dma350: Honour dma-channel-mask Date: Fri, 23 Oct 2026 17:30:44 +0800 Message-ID: <20261023093045.3248630-5-Jelly.Jia@cixtech.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261023093045.3248630-1-Jelly.Jia@cixtech.com> References: <20261023093045.3248630-1-Jelly.Jia@cixtech.com> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TY2PEPF0000AB88:EE_|KUXPR06MB9107:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: c98be298-2dec-4125-93af-08df30e852b5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|7416014|376014|1800799024|36860700016|23010399003|6133799003|10067099003|22082099003|261021123027099003|261022105027099003|18002099003|261021121427099003|261009223027099003|56012099006; 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Read the optional dma-channel-mask property and register only the channels whose bits are set. If the property is absent, preserve the existing behaviour and expose every hardware channel. Skip masked channels before accessing their channel registers or initializing their interrupts and virt-dma state. This avoids clearing or configuring channels reserved for firmware or another processor. Signed-off-by: Jelly Jia --- drivers/dma/arm-dma350.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/dma/arm-dma350.c b/drivers/dma/arm-dma350.c index 9cb5b2f03113..32ec6f061ee9 100644 --- a/drivers/dma/arm-dma350.c +++ b/drivers/dma/arm-dma350.c @@ -1205,9 +1205,10 @@ static int d350_probe(struct platform_device *pdev) struct clk *clk; struct d350 *dmac; void __iomem *base; + u32 chan_mask = U32_MAX; u32 reg; int ret, nchan, dw, aw, r, p; - bool coherent, memset; + bool coherent, has_chan_mask, memset; clk = devm_clk_get_optional_enabled(dev, NULL); if (IS_ERR(clk)) @@ -1285,6 +1286,19 @@ static int d350_probe(struct platform_device *pdev) dmac->dma.device_config = d350_config; INIT_LIST_HEAD(&dmac->dma.channels); + /* + * dma-channel-mask is optional. Firmware-reserved channels stay + * clear; if the property is absent, Linux may use every channel. + */ + has_chan_mask = device_property_present(dev, "dma-channel-mask"); + if (has_chan_mask) { + ret = device_property_read_u32(dev, "dma-channel-mask", + &chan_mask); + if (ret) + return dev_err_probe(dev, ret, + "failed to read dma-channel-mask\n"); + } + reg = readl_relaxed(base + DMANSECCTRL + NSEC_CTRL); writel_relaxed(reg | INTREN_ANYCHINTR_EN, base + DMANSECCTRL + NSEC_CTRL); @@ -1294,6 +1308,10 @@ static int d350_probe(struct platform_device *pdev) for (int i = 0; i < nchan; i++) { struct d350_chan *dch = &dmac->channels[i]; + if (has_chan_mask && + (i >= 32 || !(chan_mask & BIT(i)))) + continue; + dch->base = base + DMACH(i); writel_relaxed(CH_CMD_CLEAR, dch->base + CH_CMD); -- 2.54.0