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[3.110.210.194]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-4a92167b03csm322536fac.2.2026.10.30.09.20.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Oct 2026 09:20:59 -0700 (PDT) From: Samarth Narang To: Miquel Raynal , Vignesh Raghavendra , Han Xu , Manivannan Sadhasivam , Maxime Coquelin , Alexandre Torgue Cc: Richard Weinberger , linux-mtd@lists.infradead.org, imx@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Samarth Narang Subject: [PATCH v2 2/6] mtd: nand: qpic_common: terminate DMA channels on transfer timeout Date: Fri, 30 Oct 2026 16:20:37 +0000 Message-Id: <20261030162041.2998170-3-samarth.colleges@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20261030162041.2998170-1-samarth.colleges@gmail.com> References: <20261030162041.2998170-1-samarth.colleges@gmail.com> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261030_092106_175767_FF7DF0B1 X-CRM114-Status: GOOD ( 14.44 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 When DMA completion times out in qcom_submit_descs(), the driver unmaps the descriptors' scatterlists without stopping the BAM DMA channels. Since the issued descriptors may still be active, the RX and TX channels can continue accessing the caller's buffer after it has been unmapped and returned to the NAND core. The ADM path has a similar issue when dma_sync_wait() times out. Terminate the affected channels with dmaengine_terminate_sync() before unmapping, ensuring that outstanding DMA transfers are stopped before their mappings are released. On BAM, termination resets the pipe and discards pending descriptors. Fixes: 381dd24539a8 ("mtd: nand: qcom: add BAM DMA descriptor handling") Fixes: c76b78d8ec05 ("mtd: nand: Qualcomm NAND controller driver") Assisted-by: LLM Signed-off-by: Samarth Narang --- drivers/mtd/nand/qpic_common.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/qpic_common.c b/drivers/mtd/nand/qpic_common.c index 4f3e4dd76..250154a08 100644 --- a/drivers/mtd/nand/qpic_common.c +++ b/drivers/mtd/nand/qpic_common.c @@ -592,11 +592,18 @@ int qcom_submit_descs(struct qcom_nand_controller *nandc) dma_async_issue_pending(nandc->cmd_chan); if (!wait_for_completion_timeout(&bam_txn->txn_done, - QPIC_NAND_COMPLETION_TIMEOUT)) + QPIC_NAND_COMPLETION_TIMEOUT)) { + /* Retire every issued pipe before unmapping its buffers. */ + dmaengine_terminate_sync(nandc->tx_chan); + dmaengine_terminate_sync(nandc->rx_chan); + dmaengine_terminate_sync(nandc->cmd_chan); ret = -ETIMEDOUT; + } } else { - if (dma_sync_wait(nandc->chan, cookie) != DMA_COMPLETE) + if (dma_sync_wait(nandc->chan, cookie) != DMA_COMPLETE) { + dmaengine_terminate_sync(nandc->chan); ret = -ETIMEDOUT; + } } err_unmap_free_desc: -- 2.34.1