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[9.244.8.156]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-4a92167984dsm1438390fac.1.2026.10.30.19.26.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Oct 2026 19:26:47 -0700 (PDT) From: Enzo Adriano To: Linus Walleij , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Andre Przywara , Pablo Mazzini , Vinicius Pedrosa Subject: [PATCH] pinctrl: sunxi: preserve A733 firmware voltage modes Date: Fri, 30 Oct 2026 22:26:45 -0400 Message-ID: <20261031020640-263f7b05-a7s-pinctrl@gmail.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261030_192648_431945_4FC765D7 X-CRM114-Status: GOOD ( 13.91 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,T_SPF_TEMPERROR autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 The A733 voltage-selection fields are two bits wide. The main controller uses a separate VCCIO field at bits 25:24 for PB; the older one-bit handler instead writes bit1 when PB is requested. A733 R-PIO also differs from A523: its documented table has SEL at 0x340 and VAL at 0x348, without the A523 control register at 0x344. Stop using those incompatible layouts on A733. Select BIAS_VOLTAGE_NONE for both controllers and give A733-R its own descriptor, retaining the A523-R descriptor and behavior. This preserves firmware voltage modes when explicit bank supplies are requested. It does not implement dynamic voltage switching or choose among conflicting manual AUTO descriptions. The public October 14 discussion recommends this conservative treatment: https://lore.kernel.org/all/20261014183516.172060-1-vinicius.eduardo.pedrosa@gmail.com/ AI assistance: Codex:gpt-6-astra. Suggested-by: Vinicius Pedrosa Assisted-by: LLM Signed-off-by: Enzo Adriano --- This implements Vinicius Pedrosa's recommended conservative approach for both A733 controllers, including a separate A733-R descriptor: https://lore.kernel.org/r/20261014183516.172060-1-vinicius.eduardo.pedrosa@gmail.com It avoids the disputed AUTO encoding and does not replace that public discussion with a claim that voltage switching is solved. The standalone base is official commit d89e1d186ec9271bf78e62771779e9fc03bf0fc3 plus Pablo Mazzini's three IRQ-bank v3 patches: https://lore.kernel.org/r/20261025142412.112216-1-pmazzini@gmail.com The IRQ changes are prerequisites, not part of this patch's diff. With the separate A7S DT v2 and its PMIC/bank supplies enabled, two final-candidate RAM boots preserved the main and R SEL controls and PF supply selector across kernel handoff. UART0, R-I2C0/PMIC and read-only MMC0 traffic worked, including after unused-regulator cleanup. The firmware's PF high-voltage path was verified before each boot. A regression harness exercised 60 A733 no-read/no-write cases, the old main-handler wrong-bit counterexample, and the unchanged A523-R handler behavior. Both changed objects built with W=1. A523-R hardware was not tested; its behavior is retained and checked by the regression harness. No analog voltage, UHS or dynamic voltage-switching claim is made. The read-only VAL observations are not precision measurements. drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c | 20 +++++++++++++++---- drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c | 3 ++- 2 files changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c index cffc1e53eef141cf5f00ec37435af0f8f6a94b45..1cfd8118435066b403f8b9b0b3725e849643ff84 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c @@ -30,17 +30,29 @@ static struct sunxi_pinctrl_desc a523_r_pinctrl_data = { .pin_base = PL_BASE, }; +static struct sunxi_pinctrl_desc a733_r_pinctrl_data = { + .irq_banks = ARRAY_SIZE(a523_r_irq_bank_map), + .irq_bank_map = a523_r_irq_bank_map, + /* A733 has two-bit voltage modes, without the A523 control register. */ + .io_bias_cfg_variant = BIAS_VOLTAGE_NONE, + .pin_base = PL_BASE, +}; + static int a523_r_pinctrl_probe(struct platform_device *pdev) { + struct sunxi_pinctrl_desc *desc; + + desc = (struct sunxi_pinctrl_desc *)of_device_get_match_data(&pdev->dev); return sunxi_pinctrl_dt_table_init(pdev, a523_r_nr_bank_pins, - a523_r_irq_bank_muxes, - &a523_r_pinctrl_data, + a523_r_irq_bank_muxes, desc, SUNXI_PINCTRL_NCAT2_REG_LAYOUT); } static const struct of_device_id a523_r_pinctrl_match[] = { - { .compatible = "allwinner,sun55i-a523-r-pinctrl", }, - { .compatible = "allwinner,sun60i-a733-r-pinctrl", }, + { .compatible = "allwinner,sun55i-a523-r-pinctrl", + .data = &a523_r_pinctrl_data }, + { .compatible = "allwinner,sun60i-a733-r-pinctrl", + .data = &a733_r_pinctrl_data }, {} }; diff --git a/drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c b/drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c index 3ebe926a1bc6ba75716f13804db718174b4be229..e2cd7a431af7bc5ec47e8f5719ab11c22b461658 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c +++ b/drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c @@ -27,7 +27,8 @@ static struct sunxi_pinctrl_desc a733_pinctrl_data = { .irq_banks = ARRAY_SIZE(a733_irq_bank_map), .irq_bank_map = a733_irq_bank_map, .irq_read_needs_mux = true, - .io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_SEL, + /* Preserve the firmware-configured two-bit voltage modes. */ + .io_bias_cfg_variant = BIAS_VOLTAGE_NONE, }; static int a733_pinctrl_probe(struct platform_device *pdev) base-commit: d89e1d186ec9271bf78e62771779e9fc03bf0fc3 prerequisite-patch-id: 85db03df3394cdcb2780a0da122a74b2c1fe220d prerequisite-patch-id: a3e883da50bf03e8f522444def66fec7f996ffbe prerequisite-patch-id: c6889699a6dc13c336ce4cf4659e21b551e9a9fc -- 2.53.0