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Sat, 31 Oct 2026 03:26:49 -0700 (PDT) Received: from Ansuel-XPS24 ([2a0d:3344:54ec:1210:f1b7:9ece:c6e2:5df8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-4abebe33e79sm90903535e9.2.2026.10.31.03.26.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 31 Oct 2026 03:26:48 -0700 (PDT) From: Christian Marangi To: Stefan Roese , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Cc: Christian Marangi Subject: [PATCH v2 2/2] i2c: mt7621: limit SCL_STRETCH only to Mediatek SoC Date: Sat, 31 Oct 2026 11:26:40 +0100 Message-ID: <20261031102641.12649-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261031102641.12649-1-ansuelsmth@gmail.com> References: <20261031102641.12649-1-ansuelsmth@gmail.com> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261031_032651_661057_B77BA932 X-CRM114-Status: GOOD ( 17.40 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 The same I2C driver is also used for Airoha SoC with the only difference that the i2c_reset should not enable SCL_STRETCH for Airoha SoC. Introduce a new compatible for Airoha and limit the SCL_STRETCH only to Mediatek SoC. Signed-off-by: Christian Marangi --- Changes v2: - Use match data for storage drivers/i2c/busses/i2c-mt7621.c | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-mt7621.c b/drivers/i2c/busses/i2c-mt7621.c index 0a288c998419..fa1f32d4f046 100644 --- a/drivers/i2c/busses/i2c-mt7621.c +++ b/drivers/i2c/busses/i2c-mt7621.c @@ -57,9 +57,14 @@ /* timeout waiting for I2C devices to respond */ #define TIMEOUT_MS 1000 +struct mtk_i2c_data { + bool have_scl_stretch; +}; + struct mtk_i2c { void __iomem *base; struct device *dev; + const struct mtk_i2c_data *data; struct i2c_adapter adap; u32 bus_freq; u32 clk_div; @@ -83,6 +88,7 @@ static int mtk_i2c_wait_idle(struct mtk_i2c *i2c) static void mtk_i2c_reset(struct mtk_i2c *i2c) { + u32 reg; int ret; ret = device_reset(i2c->adap.dev.parent); @@ -93,8 +99,11 @@ static void mtk_i2c_reset(struct mtk_i2c *i2c) * Don't set SM0CTL0_ODRAIN as its bit meaning is inverted. To * configure open-drain mode, this bit needs to be cleared. */ - iowrite32(((i2c->clk_div << 16) & SM0CTL0_CLK_DIV_MASK) | SM0CTL0_EN | - SM0CTL0_SCL_STRETCH, i2c->base + REG_SM0CTL0_REG); + reg = ((i2c->clk_div << 16) & SM0CTL0_CLK_DIV_MASK) | SM0CTL0_EN; + if (i2c->data->have_scl_stretch) + reg |= SM0CTL0_SCL_STRETCH; + + iowrite32(reg, i2c->base + REG_SM0CTL0_REG); iowrite32(0, i2c->base + REG_SM0CFG2_REG); } @@ -247,8 +256,17 @@ static const struct i2c_algorithm mtk_i2c_algo = { .functionality = mtk_i2c_func, }; +static const struct mtk_i2c_data i2c_mt7621_data = { + .have_scl_stretch = true, +}; + +static const struct mtk_i2c_data i2c_an7581_data = { + .have_scl_stretch = false, +}; + static const struct of_device_id i2c_mtk_dt_ids[] = { - { .compatible = "mediatek,mt7621-i2c" }, + { .compatible = "mediatek,mt7621-i2c", .data = &i2c_mt7621_data }, + { .compatible = "airoha,an7581-i2c", .data = &i2c_an7581_data }, { /* sentinel */ } }; @@ -286,6 +304,7 @@ static int mtk_i2c_probe(struct platform_device *pdev) } i2c->dev = &pdev->dev; + i2c->data = device_get_match_data(&pdev->dev); if (of_property_read_u32(pdev->dev.of_node, "clock-frequency", &i2c->bus_freq)) -- 2.55.0