From: Peter Robinson <pbrobinson@gmail.com>
To: Florian Fainelli <florian.fainelli@broadcom.com>,
Dave Stevenson <dave.stevenson@raspberrypi.com>,
Ray Jui <rjui@broadcom.com>,
Scott Branden <sbranden@broadcom.com>,
Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>,
dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
linux-rpi-kernel@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
bcm-kernel-feedback-list@broadcom.com
Cc: Peter Robinson <pbrobinson@gmail.com>
Subject: [PATCH 8/9] arm64: dts: broadcom: bcm2712: Add DMA controllers
Date: Mon, 2 Nov 2026 09:06:58 +0000 [thread overview]
Message-ID: <20261102090713.896324-9-pbrobinson@gmail.com> (raw)
In-Reply-To: <20261102090713.896324-1-pbrobinson@gmail.com>
Describe the BCM2712 legacy DMA channels (0-5) and the DMA4
channels (6-11) as separate nodes, both disabled for boards
to enable. Node labels follow the Raspberry Pi downstream tree.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 40 +++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
index edae2f3584a8d..be4e94c9e7695 100644
--- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
@@ -546,6 +546,46 @@ axi: axi {
<0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>,
<0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>;
+ dma32: dma-controller@1000010000 {
+ compatible = "brcm,bcm2712-dma";
+ reg = <0x10 0x00010000 0x0 0x600>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dma0",
+ "dma1",
+ "dma2",
+ "dma3",
+ "dma4",
+ "dma5";
+ #dma-cells = <1>;
+ brcm,dma-channel-mask = <0x0035>;
+ status = "disabled";
+ };
+
+ dma40: dma-controller@1000010600 {
+ compatible = "brcm,bcm2712-dma";
+ reg = <0x10 0x00010600 0x0 0x600>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, /* dma4 6 */
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, /* dma4 7 */
+ <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, /* dma4 8 */
+ <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, /* dma4 9 */
+ <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, /* dma4 10 */
+ <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; /* dma4 11 */
+ interrupt-names = "dma6",
+ "dma7",
+ "dma8",
+ "dma9",
+ "dma10",
+ "dma11";
+ #dma-cells = <1>;
+ brcm,dma-channel-mask = <0x0fc0>;
+ status = "disabled";
+ };
+
pcie0: pcie@1000100000 {
compatible = "brcm,bcm2712-pcie";
reg = <0x10 0x00100000 0x00 0x9310>;
--
2.56.0
next prev parent reply other threads:[~2026-11-02 9:07 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-02 9:06 [PATCH 0/9] dma: Add BCM2711 and BCM2712 support to bcm2835-dma Peter Robinson
2026-11-02 9:06 ` [PATCH 1/9] dt-bindings: dma: brcm,bcm2835-dma: Add BCM2711 and BCM2712 Peter Robinson
2026-11-02 19:39 ` Conor Dooley
2026-11-02 20:18 ` Peter Robinson
2026-11-02 20:38 ` Florian Fainelli
2026-11-02 21:35 ` Peter Robinson
2026-11-03 18:22 ` Conor Dooley
2026-11-02 9:06 ` [PATCH 2/9] dmaengine: bcm2835: Refactor control block handling Peter Robinson
2026-11-02 9:06 ` [PATCH 3/9] dmaengine: bcm2835: Support controllers split across several nodes Peter Robinson
2026-11-02 9:06 ` [PATCH 4/9] dmaengine: bcm2835: Add BCM2711 40-bit channel support Peter Robinson
2026-11-02 9:06 ` [PATCH 5/9] dmaengine: bcm2835: Add BCM2712 support Peter Robinson
2026-11-02 9:06 ` [PATCH 6/9] ARM: dts: bcm2711: Add 40-bit DMA controller Peter Robinson
2026-11-02 9:06 ` [PATCH 7/9] ARM: dts: bcm2711-rpi: Use 40-bit DMA for HDMI audio Peter Robinson
2026-11-02 9:06 ` Peter Robinson [this message]
2026-11-02 9:06 ` [PATCH 9/9] arm64: dts: broadcom: bcm2712-rpi-5-b: Enable " Peter Robinson
2026-11-03 16:48 ` [PATCH 0/9] dma: Add BCM2711 and BCM2712 support to bcm2835-dma Dave Stevenson
2026-11-03 17:09 ` Phil Elwell
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