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[82.230.44.19]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-48e71b723cdsm21550275f8f.12.2026.11.02.08.54.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Nov 2026 08:54:45 -0800 (PST) From: Alexandre Mergnat To: rtx4060@gmail.com Cc: broonie@kernel.org, lgirdwood@gmail.com, angelogioacchino.delregno@collabora.com, matthias.bgg@gmail.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: Re: [PATCH 2/2] regulator: mt6363: Fix the registers of the VSRAM CPU and APU LDOs Date: Mon, 2 Nov 2026 16:54:44 +0000 Message-ID: <20261102165444.588240-1-amergnat@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261101164405.1743177-3-rtx4060@gmail.com> References: <20261101164405.1743177-3-rtx4060@gmail.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261102_085447_899349_52242B79 X-CRM114-Status: GOOD ( 12.14 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On Mon, Nov 02, 2026 at 01:44:04AM +0900, GIBEOM LEE (이기범) wrote: > VSRAM_CPUB, VSRAM_CPUM, VSRAM_CPUL and VSRAM_APU have a register of their > own for the enable (bit 0) and low power (bit 1) bits, which the header > defines as MT6363_RG_LDO_VSRAM_*_ADDR. I tested this patch on a board with an MT6363. Without it, vsram-cpum reads as enabled while its own enable bit is clear, because the driver reads the VS1 bit. With it, the four LDOs report their own enable bit, and vsram-cpum, which the board DT keeps always on, is now enabled at boot. With always-on dropped for a test, enabling and disabling vsram-cpum from a test consumer only changes its own enable bit, and VS1 stays on. I did not test the low power mode, nor disabling the other three LDOs: on my board they supply SoC I/O and analog rails. Tested-by: Alexandre Mergnat