From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84ABB606EE90 for ; Tue, 3 Nov 2026 16:37:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key, unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=PmJ7XTZr DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Unsubscribe-Post: List-Owner; bh=b7yfUIavlqkZvjW0hdKuc7GNLhU6uDD+OhW8RPwrMQg=; b=PmJ7XTZrCPm9b8 xk2jE1ASUHnQNeVtYjOEr9cRPQ+CUUBQnic611knhvW78l8EuJiX5exABXwI4obLolKE6ATnvvfN4 PGywM9V6Y3jHK4EhvcpsXKpWK8zTOk26ngF3CIH1DkOgXrFRXUXVse0zUAJsPfc/Mje05Q7fr75gL QjAtTI5SrZRhF4i14XtXwNxWwqsj6sJ2FJtWFZpNljGqig0WEcgyAAHJnO+3QRaCONzi3myTjmC54 7Sa104joUh2c44o3GbDBwNssIcxv3sHnhocCOnag6L2mKiYUWxmXb2bH/17rl8m+9AFaxhdkLYweq h1XHZ+ZsG8RlZnBsvoaA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.100.1 #2 (Red Hat Linux)) id 1xOHVq-000000039iU-2J7R; Tue, 03 Nov 2026 16:37:31 +0000 Received: from mail-wr1-f53.google.com ([209.85.221.53]) by bombadil.infradead.org with esmtps (Exim 4.100.1 #2 (Red Hat Linux)) id 1xOHVj-000000039Ti-167B for linux-arm-kernel@lists.infradead.org; Tue, 03 Nov 2026 16:37:24 +0000 Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-48afbd2c386so2616338f8f.3 for ; Tue, 03 Nov 2026 08:37:22 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1793723841; x=1794328641; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=b7yfUIavlqkZvjW0hdKuc7GNLhU6uDD+OhW8RPwrMQg=; b=nPlxRtaWr3SeRKvi3xoxI2cnxe9bx8S6YGzEu8GplqkBrQcYuzn/i7hNDGmrb2uHq+ 9tFhLdj0q8kfHhSgsFRYcv3EbCgyDDJlLWKoyPbHGIuk0jjl33MjkltR3vHVQ35g6isH vsiXASm2fAB9CtpF4sMyp/7EdKfdKQTPIcRTHYYXW/DuvMYZqUjHFaR8HH0ardf7H7Dp SspytobJ8ttVZ9i9Et6bmkBnP6GtSr2n3c6T2QzJ7M6hlcXJKIyVPFzO0Y9dogV1CESa yVSxgLWtF981ygsbQrGELwFwobPqeBPzgVc+CBcwasjt77I4bYW1ox13Mx379Qboxn2a ppXg== X-Forwarded-Encrypted: i=1; AKwUvBxPqoyE8vDLn1Dmz6iYdAojv5QnxnqR1gw64KOHMeOP/NaekST0Jp6icKmD3qlGJzSaWAVAHKHwgghOQoSFbIcl@lists.infradead.org X-Gm-Message-State: APuU4Z+JCr0dTCf2pLe5d+8PmjSCdK+OufUyW1nN770VRd0fNrC/Ngny gdPQkhms/uHH46DkfgMITESmI9dQIfHWzmyzmyowKgJiTwxP+b0Gmczx X-Gm-Gg: AYBFou1mR0nv4h7XqkDQ5OiqwFBZLC4YlgfvFzr9PhnrSCAbMw0fmXkwfCKwnkz4Fxo jMKzJPJOjMbRea1k0Pg0JePzBrpy1aRJJdxJmrjZZgX4pj0pmBgVOHVGQMZV0H65IGwUlJOPyND bLfUvpA34Ojl08Hu/VJtNuFxxFp+niO1+/WAKOAOZ8fny2OM4lzJrS/YOJyW7uWNNo+hImqS8n3 1wPp0ElmuGtT/T7Ifq4UgrQp3A8WON4b8mdqEwvM2w6sdrbTUqY2MxNFOIY8sMjiyqYBvHhqIoB uzAjabXa/vo7hlru1gWPgR/PIMnDskABcZVrAEgx38UPkHCdBLqZzQ2t5SfDDbORqlaPAqhOtuq j9E3Q+03bK+sPqpOd8zpM/ysuqC/rei2uQchoOawdkPm7yLvtV+IXdPNGjFdjh7dDkSWe/tuLX8 7VuvdtOoqHkv3G9HS7YpbHItf1/I5S3mhLQEyoKWh1uIiE4PIf4UWsB633U2X/j+xXDp9pCLYDu aNVpjGh5Z74soud3ZsFIHYVFYYaqyp4fZ3WlX0C3lozQP3RGIVbzTcrq/IAs3SHB00bt8+5CdN1 lQoe7XBZC9Q4N8RaBlCnYWbBYG7GFx/UB6PZq7xeAnp4FusTkbM2EGbZTc6KBw5Qksx5+FQxVZK hmpZS9jUg4IWA0Aedni6j4FHG/Q== X-Received: by 2002:a05:6000:41c8:b0:48d:faa6:cedf with SMTP id ffacd0b85a97d-48e6e50645dmr30646945f8f.56.1793723841371; Tue, 03 Nov 2026 08:37:21 -0800 (PST) Received: from threads.localdomain ([90.254.187.36]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48e71a4d3e9sm29044772f8f.6.2026.11.03.08.37.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Nov 2026 08:37:20 -0800 (PST) From: Lucas Tanure To: xianwei.zhao@amlogic.com, Andrew Lunn , davem@davemloft.net, Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Maxime Chevallier , Maxime Coquelin , Alexandre Torgue Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 4/7] net: stmmac: dwmac-meson8b: follow the generic RGMII delay rules on the T7 Date: Tue, 3 Nov 2026 16:37:12 +0000 Message-ID: <20261103163715.385394-5-tanure@linux.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261103163715.385394-1-tanure@linux.com> References: <20261103163715.385394-1-tanure@linux.com> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261103_083723_325883_1E90A024 X-CRM114-Status: GOOD ( 18.69 ) X-Spam-Score: -0.8 (/) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-16.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 The delay code reads phy-mode as the list of delays this glue has to add, falls back to a 2ns transmit delay when no property asks for one, and takes the vendor delay properties. ethernet-controller.yaml says the opposite: the PHY adds the 2ns delays, and the MAC properties only hold small fine tuning added on top. Every board in the tree depends on the old reading, so it stays as it is. No T7 board uses this glue yet, so the T7 gets a path of its own that follows the generic rules: the receive delay line is fine tuning in 200ps steps, and the transmit side, a quarter-period phase step, offers none, so the transmit property is refused. Assisted-by: LLM Signed-off-by: Lucas Tanure --- .../ethernet/stmicro/stmmac/dwmac-meson8b.c | 42 ++++++++++++++++++- 1 file changed, 41 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c index 450f7b4b29a6..c8bd15b6780b 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c @@ -80,6 +80,7 @@ struct meson8b_dwmac; struct meson8b_dwmac_data { int (*set_phy_mode)(struct meson8b_dwmac *dwmac); + int (*init_delays)(struct meson8b_dwmac *dwmac); bool has_prg_eth1_rgmii_rx_delay; bool has_pipeline_clk; }; @@ -338,6 +339,41 @@ static int meson8b_init_rgmii_delays(struct meson8b_dwmac *dwmac) return 0; } +/* + * The T7 follows ethernet-controller.yaml: the PHY adds the 2ns RGMII + * delays and this glue only fine tunes the RX clock on top of what + * phy-mode describes. Its TX clock has no fine tuning, the only step is + * a quarter of the clock period, so the TX property is refused, and so + * are the vendor properties of the older SoCs. + */ +static int meson_t7_init_delays(struct meson8b_dwmac *dwmac) +{ + struct device_node *np = dwmac->dev->of_node; + u32 cfg_rxclk_dly = 0; + + if (of_property_present(np, "tx-internal-delay-ps") || + of_property_present(np, "amlogic,tx-delay-ns") || + of_property_present(np, "amlogic,rx-delay-ns")) + return dev_err_probe(dwmac->dev, -EINVAL, + "only rx-internal-delay-ps is supported, the PHY adds the RGMII delays\n"); + + if (phy_interface_mode_is_rgmii(dwmac->phy_mode)) + cfg_rxclk_dly = FIELD_PREP(PRG_ETH1_CFG_RXCLK_DLY, + dwmac->rx_delay_ps / 200); + else if (dwmac->rx_delay_ps) + return dev_err_probe(dwmac->dev, -EINVAL, + "rx-internal-delay-ps needs an RGMII phy-mode\n"); + + meson8b_dwmac_mask_bits(dwmac, PRG_ETH0, PRG_ETH0_TXDLY_MASK | + PRG_ETH0_ADJ_ENABLE | PRG_ETH0_ADJ_SETUP | + PRG_ETH0_ADJ_DELAY | PRG_ETH0_ADJ_SKEW, 0); + + meson8b_dwmac_mask_bits(dwmac, PRG_ETH1, PRG_ETH1_CFG_RXCLK_DLY, + cfg_rxclk_dly); + + return 0; +} + static int meson8b_init_prg_eth(struct meson8b_dwmac *dwmac) { int ret; @@ -452,7 +488,7 @@ static int meson8b_dwmac_probe(struct platform_device *pdev) "missing pipeline clock\n"); } - ret = meson8b_init_rgmii_delays(dwmac); + ret = dwmac->data->init_delays(dwmac); if (ret) return ret; @@ -475,21 +511,25 @@ static int meson8b_dwmac_probe(struct platform_device *pdev) static const struct meson8b_dwmac_data meson8b_dwmac_data = { .set_phy_mode = meson8b_set_phy_mode, + .init_delays = meson8b_init_rgmii_delays, .has_prg_eth1_rgmii_rx_delay = false, }; static const struct meson8b_dwmac_data meson_axg_dwmac_data = { .set_phy_mode = meson_axg_set_phy_mode, + .init_delays = meson8b_init_rgmii_delays, .has_prg_eth1_rgmii_rx_delay = false, }; static const struct meson8b_dwmac_data meson_g12a_dwmac_data = { .set_phy_mode = meson_axg_set_phy_mode, + .init_delays = meson8b_init_rgmii_delays, .has_prg_eth1_rgmii_rx_delay = true, }; static const struct meson8b_dwmac_data meson_t7_dwmac_data = { .set_phy_mode = meson_axg_set_phy_mode, + .init_delays = meson_t7_init_delays, .has_prg_eth1_rgmii_rx_delay = true, .has_pipeline_clk = true, }; -- 2.56.0