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Tue, 03 Nov 2026 08:37:24 -0800 (PST) Received: from threads.localdomain ([90.254.187.36]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48e71a4d3e9sm29044772f8f.6.2026.11.03.08.37.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Nov 2026 08:37:24 -0800 (PST) From: Lucas Tanure To: xianwei.zhao@amlogic.com, Andrew Lunn , davem@davemloft.net, Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Maxime Chevallier , Maxime Coquelin , Alexandre Torgue Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 7/7] arm64: dts: amlogic: t7: khadas-vim4: enable the ethernet port Date: Tue, 3 Nov 2026 16:37:15 +0000 Message-ID: <20261103163715.385394-8-tanure@linux.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261103163715.385394-1-tanure@linux.com> References: <20261103163715.385394-1-tanure@linux.com> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261103_083726_955483_FE672B32 X-CRM114-Status: GOOD ( 12.25 ) X-Spam-Score: -0.8 (/) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-16.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 The board carries a Realtek RTL8211F gigabit PHY on the external management bus, connected to the MAC over RGMII. Enable the controller and the management bus multiplexer, hand the controller the ethernet pins and point it at the PHY on the external bus. RGMII needs a delay on each of its two clocks. The board traces add none, so the PHY adds both, which is what rgmii-id asks of it. The PHY interrupt output is wired to GPIOH_6, so link changes are reported instead of polled. The PHY reset is an RC network on the board, not a SoC pin, so there is no reset line to describe. Assisted-by: LLM Signed-off-by: Lucas Tanure --- .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts index 0fa83362b417..93327b993d39 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts @@ -14,6 +14,7 @@ / { compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7"; aliases { + ethernet0 = ðmac; serial0 = &uart_a; mmc0 = &sd_emmc_c; mmc1 = &sd_emmc_b; @@ -256,6 +257,28 @@ xtal: xtal-clk { }; }; +ðmac { + status = "okay"; + pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; + pinctrl-names = "default"; + phy-mode = "rgmii-id"; + phy-handle = <&external_phy>; +}; + +ð_phy { + status = "okay"; +}; + +&ext_mdio { + external_phy: ethernet-phy@0 { + /* Realtek RTL8211FD-CG */ + reg = <0>; + + interrupt-parent = <&gpio_intc>; + interrupts = ; + }; +}; + &i2c_m_ao_a { status = "okay"; pinctrl-0 = <&i2c0_ao_d_pins>; -- 2.56.0