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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261107_073714_519857_BDA393EF X-CRM114-Status: GOOD ( 15.72 ) X-Spam-Score: -9.5 (---------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" X-Spam-Status: No, score=-26.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIMWL_WL_MED,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT, USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 PSTATE.TCO toggling can be expensive but uaccess_*_privileged() (used in futex()) were doing it unconditionally when built with KASAN_HW_TAGS and running on MTE-capable CPUs, due to mte_{enable,disable}_tco(). This was unnecessary when 'kasan=3Doff', adding overhead despite the care taken in mte_disable_tco_entry() to keep TCO set. Instead, only toggle TCO if EL1 accesses risk triggering tag faults. Name the new helpers by following the example of __uaccess_*_hw_pan(). Specifically, this favors a simpler terminology ("re-enabling MTE") over confusing double-negations ("disabling the override"). Move the comment intended to document this out of a shared KASAN header, to be next to the code it explains. Signed-off-by: Pierre-Cl=C3=A9ment Tosi --- arch/arm64/include/asm/mte-kasan.h | 17 ----------------- arch/arm64/include/asm/uaccess.h | 21 +++++++++++++++++++-- 2 files changed, 19 insertions(+), 19 deletions(-) diff --git a/arch/arm64/include/asm/mte-kasan.h b/arch/arm64/include/asm/mt= e-kasan.h index 43510341b965..467d1d41a392 100644 --- a/arch/arm64/include/asm/mte-kasan.h +++ b/arch/arm64/include/asm/mte-kasan.h @@ -34,23 +34,6 @@ static inline bool system_uses_mte_async_or_asymm_mode(v= oid) =20 #ifdef CONFIG_ARM64_MTE =20 -/* - * The Tag Check Flag (TCF) mode for MTE is per EL, hence TCF0 - * affects EL0 and TCF affects EL1 irrespective of which TTBR is - * used. - * The kernel accesses TTBR0 usually with LDTR/STTR instructions - * when UAO is available, so these would act as EL0 accesses using - * TCF0. - * However futex.h code uses exclusives which would be executed as - * EL1, this can potentially cause a tag check fault even if the - * user disables TCF0. - * - * To address the problem we set the PSTATE.TCO bit in uaccess_enable() - * and reset it in uaccess_disable(). - * - * The Tag check override (TCO) bit disables temporarily the tag checking - * preventing the issue. - */ static inline void mte_disable_tco(void) { if (!IS_ENABLED(CONFIG_KASAN_HW_TAGS)) diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uacc= ess.h index 9f5bd9c69c24..f0924dc0bd64 100644 --- a/arch/arm64/include/asm/uaccess.h +++ b/arch/arm64/include/asm/uaccess.h @@ -16,6 +16,7 @@ */ #include #include +#include #include =20 #include @@ -132,9 +133,25 @@ static inline void __uaccess_enable_hw_pan(void) asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN)); } =20 +static inline void __uaccess_disable_mte(void) +{ + /* + * Unlike get_user(), privileged uaccess (TTBR0) uses TCF (not TCF0) + * such that a bad user address tag could trigger a kernel MTE fault. + */ + if (kasan_hw_tags_enabled()) + asm volatile(SET_PSTATE_TCO(1)); +} + +static inline void __uaccess_enable_mte(void) +{ + if (kasan_hw_tags_enabled()) + asm volatile(SET_PSTATE_TCO(0)); +} + static inline void uaccess_disable_privileged(void) { - mte_disable_tco(); + __uaccess_enable_mte(); =20 if (uaccess_ttbr0_disable()) return; @@ -144,7 +161,7 @@ static inline void uaccess_disable_privileged(void) =20 static inline void uaccess_enable_privileged(void) { - mte_enable_tco(); + __uaccess_disable_mte(); =20 if (uaccess_ttbr0_enable()) return; --=20 2.56.0.455.g6c5a503b38-goog