[PATCH v2 06/13] soc: synaptics: add SL2610 system controller support

[Jisheng Zhang <jszhang@kernel.org>]

Create the clock, reset and pin controller platform devices implemented
by each SL2610 system control block. Select the appropriate MFD cells
from per-block compatible data while keeping register access available
through the shared syscon.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
 MAINTAINERS                           |  1 +
 drivers/soc/Kconfig                   |  1 +
 drivers/soc/Makefile                  |  1 +
 drivers/soc/synaptics/Kconfig         | 14 +++++
 drivers/soc/synaptics/Makefile        |  2 +
 drivers/soc/synaptics/sl2610-syscon.c | 84 +++++++++++++++++++++++++++
 6 files changed, 103 insertions(+)
 create mode 100644 drivers/soc/synaptics/Kconfig
 create mode 100644 drivers/soc/synaptics/Makefile
 create mode 100644 drivers/soc/synaptics/sl2610-syscon.c

diff --git a/MAINTAINERS b/MAINTAINERS
index e7c061ae5a87..eae1493485ee 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3812,6 +3812,7 @@ F:	Documentation/devicetree/bindings/soc/synaptics/
 F:	arch/arm/boot/dts/synaptics/
 F:	arch/arm/mach-berlin/
 F:	arch/arm64/boot/dts/synaptics/
+F:	drivers/soc/synaptics/
 F:	include/dt-bindings/clock/syna,sl2610.h
 F:	include/dt-bindings/reset/syna,sl2610-reset.h
 
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 483cbdcae153..5fe7348cddab 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -27,6 +27,7 @@ source "drivers/soc/sophgo/Kconfig"
 source "drivers/soc/st/Kconfig"
 source "drivers/soc/starfive/Kconfig"
 source "drivers/soc/sunxi/Kconfig"
+source "drivers/soc/synaptics/Kconfig"
 source "drivers/soc/tegra/Kconfig"
 source "drivers/soc/ti/Kconfig"
 source "drivers/soc/ux500/Kconfig"
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 5a3efd68355c..3e51563b914c 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -33,6 +33,7 @@ obj-y				+= sophgo/
 obj-y				+= st/
 obj-y				+= starfive/
 obj-y				+= sunxi/
+obj-y				+= synaptics/
 obj-$(CONFIG_ARCH_TEGRA)	+= tegra/
 obj-y				+= ti/
 obj-$(CONFIG_ARCH_U8500)	+= ux500/
diff --git a/drivers/soc/synaptics/Kconfig b/drivers/soc/synaptics/Kconfig
new file mode 100644
index 000000000000..9f0324a1a3b7
--- /dev/null
+++ b/drivers/soc/synaptics/Kconfig
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+config SOC_SL2610_SYSCON
+	tristate "Synaptics SL2610 system controller"
+	depends on ARCH_BERLIN || COMPILE_TEST
+	depends on OF && HAS_IOMEM
+	select MFD_CORE
+	select MFD_SYSCON
+	help
+	  Support the global and control register blocks on Synaptics SL2610
+	  SoCs. This creates devices for the clock, reset and pin controllers
+	  provided by each register block.
+
+	  Say Y here to enable access to these functions on SL2610 systems.
diff --git a/drivers/soc/synaptics/Makefile b/drivers/soc/synaptics/Makefile
new file mode 100644
index 000000000000..13710fc58903
--- /dev/null
+++ b/drivers/soc/synaptics/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0-only
+obj-$(CONFIG_SOC_SL2610_SYSCON) += sl2610-syscon.o
diff --git a/drivers/soc/synaptics/sl2610-syscon.c b/drivers/soc/synaptics/sl2610-syscon.c
new file mode 100644
index 000000000000..c6fc2955ac0d
--- /dev/null
+++ b/drivers/soc/synaptics/sl2610-syscon.c
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2026 Synaptics Incorporated
+ */
+
+#include <linux/mfd/core.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+struct sl2610_syscon_data {
+	const struct mfd_cell *cells;
+	unsigned int num_cells;
+};
+
+static const struct mfd_cell sl2610_soc_cells[] = {
+	MFD_CELL_NAME("sl2610-soc-clk"),
+	MFD_CELL_NAME("sl2610-soc-reset"),
+	MFD_CELL_NAME("sl2610-soc-pinctrl"),
+};
+
+static const struct mfd_cell sl2610_mcu_cells[] = {
+	MFD_CELL_NAME("sl2610-mcu-clk"),
+	MFD_CELL_NAME("sl2610-mcu-reset"),
+	MFD_CELL_NAME("sl2610-mcu-pinctrl"),
+};
+
+static const struct mfd_cell sl2610_avio_cells[] = {
+	MFD_CELL_NAME("sl2610-avio-clk"),
+};
+
+static const struct mfd_cell sl2610_cpu_cells[] = {
+	MFD_CELL_NAME("sl2610-cpu-clk"),
+};
+
+static const struct sl2610_syscon_data sl2610_soc_data = {
+	.cells = sl2610_soc_cells,
+	.num_cells = ARRAY_SIZE(sl2610_soc_cells),
+};
+
+static const struct sl2610_syscon_data sl2610_mcu_data = {
+	.cells = sl2610_mcu_cells,
+	.num_cells = ARRAY_SIZE(sl2610_mcu_cells),
+};
+
+static const struct sl2610_syscon_data sl2610_avio_data = {
+	.cells = sl2610_avio_cells,
+	.num_cells = ARRAY_SIZE(sl2610_avio_cells),
+};
+
+static const struct sl2610_syscon_data sl2610_cpu_data = {
+	.cells = sl2610_cpu_cells,
+	.num_cells = ARRAY_SIZE(sl2610_cpu_cells),
+};
+
+static int sl2610_syscon_probe(struct platform_device *pdev)
+{
+	const struct sl2610_syscon_data *data = device_get_match_data(&pdev->dev);
+
+	return devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO,
+				    data->cells, data->num_cells, NULL, 0, NULL);
+}
+
+static const struct of_device_id sl2610_syscon_of_match[] = {
+	{ .compatible = "syna,sl2610-soc-syscon", .data = &sl2610_soc_data },
+	{ .compatible = "syna,sl2610-mcu-syscon", .data = &sl2610_mcu_data },
+	{ .compatible = "syna,sl2610-avio-syscon", .data = &sl2610_avio_data },
+	{ .compatible = "syna,sl2610-cpu-syscon", .data = &sl2610_cpu_data },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, sl2610_syscon_of_match);
+
+static struct platform_driver sl2610_syscon_driver = {
+	.probe = sl2610_syscon_probe,
+	.driver = {
+		.name = "sl2610-syscon",
+		.of_match_table = sl2610_syscon_of_match,
+	},
+};
+module_platform_driver(sl2610_syscon_driver);
+
+MODULE_AUTHOR("Jisheng Zhang <jszhang@kernel.org>");
+MODULE_DESCRIPTION("Synaptics SL2610 system controller");
+MODULE_LICENSE("GPL");
-- 
2.55.0