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Wed, 23 Sep 2020 18:47:17 -0400 X-MC-Unique: XWtntuIIOsW-2ajFPIagdg-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id EB673100748A; Wed, 23 Sep 2020 22:47:15 +0000 (UTC) Received: from [10.64.54.94] (vpn2-54-94.bne.redhat.com [10.64.54.94]) by smtp.corp.redhat.com (Postfix) with ESMTPS id C287978823; Wed, 23 Sep 2020 22:47:13 +0000 (UTC) Subject: Re: [PATCH v2 0/2] arm64/mm: Enable color zero pages To: Catalin Marinas References: <20200923053721.28873-1-gshan@redhat.com> <20200923084317.GA13434@gaia> From: Gavin Shan Message-ID: <2047fb91-da03-7774-ef5e-d194b92813c3@redhat.com> Date: Thu, 24 Sep 2020 08:47:09 +1000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.0 MIME-Version: 1.0 In-Reply-To: <20200923084317.GA13434@gaia> Content-Language: en-US X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200923_184721_900125_49B7595E X-CRM114-Status: GOOD ( 17.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: Gavin Shan Cc: mark.rutland@arm.com, anshuman.khandual@arm.com, robin.murphy@arm.com, linux-kernel@vger.kernel.org, shan.gavin@gmail.com, will@kernel.org, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Catalin, On 9/23/20 6:43 PM, Catalin Marinas wrote: > On Wed, Sep 23, 2020 at 03:37:19PM +1000, Gavin Shan wrote: >> The feature of color zero pages isn't enabled on arm64, meaning all >> read-only (anonymous) VM areas are backed up by same zero page. It >> leads pressure to L1 (data) cache on reading data from them. This >> tries to enable color zero pages. >> >> PATCH[1/2] decouples the zero PGD table from zero page >> PATCH[2/2] allocates the needed zero pages according to L1 cache size > > To save you (and potential reviewers) some time, please include in the > cover letter details of a realistic workload/benchmark that is improved > by this patchset, backed by numbers. Just because it's doable and the > patches aren't too complex is not a good enough reason for merging. > Sure, Please ignore this (v2) series for now. I'll try to provide performance data in v3 even I'm not positive about that because it depends on CPU's L1 dCache size :) Cheers, Gavin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel