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* [PATCH v3 0/6] Add generic set_rate clk_ops for PLL35xx and PLL36xx for samsung SoCs
@ 2013-05-31 12:31 Vikas Sajjan
  2013-05-31 12:31 ` [PATCH v3 1/6] clk: samsung: Use clk->base instead of directly using clk->con0 for PLL3xxx Vikas Sajjan
                   ` (6 more replies)
  0 siblings, 7 replies; 18+ messages in thread
From: Vikas Sajjan @ 2013-05-31 12:31 UTC (permalink / raw)
  To: linux-arm-kernel

This patch series does the following: 

 1) Factors out possible common code, unifies the clk strutures used
    for PLL35xx & PLL36xx and usues clk->base instead of clk->con0

 2) Defines a common rate_table which will contain recommended p, m, s and k
    values for supported rates that needs to be changed for changing
    corresponding PLL's rate

 3) Adds set_rate() and round_rate() clk_ops for PLL35xx and PLL36xx

changes since v2:
	- Added new patch to reorder the MUX registration for mout_vpllsrc MUX
	before the PLL registrations. And to add the alias for the mout_vpllsrc MUX.
        - Added a check to confirm parent rate while registrating the PLL
	rate tables.

changes since v1:
	- removed sorting and bsearch
	- modified the definition of struct "samsung_pll_rate_table"
	- added generic round_rate()
	- rectified the ops assignment for "rate table passed as NULL"
	  during PLL registration

Is rebased on branch kgene's "for-next"
https://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git/log/?h=for-next

And tested these patch on chromebook for EPLL settings for Audio on our chrome tree.


Vikas Sajjan (3):
  clk: samsung: Add set_rate() clk_ops for PLL36xx
  clk: samsung: Add alias for mout_vpllsrc and reorder MUX registration
    for it
  clk: samsung: Add EPLL and VPLL freq table for exynos5250 SoC

Yadwinder Singh Brar (3):
  clk: samsung: Use clk->base instead of directly using clk->con0 for
    PLL3xxx
  clk: samsung: Add support to register rate_table for PLL3xxx
  clk: samsung: Add set_rate() clk_ops for PLL35xx

 drivers/clk/samsung/clk-exynos4.c    |   10 +-
 drivers/clk/samsung/clk-exynos5250.c |   69 +++++++++--
 drivers/clk/samsung/clk-pll.c        |  226 ++++++++++++++++++++++++++++++----
 drivers/clk/samsung/clk-pll.h        |   35 +++++-
 drivers/clk/samsung/clk.h            |    2 +
 5 files changed, 300 insertions(+), 42 deletions(-)

-- 
1.7.9.5

^ permalink raw reply	[flat|nested] 18+ messages in thread

end of thread, other threads:[~2013-06-12 14:51 UTC | newest]

Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-05-31 12:31 [PATCH v3 0/6] Add generic set_rate clk_ops for PLL35xx and PLL36xx for samsung SoCs Vikas Sajjan
2013-05-31 12:31 ` [PATCH v3 1/6] clk: samsung: Use clk->base instead of directly using clk->con0 for PLL3xxx Vikas Sajjan
2013-06-08 12:04   ` Tomasz Figa
2013-05-31 12:31 ` [PATCH v3 2/6] clk: samsung: Add support to register rate_table " Vikas Sajjan
2013-05-31 17:08   ` Doug Anderson
2013-05-31 12:31 ` [PATCH v3 3/6] clk: samsung: Add set_rate() clk_ops for PLL35xx Vikas Sajjan
2013-05-31 17:10   ` Doug Anderson
2013-06-08 12:12   ` Tomasz Figa
2013-06-12 14:51     ` Yadwinder Singh Brar
2013-05-31 12:31 ` [PATCH v3 4/6] clk: samsung: Add set_rate() clk_ops for PLL36xx Vikas Sajjan
2013-05-31 17:15   ` Doug Anderson
2013-06-08 12:17   ` Tomasz Figa
2013-06-12  6:09     ` Vikas Sajjan
2013-05-31 12:31 ` [PATCH v3 5/6] clk: samsung: Add alias for mout_vpllsrc and reorder MUX registration for it Vikas Sajjan
2013-05-31 17:20   ` Doug Anderson
2013-05-31 12:31 ` [PATCH v3 6/6] clk: samsung: Add EPLL and VPLL freq table for exynos5250 SoC Vikas Sajjan
2013-05-31 17:58   ` Doug Anderson
2013-06-03 21:06 ` [PATCH v3 0/6] Add generic set_rate clk_ops for PLL35xx and PLL36xx for samsung SoCs Doug Anderson

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