From: Yunfeng Ye <yeyunfeng@huawei.com>
To: <catalin.marinas@arm.com>, <will@kernel.org>,
<wangkefeng.wang@huawei.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Cc: <wuxu.wu@huawei.com>, Hewenliang <hewenliang4@huawei.com>
Subject: [PATCH v2 2/2] arm64: mm: Use asid feature macro for cheanup
Date: Wed, 8 Dec 2021 17:17:45 +0800 [thread overview]
Message-ID: <204aef78-cf5b-a337-af71-5d52ba845aa0@huawei.com> (raw)
In-Reply-To: <506863a9-b934-3af3-c70d-3284e14478de@huawei.com>
The commit 95b54c3e4c92 ("KVM: arm64: Add feature register flag
definitions") introduce the ID_AA64MMFR0_ASID_8 and ID_AA64MMFR0_ASID_16
macros.
We can use these macros for cheanup in get_cpu_asid_bits().
No functional change.
---
arch/arm64/mm/context.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
index bbc2708fe928..b8b4cf0bcf39 100644
--- a/arch/arm64/mm/context.c
+++ b/arch/arm64/mm/context.c
@@ -50,10 +50,10 @@ static u32 get_cpu_asid_bits(void)
pr_warn("CPU%d: Unknown ASID size (%d); assuming 8-bit\n",
smp_processor_id(), fld);
fallthrough;
- case 0:
+ case ID_AA64MMFR0_ASID_8:
asid = 8;
break;
- case 2:
+ case ID_AA64MMFR0_ASID_16:
asid = 16;
}
--
2.27.0
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next prev parent reply other threads:[~2021-12-08 9:19 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-08 9:16 [PATCH v2 1/2] arm64: mm: Rename asid2idx() to ctxid2asid() Yunfeng Ye
2021-12-08 9:17 ` Yunfeng Ye [this message]
2021-12-08 9:35 ` [PATCH v2 2/2] arm64: mm: Use asid feature macro for cheanup Kefeng Wang
2021-12-09 1:36 ` Yunfeng Ye
2021-12-08 18:25 ` [PATCH v2 1/2] arm64: mm: Rename asid2idx() to ctxid2asid() Catalin Marinas
2021-12-09 1:35 ` Yunfeng Ye
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