* [PATCH v2 01/18] ARM: SAMSUNG: Unify base address definitions of timer block
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
@ 2013-06-20 22:12 ` Tomasz Figa
2013-06-20 22:12 ` [PATCH v2 02/18] ARM: SAMSUNG: Add new PWM platform device Tomasz Figa
` (19 subsequent siblings)
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:12 UTC (permalink / raw)
To: linux-arm-kernel
From: Tomasz Figa <t.figa@samsung.com>
This patch makes all defintions of timer block base address use the same
prefix to allow using the common name to define platform device
resource.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s3c24xx/include/mach/map.h | 2 ++
arch/arm/mach-s3c64xx/include/mach/map.h | 1 +
arch/arm/mach-s5p64x0/include/mach/map.h | 1 +
arch/arm/mach-s5pc100/include/mach/map.h | 1 +
arch/arm/mach-s5pv210/include/mach/map.h | 1 +
5 files changed, 6 insertions(+)
diff --git a/arch/arm/mach-s3c24xx/include/mach/map.h b/arch/arm/mach-s3c24xx/include/mach/map.h
index 8ba381f..444793f 100644
--- a/arch/arm/mach-s3c24xx/include/mach/map.h
+++ b/arch/arm/mach-s3c24xx/include/mach/map.h
@@ -167,4 +167,6 @@
#define S3C_PA_SPI0 S3C2443_PA_SPI0
#define S3C_PA_SPI1 S3C2443_PA_SPI1
+#define SAMSUNG_PA_TIMER S3C2410_PA_TIMER
+
#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index 8e2097b..f55ccb1 100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -121,5 +121,6 @@
#define SAMSUNG_PA_ADC S3C64XX_PA_ADC
#define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON
#define SAMSUNG_PA_KEYPAD S3C64XX_PA_KEYPAD
+#define SAMSUNG_PA_TIMER S3C64XX_PA_TIMER
#endif /* __ASM_ARCH_6400_MAP_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
index 0c0175d..50a6e96 100644
--- a/arch/arm/mach-s5p64x0/include/mach/map.h
+++ b/arch/arm/mach-s5p64x0/include/mach/map.h
@@ -76,6 +76,7 @@
#define S5P_PA_TIMER S5P64X0_PA_TIMER
#define SAMSUNG_PA_ADC S5P64X0_PA_ADC
+#define SAMSUNG_PA_TIMER S5P64X0_PA_TIMER
/* UART */
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index 54bc4f8..2550b61 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -116,6 +116,7 @@
#define SAMSUNG_PA_ADC S5PC100_PA_TSADC
#define SAMSUNG_PA_CFCON S5PC100_PA_CFCON
#define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD
+#define SAMSUNG_PA_TIMER S5PC100_PA_TIMER
#define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000)
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index b7c8a19..763929a 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -139,6 +139,7 @@
#define SAMSUNG_PA_ADC S5PV210_PA_ADC
#define SAMSUNG_PA_CFCON S5PV210_PA_CFCON
#define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD
+#define SAMSUNG_PA_TIMER S5PV210_PA_TIMER
/* UART */
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 02/18] ARM: SAMSUNG: Add new PWM platform device
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
2013-06-20 22:12 ` [PATCH v2 01/18] ARM: SAMSUNG: Unify base address definitions of timer block Tomasz Figa
@ 2013-06-20 22:12 ` Tomasz Figa
2013-06-20 22:12 ` [PATCH v2 03/18] ARM: SAMSUNG: Set PWM platform data Tomasz Figa
` (18 subsequent siblings)
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:12 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds new samsung_device_pwm platform device that represents
the whole PWM/timer block and includes memory and IRQ resources.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
arch/arm/plat-samsung/devs.c | 17 +++++++++++++++++
arch/arm/plat-samsung/include/plat/devs.h | 1 +
arch/arm/plat-samsung/include/plat/pwm-core.h | 24 ++++++++++++++++++++++++
3 files changed, 42 insertions(+)
create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 0f9c3f4..bba6d78 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -58,6 +58,7 @@
#include <plat/keypad.h>
#include <linux/platform_data/mmc-s3cmci.h>
#include <linux/platform_data/mtd-nand-s3c2410.h>
+#include <plat/pwm-core.h>
#include <plat/sdhci.h>
#include <linux/platform_data/touchscreen-s3c2410.h>
#include <linux/platform_data/usb-s3c2410_udc.h>
@@ -1127,6 +1128,22 @@ struct platform_device s3c_device_timer[] = {
[3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
[4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
};
+
+static struct resource samsung_pwm_resource[] = {
+ DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
+};
+
+struct platform_device samsung_device_pwm = {
+ .name = "samsung-pwm",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(samsung_pwm_resource),
+ .resource = samsung_pwm_resource,
+};
+
+void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
+{
+ samsung_device_pwm.dev.platform_data = pd;
+}
#endif /* CONFIG_SAMSUNG_DEV_PWM */
/* RTC */
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 87d501f..0dc4ac4 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -134,6 +134,7 @@ extern struct platform_device exynos4_device_spdif;
extern struct platform_device samsung_asoc_idma;
extern struct platform_device samsung_device_keypad;
+extern struct platform_device samsung_device_pwm;
/* s3c2440 specific devices */
diff --git a/arch/arm/plat-samsung/include/plat/pwm-core.h b/arch/arm/plat-samsung/include/plat/pwm-core.h
new file mode 100644
index 0000000..df50f5c
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/pwm-core.h
@@ -0,0 +1,24 @@
+/*
+ * linux/arch/arm/plat-samsung/onenand-core.h
+ *
+ * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
+ *
+ * Samsung PWM Controller core functions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_PWM_CORE_H
+#define __ASM_ARCH_PWM_CORE_H __FILE__
+
+#include <clocksource/samsung_pwm.h>
+
+#ifdef CONFIG_SAMSUNG_DEV_PWM
+extern void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd);
+#else
+static inline void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd) { }
+#endif
+
+#endif /* __ASM_ARCH_PWM_CORE_H */
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 03/18] ARM: SAMSUNG: Set PWM platform data
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
2013-06-20 22:12 ` [PATCH v2 01/18] ARM: SAMSUNG: Unify base address definitions of timer block Tomasz Figa
2013-06-20 22:12 ` [PATCH v2 02/18] ARM: SAMSUNG: Add new PWM platform device Tomasz Figa
@ 2013-06-20 22:12 ` Tomasz Figa
2013-06-20 22:12 ` [PATCH v2 04/18] clocksource: samsung_pwm_timer: Cache clocksource register address Tomasz Figa
` (17 subsequent siblings)
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:12 UTC (permalink / raw)
To: linux-arm-kernel
From: Tomasz Figa <t.figa@samsung.com>
This patch adds PWM platform data needed for legacy (non-DT) platforms
to handle SoC-specific bits of the PWM/timer block.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s3c24xx/common.c | 11 +++++++++++
arch/arm/mach-s3c64xx/common.c | 11 +++++++++++
arch/arm/mach-s5p64x0/common.c | 10 ++++++++++
arch/arm/mach-s5pc100/common.c | 11 +++++++++++
arch/arm/mach-s5pv210/common.c | 11 +++++++++++
5 files changed, 54 insertions(+)
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index c157103..e5e7d7d 100644
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -27,6 +27,7 @@
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/serial_core.h>
+#include <clocksource/samsung_pwm.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/io.h>
@@ -49,6 +50,7 @@
#include <plat/clock.h>
#include <plat/cpu-freq.h>
#include <plat/pll.h>
+#include <plat/pwm-core.h>
#include "common.h"
@@ -216,6 +218,13 @@ static void s3c24xx_default_idle(void)
S3C2410_CLKCON);
}
+static struct samsung_pwm_variant s3c24xx_pwm_variant = {
+ .bits = 16,
+ .div_base = 1,
+ .has_tint_cstat = false,
+ .tclk_mask = (1 << 4),
+};
+
void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
{
arm_pm_idle = s3c24xx_default_idle;
@@ -232,6 +241,8 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
s3c24xx_init_cpu();
s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+
+ samsung_pwm_set_platdata(&s3c24xx_pwm_variant);
}
/* Serial port registrations */
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index 1aed6f4..0ab97c3 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -26,6 +26,7 @@
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/irqchip/arm-vic.h>
+#include <clocksource/samsung_pwm.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -42,6 +43,7 @@
#include <plat/gpio-cfg.h>
#include <plat/irq-uart.h>
#include <plat/irq-vic-timer.h>
+#include <plat/pwm-core.h>
#include <plat/regs-irqtype.h>
#include <plat/regs-serial.h>
#include <plat/watchdog-reset.h>
@@ -148,6 +150,13 @@ static struct device s3c64xx_dev = {
.bus = &s3c64xx_subsys,
};
+static struct samsung_pwm_variant s3c64xx_pwm_variant = {
+ .bits = 32,
+ .div_base = 0,
+ .has_tint_cstat = true,
+ .tclk_mask = (1 << 7) | (1 << 6) | (1 << 5),
+};
+
/* read cpu identification code */
void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
@@ -160,6 +169,8 @@ void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
s3c64xx_init_cpu();
s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+
+ samsung_pwm_set_platdata(&s3c64xx_pwm_variant);
}
static __init int s3c64xx_dev_init(void)
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 76d0053..c14d719 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -19,6 +19,7 @@
#include <linux/io.h>
#include <linux/device.h>
#include <linux/serial_core.h>
+#include <clocksource/samsung_pwm.h>
#include <linux/platform_device.h>
#include <linux/sched.h>
#include <linux/dma-mapping.h>
@@ -46,6 +47,7 @@
#include <plat/fb-core.h>
#include <plat/spi-core.h>
#include <plat/gpio-cfg.h>
+#include <plat/pwm-core.h>
#include <plat/regs-irqtype.h>
#include <plat/regs-serial.h>
#include <plat/watchdog-reset.h>
@@ -156,6 +158,13 @@ static void s5p64x0_idle(void)
cpu_do_idle();
}
+static struct samsung_pwm_variant s5p64x0_pwm_variant = {
+ .bits = 32,
+ .div_base = 0,
+ .has_tint_cstat = true,
+ .tclk_mask = 0,
+};
+
/*
* s5p64x0_map_io
*
@@ -175,6 +184,7 @@ void __init s5p64x0_init_io(struct map_desc *mach_desc, int size)
s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
samsung_wdt_reset_init(S3C_VA_WATCHDOG);
+ samsung_pwm_set_platdata(&s5p64x0_pwm_variant);
}
void __init s5p6440_map_io(void)
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c
index 5110315..a62e8a4 100644
--- a/arch/arm/mach-s5pc100/common.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -22,6 +22,7 @@
#include <linux/io.h>
#include <linux/device.h>
#include <linux/serial_core.h>
+#include <clocksource/samsung_pwm.h>
#include <linux/platform_device.h>
#include <linux/sched.h>
@@ -45,6 +46,7 @@
#include <plat/fb-core.h>
#include <plat/iic-core.h>
#include <plat/onenand-core.h>
+#include <plat/pwm-core.h>
#include <plat/spi-core.h>
#include <plat/regs-serial.h>
#include <plat/watchdog-reset.h>
@@ -131,6 +133,13 @@ static struct map_desc s5pc100_iodesc[] __initdata = {
}
};
+static struct samsung_pwm_variant s5pc100_pwm_variant = {
+ .bits = 32,
+ .div_base = 0,
+ .has_tint_cstat = true,
+ .tclk_mask = (1 << 5),
+};
+
/*
* s5pc100_map_io
*
@@ -148,6 +157,8 @@ void __init s5pc100_init_io(struct map_desc *mach_desc, int size)
s5p_init_cpu(S5P_VA_CHIPID);
s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+
+ samsung_pwm_set_platdata(&s5pc100_pwm_variant);
}
void __init s5pc100_map_io(void)
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index 9dfe93e..4eba33d 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -19,6 +19,7 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/device.h>
+#include <clocksource/samsung_pwm.h>
#include <linux/platform_device.h>
#include <linux/sched.h>
#include <linux/dma-mapping.h>
@@ -42,6 +43,7 @@
#include <plat/fimc-core.h>
#include <plat/iic-core.h>
#include <plat/keypad-core.h>
+#include <plat/pwm-core.h>
#include <plat/tv-core.h>
#include <plat/spi-core.h>
#include <plat/regs-serial.h>
@@ -148,6 +150,13 @@ void s5pv210_restart(char mode, const char *cmd)
__raw_writel(0x1, S5P_SWRESET);
}
+static struct samsung_pwm_variant s5pv210_pwm_variant = {
+ .bits = 32,
+ .div_base = 0,
+ .has_tint_cstat = true,
+ .tclk_mask = (1 << 5),
+};
+
/*
* s5pv210_map_io
*
@@ -165,6 +174,8 @@ void __init s5pv210_init_io(struct map_desc *mach_desc, int size)
s5p_init_cpu(S5P_VA_CHIPID);
s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+
+ samsung_pwm_set_platdata(&s5pv210_pwm_variant);
}
void __init s5pv210_map_io(void)
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 04/18] clocksource: samsung_pwm_timer: Cache clocksource register address
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (2 preceding siblings ...)
2013-06-20 22:12 ` [PATCH v2 03/18] ARM: SAMSUNG: Set PWM platform data Tomasz Figa
@ 2013-06-20 22:12 ` Tomasz Figa
2013-06-20 22:12 ` [PATCH v2 05/18] clocksource: samsung_pwm_timer: Do not use clocksource_mmio Tomasz Figa
` (16 subsequent siblings)
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:12 UTC (permalink / raw)
To: linux-arm-kernel
Instead of calculating register every time the timer should be read,
we can just do it one time at initialization and store the address in
driver data.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
drivers/clocksource/samsung_pwm_timer.c | 33 ++++++++-------------------------
1 file changed, 8 insertions(+), 25 deletions(-)
diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c
index 553115b..d361b5e 100644
--- a/drivers/clocksource/samsung_pwm_timer.c
+++ b/drivers/clocksource/samsung_pwm_timer.c
@@ -54,6 +54,7 @@ EXPORT_SYMBOL(samsung_pwm_lock);
struct samsung_pwm_clocksource {
void __iomem *base;
+ void __iomem *source_reg;
unsigned int irq[SAMSUNG_PWM_NUM];
struct samsung_pwm_variant variant;
@@ -286,23 +287,6 @@ static void __init samsung_clockevent_init(void)
}
}
-static void __iomem *samsung_timer_reg(void)
-{
- switch (pwm.source_id) {
- case 0:
- case 1:
- case 2:
- case 3:
- return pwm.base + pwm.source_id * 0x0c + 0x14;
-
- case 4:
- return pwm.base + 0x40;
-
- default:
- BUG();
- }
-}
-
/*
* Override the global weak sched_clock symbol with this
* local implementation which uses the clocksource to get some
@@ -312,17 +296,11 @@ static void __iomem *samsung_timer_reg(void)
*/
static u32 notrace samsung_read_sched_clock(void)
{
- void __iomem *reg = samsung_timer_reg();
-
- if (!reg)
- return 0;
-
- return ~__raw_readl(reg);
+ return ~__raw_readl(pwm.source_reg);
}
static void __init samsung_clocksource_init(void)
{
- void __iomem *reg = samsung_timer_reg();
unsigned long pclk;
unsigned long clock_rate;
int ret;
@@ -337,10 +315,15 @@ static void __init samsung_clocksource_init(void)
samsung_time_setup(pwm.source_id, pwm.tcnt_max);
samsung_time_start(pwm.source_id, true);
+ if (pwm.source_id == 4)
+ pwm.source_reg = pwm.base + 0x40;
+ else
+ pwm.source_reg = pwm.base + pwm.source_id * 0x0c + 0x14;
+
setup_sched_clock(samsung_read_sched_clock,
pwm.variant.bits, clock_rate);
- ret = clocksource_mmio_init(reg, "samsung_clocksource_timer",
+ ret = clocksource_mmio_init(pwm.source_reg, "samsung_clocksource_timer",
clock_rate, 250, pwm.variant.bits,
clocksource_mmio_readl_down);
if (ret)
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 05/18] clocksource: samsung_pwm_timer: Do not use clocksource_mmio
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (3 preceding siblings ...)
2013-06-20 22:12 ` [PATCH v2 04/18] clocksource: samsung_pwm_timer: Cache clocksource register address Tomasz Figa
@ 2013-06-20 22:12 ` Tomasz Figa
2013-06-20 22:12 ` [PATCH v2 06/18] clocksource: samsung_pwm_timer: Handle suspend/resume correctly Tomasz Figa
` (15 subsequent siblings)
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:12 UTC (permalink / raw)
To: linux-arm-kernel
In case of Samsung PWM timer, clocksource MMIO can not be used, because
custom suspend/resume callbacks are required.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
drivers/clocksource/samsung_pwm_timer.c | 19 +++++++++++++++----
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c
index d361b5e..ff150d1 100644
--- a/drivers/clocksource/samsung_pwm_timer.c
+++ b/drivers/clocksource/samsung_pwm_timer.c
@@ -287,6 +287,18 @@ static void __init samsung_clockevent_init(void)
}
}
+static cycle_t samsung_clocksource_read(struct clocksource *c)
+{
+ return ~readl_relaxed(pwm.source_reg);
+}
+
+static struct clocksource samsung_clocksource = {
+ .name = "samsung_clocksource_timer",
+ .rating = 250,
+ .read = samsung_clocksource_read,
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
/*
* Override the global weak sched_clock symbol with this
* local implementation which uses the clocksource to get some
@@ -296,7 +308,7 @@ static void __init samsung_clockevent_init(void)
*/
static u32 notrace samsung_read_sched_clock(void)
{
- return ~__raw_readl(pwm.source_reg);
+ return samsung_clocksource_read(NULL);
}
static void __init samsung_clocksource_init(void)
@@ -323,9 +335,8 @@ static void __init samsung_clocksource_init(void)
setup_sched_clock(samsung_read_sched_clock,
pwm.variant.bits, clock_rate);
- ret = clocksource_mmio_init(pwm.source_reg, "samsung_clocksource_timer",
- clock_rate, 250, pwm.variant.bits,
- clocksource_mmio_readl_down);
+ samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits);
+ ret = clocksource_register_hz(&samsung_clocksource, clock_rate);
if (ret)
panic("samsung_clocksource_timer: can't register clocksource\n");
}
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 06/18] clocksource: samsung_pwm_timer: Handle suspend/resume correctly
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (4 preceding siblings ...)
2013-06-20 22:12 ` [PATCH v2 05/18] clocksource: samsung_pwm_timer: Do not use clocksource_mmio Tomasz Figa
@ 2013-06-20 22:12 ` Tomasz Figa
2013-06-20 22:12 ` [PATCH v2 07/18] ARM: SAMSUNG: Move all platforms to new clocksource driver Tomasz Figa
` (14 subsequent siblings)
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:12 UTC (permalink / raw)
To: linux-arm-kernel
Current suspend/resume handling of the driver was broken, because:
- periodic timer was being enabled in CLOCK_EVT_MODE_RESUME mode, which
does not seem to be correct behavior looking at other platforms,
- PWM divisors need to be restored, but they were not,
- clockevent interrupt mask needs to be restored, but it was not,
- clocksource was being restored in clockevent resume callback.
This patch fixes issues mentioned above, making suspend/resume handling
in the driver correct.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
drivers/clocksource/samsung_pwm_timer.c | 42 ++++++++++++++++++++++-----------
1 file changed, 28 insertions(+), 14 deletions(-)
diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c
index ff150d1..2977043 100644
--- a/drivers/clocksource/samsung_pwm_timer.c
+++ b/drivers/clocksource/samsung_pwm_timer.c
@@ -196,17 +196,6 @@ static int samsung_set_next_event(unsigned long cycles,
return 0;
}
-static void samsung_timer_resume(void)
-{
- /* event timer restart */
- samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick - 1);
- samsung_time_start(pwm.event_id, true);
-
- /* source timer restart */
- samsung_time_setup(pwm.source_id, pwm.tcnt_max);
- samsung_time_start(pwm.source_id, true);
-}
-
static void samsung_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
@@ -223,20 +212,29 @@ static void samsung_set_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
- break;
-
case CLOCK_EVT_MODE_RESUME:
- samsung_timer_resume();
break;
}
}
+static void samsung_clockevent_resume(struct clock_event_device *cev)
+{
+ samsung_timer_set_prescale(pwm.event_id, pwm.tscaler_div);
+ samsung_timer_set_divisor(pwm.event_id, pwm.tdiv);
+
+ if (pwm.variant.has_tint_cstat) {
+ u32 mask = (1 << pwm.event_id);
+ writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);
+ }
+}
+
static struct clock_event_device time_event_device = {
.name = "samsung_event_timer",
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
.rating = 200,
.set_next_event = samsung_set_next_event,
.set_mode = samsung_set_mode,
+ .resume = samsung_clockevent_resume,
};
static irqreturn_t samsung_clock_event_isr(int irq, void *dev_id)
@@ -287,6 +285,20 @@ static void __init samsung_clockevent_init(void)
}
}
+static void samsung_clocksource_suspend(struct clocksource *cs)
+{
+ samsung_time_stop(pwm.source_id);
+}
+
+static void samsung_clocksource_resume(struct clocksource *cs)
+{
+ samsung_timer_set_prescale(pwm.source_id, pwm.tscaler_div);
+ samsung_timer_set_divisor(pwm.source_id, pwm.tdiv);
+
+ samsung_time_setup(pwm.source_id, pwm.tcnt_max);
+ samsung_time_start(pwm.source_id, true);
+}
+
static cycle_t samsung_clocksource_read(struct clocksource *c)
{
return ~readl_relaxed(pwm.source_reg);
@@ -296,6 +308,8 @@ static struct clocksource samsung_clocksource = {
.name = "samsung_clocksource_timer",
.rating = 250,
.read = samsung_clocksource_read,
+ .suspend = samsung_clocksource_suspend,
+ .resume = samsung_clocksource_resume,
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 07/18] ARM: SAMSUNG: Move all platforms to new clocksource driver
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (5 preceding siblings ...)
2013-06-20 22:12 ` [PATCH v2 06/18] clocksource: samsung_pwm_timer: Handle suspend/resume correctly Tomasz Figa
@ 2013-06-20 22:12 ` Tomasz Figa
2013-06-24 15:33 ` Kukjin Kim
2013-06-20 22:12 ` [PATCH v2 08/18] ARM: SAMSUNG: Remove old samsung-time driver Tomasz Figa
` (13 subsequent siblings)
20 siblings, 1 reply; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:12 UTC (permalink / raw)
To: linux-arm-kernel
This patch moves all Samsung platforms using PWM clocksource from legacy
samsung-time to new samsung-pwm-timer driver.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
arch/arm/mach-s3c24xx/Kconfig | 12 ++++++------
arch/arm/mach-s3c24xx/common.c | 16 ++++++++++++++++
arch/arm/mach-s3c64xx/Kconfig | 4 ++--
arch/arm/mach-s3c64xx/common.c | 17 +++++++++++++++++
arch/arm/mach-s5p64x0/Kconfig | 4 ++--
arch/arm/mach-s5p64x0/common.c | 17 +++++++++++++++++
arch/arm/mach-s5pc100/Kconfig | 2 +-
arch/arm/mach-s5pc100/common.c | 17 +++++++++++++++++
arch/arm/mach-s5pv210/Kconfig | 2 +-
arch/arm/mach-s5pv210/common.c | 17 +++++++++++++++++
10 files changed, 96 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 6d9252e..46f9a9c 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -30,7 +30,7 @@ config CPU_S3C2410
select S3C2410_CLOCK
select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
select S3C2410_PM if PM
- select SAMSUNG_HRT
+ select CLKSRC_SAMSUNG_PWM
select SAMSUNG_WDT_RESET
help
Support for S3C2410 and S3C2410A family from the S3C24XX line
@@ -42,7 +42,7 @@ config CPU_S3C2412
select CPU_LLSERIAL_S3C2440
select S3C2412_DMA if S3C24XX_DMA
select S3C2412_PM if PM
- select SAMSUNG_HRT
+ select CLKSRC_SAMSUNG_PWM
help
Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
@@ -54,7 +54,7 @@ config CPU_S3C2416
select S3C2443_COMMON
select S3C2443_DMA if S3C24XX_DMA
select SAMSUNG_CLKSRC
- select SAMSUNG_HRT
+ select CLKSRC_SAMSUNG_PWM
help
Support for the S3C2416 SoC from the S3C24XX line
@@ -65,7 +65,7 @@ config CPU_S3C2440
select S3C2410_CLOCK
select S3C2410_PM if PM
select S3C2440_DMA if S3C24XX_DMA
- select SAMSUNG_HRT
+ select CLKSRC_SAMSUNG_PWM
help
Support for S3C2440 Samsung Mobile CPU based systems.
@@ -75,7 +75,7 @@ config CPU_S3C2442
select CPU_LLSERIAL_S3C2440
select S3C2410_CLOCK
select S3C2410_PM if PM
- select SAMSUNG_HRT
+ select CLKSRC_SAMSUNG_PWM
help
Support for S3C2442 Samsung Mobile CPU based systems.
@@ -91,7 +91,7 @@ config CPU_S3C2443
select S3C2443_COMMON
select S3C2443_DMA if S3C24XX_DMA
select SAMSUNG_CLKSRC
- select SAMSUNG_HRT
+ select CLKSRC_SAMSUNG_PWM
help
Support for the S3C2443 SoC from the S3C24XX line
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index e5e7d7d..457261c 100644
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -245,6 +245,22 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
samsung_pwm_set_platdata(&s3c24xx_pwm_variant);
}
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+ s3c24xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+ s3c24xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+ unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+ IRQ_TIMER0, IRQ_TIMER1, IRQ_TIMER2, IRQ_TIMER3, IRQ_TIMER4,
+ };
+
+ samsung_pwm_clocksource_init(S3C_VA_TIMER,
+ timer_irqs, &s3c24xx_pwm_variant);
+}
+
/* Serial port registrations */
#define S3C2410_PA_UART0 (S3C24XX_PA_UART)
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 2057853..f78a6a0 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -17,13 +17,13 @@ config PLAT_S3C64XX
# Configuration options for the S3C6410 CPU
config CPU_S3C6400
- select SAMSUNG_HRT
+ select CLKSRC_SAMSUNG_PWM
bool
help
Enable S3C6400 CPU support
config CPU_S3C6410
- select SAMSUNG_HRT
+ select CLKSRC_SAMSUNG_PWM
bool
help
Enable S3C6410 CPU support
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index 0ab97c3..91df45a 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -157,6 +157,23 @@ static struct samsung_pwm_variant s3c64xx_pwm_variant = {
.tclk_mask = (1 << 7) | (1 << 6) | (1 << 5),
};
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+ s3c64xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+ s3c64xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+ unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+ IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+ IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+ };
+
+ samsung_pwm_clocksource_init(S3C_VA_TIMER,
+ timer_irqs, &s3c64xx_pwm_variant);
+}
+
/* read cpu identification code */
void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
index 5a707bd..a39cd9e 100644
--- a/arch/arm/mach-s5p64x0/Kconfig
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -11,14 +11,14 @@ config CPU_S5P6440
bool
select S5P_SLEEP if PM
select SAMSUNG_DMADEV
- select SAMSUNG_HRT
+ select CLKSRC_SAMSUNG_PWM
select SAMSUNG_WAKEMASK if PM
help
Enable S5P6440 CPU support
config CPU_S5P6450
bool
- select SAMSUNG_HRT
+ select CLKSRC_SAMSUNG_PWM
select S5P_SLEEP if PM
select SAMSUNG_DMADEV
select SAMSUNG_WAKEMASK if PM
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index c14d719..6ee5638 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -165,6 +165,23 @@ static struct samsung_pwm_variant s5p64x0_pwm_variant = {
.tclk_mask = 0,
};
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+ s5p64x0_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+ s5p64x0_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+ unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+ IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+ IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+ };
+
+ samsung_pwm_clocksource_init(S3C_VA_TIMER,
+ timer_irqs, &s5p64x0_pwm_variant);
+}
+
/*
* s5p64x0_map_io
*
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index 2f456a4..2094a9b 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -11,7 +11,7 @@ config CPU_S5PC100
bool
select S5P_EXT_INT
select SAMSUNG_DMADEV
- select SAMSUNG_HRT
+ select CLKSRC_SAMSUNG_PWM
help
Enable S5PC100 CPU support
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c
index a62e8a4..544a9c6 100644
--- a/arch/arm/mach-s5pc100/common.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -140,6 +140,23 @@ static struct samsung_pwm_variant s5pc100_pwm_variant = {
.tclk_mask = (1 << 5),
};
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+ s5pc100_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+ s5pc100_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+ unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+ IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+ IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+ };
+
+ samsung_pwm_clocksource_init(S3C_VA_TIMER,
+ timer_irqs, &s5pc100_pwm_variant);
+}
+
/*
* s5pc100_map_io
*
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 0963283..07cdff7 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -15,7 +15,7 @@ config CPU_S5PV210
select S5P_PM if PM
select S5P_SLEEP if PM
select SAMSUNG_DMADEV
- select SAMSUNG_HRT
+ select CLKSRC_SAMSUNG_PWM
help
Enable S5PV210 CPU support
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index 4eba33d..d28affb 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -157,6 +157,23 @@ static struct samsung_pwm_variant s5pv210_pwm_variant = {
.tclk_mask = (1 << 5),
};
+void __init samsung_set_timer_source(unsigned int event, unsigned int source)
+{
+ s5pv210_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+ s5pv210_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
+}
+
+void __init samsung_timer_init(void)
+{
+ unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+ IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
+ IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
+ };
+
+ samsung_pwm_clocksource_init(S3C_VA_TIMER,
+ timer_irqs, &s5pv210_pwm_variant);
+}
+
/*
* s5pv210_map_io
*
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 07/18] ARM: SAMSUNG: Move all platforms to new clocksource driver
2013-06-20 22:12 ` [PATCH v2 07/18] ARM: SAMSUNG: Move all platforms to new clocksource driver Tomasz Figa
@ 2013-06-24 15:33 ` Kukjin Kim
2013-06-24 15:38 ` Tomasz Figa
0 siblings, 1 reply; 45+ messages in thread
From: Kukjin Kim @ 2013-06-24 15:33 UTC (permalink / raw)
To: linux-arm-kernel
On 06/21/13 07:12, Tomasz Figa wrote:
> This patch moves all Samsung platforms using PWM clocksource from legacy
> samsung-time to new samsung-pwm-timer driver.
>
> Signed-off-by: Tomasz Figa<tomasz.figa@gmail.com>
> ---
> arch/arm/mach-s3c24xx/Kconfig | 12 ++++++------
> arch/arm/mach-s3c24xx/common.c | 16 ++++++++++++++++
> arch/arm/mach-s3c64xx/Kconfig | 4 ++--
> arch/arm/mach-s3c64xx/common.c | 17 +++++++++++++++++
> arch/arm/mach-s5p64x0/Kconfig | 4 ++--
> arch/arm/mach-s5p64x0/common.c | 17 +++++++++++++++++
> arch/arm/mach-s5pc100/Kconfig | 2 +-
> arch/arm/mach-s5pc100/common.c | 17 +++++++++++++++++
> arch/arm/mach-s5pv210/Kconfig | 2 +-
> arch/arm/mach-s5pv210/common.c | 17 +++++++++++++++++
> 10 files changed, 96 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
> index 6d9252e..46f9a9c 100644
> --- a/arch/arm/mach-s3c24xx/Kconfig
> +++ b/arch/arm/mach-s3c24xx/Kconfig
> @@ -30,7 +30,7 @@ config CPU_S3C2410
> select S3C2410_CLOCK
> select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
> select S3C2410_PM if PM
> - select SAMSUNG_HRT
> + select CLKSRC_SAMSUNG_PWM
Please put this in alphabetical ordering, this is just replacing though.
> select SAMSUNG_WDT_RESET
> help
> Support for S3C2410 and S3C2410A family from the S3C24XX line
> @@ -42,7 +42,7 @@ config CPU_S3C2412
> select CPU_LLSERIAL_S3C2440
> select S3C2412_DMA if S3C24XX_DMA
> select S3C2412_PM if PM
> - select SAMSUNG_HRT
> + select CLKSRC_SAMSUNG_PWM
Same as above.
> help
> Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
>
> @@ -54,7 +54,7 @@ config CPU_S3C2416
> select S3C2443_COMMON
> select S3C2443_DMA if S3C24XX_DMA
> select SAMSUNG_CLKSRC
> - select SAMSUNG_HRT
> + select CLKSRC_SAMSUNG_PWM
Same as above.
> help
> Support for the S3C2416 SoC from the S3C24XX line
>
> @@ -65,7 +65,7 @@ config CPU_S3C2440
> select S3C2410_CLOCK
> select S3C2410_PM if PM
> select S3C2440_DMA if S3C24XX_DMA
> - select SAMSUNG_HRT
> + select CLKSRC_SAMSUNG_PWM
Same as above.
> help
> Support for S3C2440 Samsung Mobile CPU based systems.
>
> @@ -75,7 +75,7 @@ config CPU_S3C2442
> select CPU_LLSERIAL_S3C2440
> select S3C2410_CLOCK
> select S3C2410_PM if PM
> - select SAMSUNG_HRT
> + select CLKSRC_SAMSUNG_PWM
Same.
> help
> Support for S3C2442 Samsung Mobile CPU based systems.
>
> @@ -91,7 +91,7 @@ config CPU_S3C2443
> select S3C2443_COMMON
> select S3C2443_DMA if S3C24XX_DMA
> select SAMSUNG_CLKSRC
> - select SAMSUNG_HRT
> + select CLKSRC_SAMSUNG_PWM
Same.
[...]
>
> config CPU_S3C6400
> - select SAMSUNG_HRT
> + select CLKSRC_SAMSUNG_PWM
Same.
> bool
> help
> Enable S3C6400 CPU support
>
> config CPU_S3C6410
> - select SAMSUNG_HRT
> + select CLKSRC_SAMSUNG_PWM
Same.
> bool
> help
> Enable S3C6410 CPU support
[...]
> @@ -11,14 +11,14 @@ config CPU_S5P6440
> bool
> select S5P_SLEEP if PM
> select SAMSUNG_DMADEV
> - select SAMSUNG_HRT
> + select CLKSRC_SAMSUNG_PWM
Same.
> select SAMSUNG_WAKEMASK if PM
> help
> Enable S5P6440 CPU support
>
> config CPU_S5P6450
> bool
> - select SAMSUNG_HRT
> + select CLKSRC_SAMSUNG_PWM
Same.
[...]
> @@ -11,7 +11,7 @@ config CPU_S5PC100
> bool
> select S5P_EXT_INT
> select SAMSUNG_DMADEV
> - select SAMSUNG_HRT
> + select CLKSRC_SAMSUNG_PWM
Same.
[...]
> @@ -15,7 +15,7 @@ config CPU_S5PV210
> select S5P_PM if PM
> select S5P_SLEEP if PM
> select SAMSUNG_DMADEV
> - select SAMSUNG_HRT
> + select CLKSRC_SAMSUNG_PWM
Same.
[...]
Let me fix it...
- Kukjin
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v2 07/18] ARM: SAMSUNG: Move all platforms to new clocksource driver
2013-06-24 15:33 ` Kukjin Kim
@ 2013-06-24 15:38 ` Tomasz Figa
2013-06-24 15:46 ` Kukjin Kim
0 siblings, 1 reply; 45+ messages in thread
From: Tomasz Figa @ 2013-06-24 15:38 UTC (permalink / raw)
To: linux-arm-kernel
On Tuesday 25 of June 2013 00:33:01 Kukjin Kim wrote:
> On 06/21/13 07:12, Tomasz Figa wrote:
> > This patch moves all Samsung platforms using PWM clocksource from
> > legacy samsung-time to new samsung-pwm-timer driver.
> >
> > Signed-off-by: Tomasz Figa<tomasz.figa@gmail.com>
> > ---
> >
> > arch/arm/mach-s3c24xx/Kconfig | 12 ++++++------
> > arch/arm/mach-s3c24xx/common.c | 16 ++++++++++++++++
> > arch/arm/mach-s3c64xx/Kconfig | 4 ++--
> > arch/arm/mach-s3c64xx/common.c | 17 +++++++++++++++++
> > arch/arm/mach-s5p64x0/Kconfig | 4 ++--
> > arch/arm/mach-s5p64x0/common.c | 17 +++++++++++++++++
> > arch/arm/mach-s5pc100/Kconfig | 2 +-
> > arch/arm/mach-s5pc100/common.c | 17 +++++++++++++++++
> > arch/arm/mach-s5pv210/Kconfig | 2 +-
> > arch/arm/mach-s5pv210/common.c | 17 +++++++++++++++++
> > 10 files changed, 96 insertions(+), 12 deletions(-)
> >
> > diff --git a/arch/arm/mach-s3c24xx/Kconfig
> > b/arch/arm/mach-s3c24xx/Kconfig index 6d9252e..46f9a9c 100644
> > --- a/arch/arm/mach-s3c24xx/Kconfig
> > +++ b/arch/arm/mach-s3c24xx/Kconfig
> > @@ -30,7 +30,7 @@ config CPU_S3C2410
> >
> > select S3C2410_CLOCK
> > select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
> > select S3C2410_PM if PM
> >
> > - select SAMSUNG_HRT
> > + select CLKSRC_SAMSUNG_PWM
>
> Please put this in alphabetical ordering, this is just replacing though.
Argh, I always forget about this ordering, sorry.
> > select SAMSUNG_WDT_RESET
> > help
> >
> > Support for S3C2410 and S3C2410A family from the S3C24XX line
> >
> > @@ -42,7 +42,7 @@ config CPU_S3C2412
> >
> > select CPU_LLSERIAL_S3C2440
> > select S3C2412_DMA if S3C24XX_DMA
> > select S3C2412_PM if PM
> >
> > - select SAMSUNG_HRT
> > + select CLKSRC_SAMSUNG_PWM
>
> Same as above.
>
> > help
> >
> > Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
> >
> > @@ -54,7 +54,7 @@ config CPU_S3C2416
> >
> > select S3C2443_COMMON
> > select S3C2443_DMA if S3C24XX_DMA
> > select SAMSUNG_CLKSRC
> >
> > - select SAMSUNG_HRT
> > + select CLKSRC_SAMSUNG_PWM
>
> Same as above.
>
> > help
> >
> > Support for the S3C2416 SoC from the S3C24XX line
> >
> > @@ -65,7 +65,7 @@ config CPU_S3C2440
> >
> > select S3C2410_CLOCK
> > select S3C2410_PM if PM
> > select S3C2440_DMA if S3C24XX_DMA
> >
> > - select SAMSUNG_HRT
> > + select CLKSRC_SAMSUNG_PWM
>
> Same as above.
>
> > help
> >
> > Support for S3C2440 Samsung Mobile CPU based systems.
> >
> > @@ -75,7 +75,7 @@ config CPU_S3C2442
> >
> > select CPU_LLSERIAL_S3C2440
> > select S3C2410_CLOCK
> > select S3C2410_PM if PM
> >
> > - select SAMSUNG_HRT
> > + select CLKSRC_SAMSUNG_PWM
>
> Same.
>
> > help
> >
> > Support for S3C2442 Samsung Mobile CPU based systems.
> >
> > @@ -91,7 +91,7 @@ config CPU_S3C2443
> >
> > select S3C2443_COMMON
> > select S3C2443_DMA if S3C24XX_DMA
> > select SAMSUNG_CLKSRC
> >
> > - select SAMSUNG_HRT
> > + select CLKSRC_SAMSUNG_PWM
>
> Same.
>
> [...]
>
> > config CPU_S3C6400
> >
> > - select SAMSUNG_HRT
> > + select CLKSRC_SAMSUNG_PWM
>
> Same.
>
> > bool
> > help
> >
> > Enable S3C6400 CPU support
> >
> > config CPU_S3C6410
> >
> > - select SAMSUNG_HRT
> > + select CLKSRC_SAMSUNG_PWM
>
> Same.
>
> > bool
> > help
> >
> > Enable S3C6410 CPU support
>
> [...]
>
> > @@ -11,14 +11,14 @@ config CPU_S5P6440
> >
> > bool
> > select S5P_SLEEP if PM
> > select SAMSUNG_DMADEV
> >
> > - select SAMSUNG_HRT
> > + select CLKSRC_SAMSUNG_PWM
>
> Same.
>
> > select SAMSUNG_WAKEMASK if PM
> > help
> >
> > Enable S5P6440 CPU support
> >
> > config CPU_S5P6450
> >
> > bool
> >
> > - select SAMSUNG_HRT
> > + select CLKSRC_SAMSUNG_PWM
>
> Same.
>
> [...]
>
> > @@ -11,7 +11,7 @@ config CPU_S5PC100
> >
> > bool
> > select S5P_EXT_INT
> > select SAMSUNG_DMADEV
> >
> > - select SAMSUNG_HRT
> > + select CLKSRC_SAMSUNG_PWM
>
> Same.
>
> [...]
>
> > @@ -15,7 +15,7 @@ config CPU_S5PV210
> >
> > select S5P_PM if PM
> > select S5P_SLEEP if PM
> > select SAMSUNG_DMADEV
> >
> > - select SAMSUNG_HRT
> > + select CLKSRC_SAMSUNG_PWM
>
> Same.
>
> [...]
>
> Let me fix it...
Thanks.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v2 07/18] ARM: SAMSUNG: Move all platforms to new clocksource driver
2013-06-24 15:38 ` Tomasz Figa
@ 2013-06-24 15:46 ` Kukjin Kim
2013-06-24 15:49 ` Tomasz Figa
0 siblings, 1 reply; 45+ messages in thread
From: Kukjin Kim @ 2013-06-24 15:46 UTC (permalink / raw)
To: linux-arm-kernel
On 06/25/13 00:38, Tomasz Figa wrote:
[...]
>>> - select SAMSUNG_HRT
>>> + select CLKSRC_SAMSUNG_PWM
>>
>> Please put this in alphabetical ordering, this is just replacing though.
>
> Argh, I always forget about this ordering, sorry.
>
no problem ;-)
[...]
>> Let me fix it...
like following :-)
8<----------------------------------------------
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 49d993c..734d85b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -694,6 +694,7 @@ config ARCH_S3C24XX
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select CLKSRC_MMIO
+ select CLKSRC_SAMSUNG_PWM
select GENERIC_CLOCKEVENTS
select HAVE_CLK
select HAVE_S3C2410_I2C if I2C
@@ -715,6 +716,7 @@ config ARCH_S3C64XX
select ARM_VIC
select CLKDEV_LOOKUP
select CLKSRC_MMIO
+ select CLKSRC_SAMSUNG_PWM
select CPU_V6
select GENERIC_CLOCKEVENTS
select HAVE_CLK
@@ -737,6 +739,7 @@ config ARCH_S5P64X0
bool "Samsung S5P6440 S5P6450"
select CLKDEV_LOOKUP
select CLKSRC_MMIO
+ select CLKSRC_SAMSUNG_PWM
select CPU_V6
select GENERIC_CLOCKEVENTS
select HAVE_CLK
@@ -753,6 +756,7 @@ config ARCH_S5PC100
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select CLKSRC_MMIO
+ select CLKSRC_SAMSUNG_PWM
select CPU_V7
select GENERIC_CLOCKEVENTS
select HAVE_CLK
@@ -770,6 +774,7 @@ config ARCH_S5PV210
select ARCH_SPARSEMEM_ENABLE
select CLKDEV_LOOKUP
select CLKSRC_MMIO
+ select CLKSRC_SAMSUNG_PWM
select CPU_V7
select GENERIC_CLOCKEVENTS
select HAVE_CLK
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index f2f7088..8124ec7 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -30,7 +30,6 @@ config CPU_S3C2410
select S3C2410_CLOCK
select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX
select S3C2410_PM if PM
- select SAMSUNG_HRT
help
Support for S3C2410 and S3C2410A family from the S3C24XX line
of Samsung Mobile CPUs.
@@ -41,7 +40,6 @@ config CPU_S3C2412
select CPU_LLSERIAL_S3C2440
select S3C2412_DMA if S3C24XX_DMA
select S3C2412_PM if PM
- select SAMSUNG_HRT
help
Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
@@ -53,7 +51,6 @@ config CPU_S3C2416
select S3C2443_COMMON
select S3C2443_DMA if S3C24XX_DMA
select SAMSUNG_CLKSRC
- select SAMSUNG_HRT
help
Support for the S3C2416 SoC from the S3C24XX line
@@ -64,7 +61,6 @@ config CPU_S3C2440
select S3C2410_CLOCK
select S3C2410_PM if PM
select S3C2440_DMA if S3C24XX_DMA
- select SAMSUNG_HRT
help
Support for S3C2440 Samsung Mobile CPU based systems.
@@ -74,7 +70,6 @@ config CPU_S3C2442
select CPU_LLSERIAL_S3C2440
select S3C2410_CLOCK
select S3C2410_PM if PM
- select SAMSUNG_HRT
help
Support for S3C2442 Samsung Mobile CPU based systems.
@@ -89,7 +84,6 @@ config CPU_S3C2443
select S3C2443_COMMON
select S3C2443_DMA if S3C24XX_DMA
select SAMSUNG_CLKSRC
- select SAMSUNG_HRT
help
Support for the S3C2443 SoC from the S3C24XX line
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 2057853..041da51 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -17,13 +17,11 @@ config PLAT_S3C64XX
# Configuration options for the S3C6410 CPU
config CPU_S3C6400
- select SAMSUNG_HRT
bool
help
Enable S3C6400 CPU support
config CPU_S3C6410
- select SAMSUNG_HRT
bool
help
Enable S3C6410 CPU support
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
index 5a707bd..bb2111b 100644
--- a/arch/arm/mach-s5p64x0/Kconfig
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -11,14 +11,12 @@ config CPU_S5P6440
bool
select S5P_SLEEP if PM
select SAMSUNG_DMADEV
- select SAMSUNG_HRT
select SAMSUNG_WAKEMASK if PM
help
Enable S5P6440 CPU support
config CPU_S5P6450
bool
- select SAMSUNG_HRT
select S5P_SLEEP if PM
select SAMSUNG_DMADEV
select SAMSUNG_WAKEMASK if PM
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index 2f456a4..15170be 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -11,7 +11,6 @@ config CPU_S5PC100
bool
select S5P_EXT_INT
select SAMSUNG_DMADEV
- select SAMSUNG_HRT
help
Enable S5PC100 CPU support
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 0963283..caaedaf 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -15,7 +15,6 @@ config CPU_S5PV210
select S5P_PM if PM
select S5P_SLEEP if PM
select SAMSUNG_DMADEV
- select SAMSUNG_HRT
help
Enable S5PV210 CPU support
--
Thanks.
- Kukjin
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v2 07/18] ARM: SAMSUNG: Move all platforms to new clocksource driver
2013-06-24 15:46 ` Kukjin Kim
@ 2013-06-24 15:49 ` Tomasz Figa
0 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-24 15:49 UTC (permalink / raw)
To: linux-arm-kernel
On Tuesday 25 of June 2013 00:46:06 Kukjin Kim wrote:
> On 06/25/13 00:38, Tomasz Figa wrote:
>
> [...]
>
> >>> - select SAMSUNG_HRT
> >>> + select CLKSRC_SAMSUNG_PWM
> >>
> >> Please put this in alphabetical ordering, this is just replacing
> >> though.>
> > Argh, I always forget about this ordering, sorry.
>
> no problem ;-)
>
> [...]
>
> >> Let me fix it...
>
> like following :-)
>
> 8<----------------------------------------------
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 49d993c..734d85b 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -694,6 +694,7 @@ config ARCH_S3C24XX
> select ARCH_REQUIRE_GPIOLIB
> select CLKDEV_LOOKUP
> select CLKSRC_MMIO
> + select CLKSRC_SAMSUNG_PWM
> select GENERIC_CLOCKEVENTS
> select HAVE_CLK
> select HAVE_S3C2410_I2C if I2C
> @@ -715,6 +716,7 @@ config ARCH_S3C64XX
> select ARM_VIC
> select CLKDEV_LOOKUP
> select CLKSRC_MMIO
> + select CLKSRC_SAMSUNG_PWM
> select CPU_V6
> select GENERIC_CLOCKEVENTS
> select HAVE_CLK
> @@ -737,6 +739,7 @@ config ARCH_S5P64X0
> bool "Samsung S5P6440 S5P6450"
> select CLKDEV_LOOKUP
> select CLKSRC_MMIO
> + select CLKSRC_SAMSUNG_PWM
> select CPU_V6
> select GENERIC_CLOCKEVENTS
> select HAVE_CLK
> @@ -753,6 +756,7 @@ config ARCH_S5PC100
> select ARCH_REQUIRE_GPIOLIB
> select CLKDEV_LOOKUP
> select CLKSRC_MMIO
> + select CLKSRC_SAMSUNG_PWM
> select CPU_V7
> select GENERIC_CLOCKEVENTS
> select HAVE_CLK
> @@ -770,6 +774,7 @@ config ARCH_S5PV210
> select ARCH_SPARSEMEM_ENABLE
> select CLKDEV_LOOKUP
> select CLKSRC_MMIO
> + select CLKSRC_SAMSUNG_PWM
> select CPU_V7
> select GENERIC_CLOCKEVENTS
> select HAVE_CLK
> diff --git a/arch/arm/mach-s3c24xx/Kconfig
> b/arch/arm/mach-s3c24xx/Kconfig index f2f7088..8124ec7 100644
> --- a/arch/arm/mach-s3c24xx/Kconfig
> +++ b/arch/arm/mach-s3c24xx/Kconfig
> @@ -30,7 +30,6 @@ config CPU_S3C2410
> select S3C2410_CLOCK
> select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX
> select S3C2410_PM if PM
> - select SAMSUNG_HRT
> help
> Support for S3C2410 and S3C2410A family from the S3C24XX line
> of Samsung Mobile CPUs.
> @@ -41,7 +40,6 @@ config CPU_S3C2412
> select CPU_LLSERIAL_S3C2440
> select S3C2412_DMA if S3C24XX_DMA
> select S3C2412_PM if PM
> - select SAMSUNG_HRT
> help
> Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
>
> @@ -53,7 +51,6 @@ config CPU_S3C2416
> select S3C2443_COMMON
> select S3C2443_DMA if S3C24XX_DMA
> select SAMSUNG_CLKSRC
> - select SAMSUNG_HRT
> help
> Support for the S3C2416 SoC from the S3C24XX line
>
> @@ -64,7 +61,6 @@ config CPU_S3C2440
> select S3C2410_CLOCK
> select S3C2410_PM if PM
> select S3C2440_DMA if S3C24XX_DMA
> - select SAMSUNG_HRT
> help
> Support for S3C2440 Samsung Mobile CPU based systems.
>
> @@ -74,7 +70,6 @@ config CPU_S3C2442
> select CPU_LLSERIAL_S3C2440
> select S3C2410_CLOCK
> select S3C2410_PM if PM
> - select SAMSUNG_HRT
> help
> Support for S3C2442 Samsung Mobile CPU based systems.
>
> @@ -89,7 +84,6 @@ config CPU_S3C2443
> select S3C2443_COMMON
> select S3C2443_DMA if S3C24XX_DMA
> select SAMSUNG_CLKSRC
> - select SAMSUNG_HRT
> help
> Support for the S3C2443 SoC from the S3C24XX line
>
> diff --git a/arch/arm/mach-s3c64xx/Kconfig
> b/arch/arm/mach-s3c64xx/Kconfig index 2057853..041da51 100644
> --- a/arch/arm/mach-s3c64xx/Kconfig
> +++ b/arch/arm/mach-s3c64xx/Kconfig
> @@ -17,13 +17,11 @@ config PLAT_S3C64XX
> # Configuration options for the S3C6410 CPU
>
> config CPU_S3C6400
> - select SAMSUNG_HRT
> bool
> help
> Enable S3C6400 CPU support
>
> config CPU_S3C6410
> - select SAMSUNG_HRT
> bool
> help
> Enable S3C6410 CPU support
> diff --git a/arch/arm/mach-s5p64x0/Kconfig
> b/arch/arm/mach-s5p64x0/Kconfig index 5a707bd..bb2111b 100644
> --- a/arch/arm/mach-s5p64x0/Kconfig
> +++ b/arch/arm/mach-s5p64x0/Kconfig
> @@ -11,14 +11,12 @@ config CPU_S5P6440
> bool
> select S5P_SLEEP if PM
> select SAMSUNG_DMADEV
> - select SAMSUNG_HRT
> select SAMSUNG_WAKEMASK if PM
> help
> Enable S5P6440 CPU support
>
> config CPU_S5P6450
> bool
> - select SAMSUNG_HRT
> select S5P_SLEEP if PM
> select SAMSUNG_DMADEV
> select SAMSUNG_WAKEMASK if PM
> diff --git a/arch/arm/mach-s5pc100/Kconfig
> b/arch/arm/mach-s5pc100/Kconfig index 2f456a4..15170be 100644
> --- a/arch/arm/mach-s5pc100/Kconfig
> +++ b/arch/arm/mach-s5pc100/Kconfig
> @@ -11,7 +11,6 @@ config CPU_S5PC100
> bool
> select S5P_EXT_INT
> select SAMSUNG_DMADEV
> - select SAMSUNG_HRT
> help
> Enable S5PC100 CPU support
>
> diff --git a/arch/arm/mach-s5pv210/Kconfig
> b/arch/arm/mach-s5pv210/Kconfig index 0963283..caaedaf 100644
> --- a/arch/arm/mach-s5pv210/Kconfig
> +++ b/arch/arm/mach-s5pv210/Kconfig
> @@ -15,7 +15,6 @@ config CPU_S5PV210
> select S5P_PM if PM
> select S5P_SLEEP if PM
> select SAMSUNG_DMADEV
> - select SAMSUNG_HRT
> help
> Enable S5PV210 CPU support
Looks good, thanks.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v2 08/18] ARM: SAMSUNG: Remove old samsung-time driver
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (6 preceding siblings ...)
2013-06-20 22:12 ` [PATCH v2 07/18] ARM: SAMSUNG: Move all platforms to new clocksource driver Tomasz Figa
@ 2013-06-20 22:12 ` Tomasz Figa
2013-06-20 22:12 ` [PATCH v2 09/18] ARM: SAMSUNG: Remove unused PWM timer IRQ chip code Tomasz Figa
` (12 subsequent siblings)
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:12 UTC (permalink / raw)
To: linux-arm-kernel
This patch removes the old samsung-time driver, since all its users have
been migrated to the new samsung_pwm_timer clocksource driver.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
arch/arm/plat-samsung/Kconfig | 8 -
arch/arm/plat-samsung/Makefile | 1 -
arch/arm/plat-samsung/include/plat/samsung-time.h | 23 --
arch/arm/plat-samsung/samsung-time.c | 394 ----------------------
4 files changed, 426 deletions(-)
delete mode 100644 arch/arm/plat-samsung/samsung-time.c
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 3dc5cbe..3e880b7 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -72,14 +72,6 @@ config SAMSUNG_ATAGS
if SAMSUNG_ATAGS
-# timer options
-
-config SAMSUNG_HRT
- bool
- select SAMSUNG_DEV_PWM
- help
- Use the High Resolution timer support
-
# clock options
config SAMSUNG_CLOCK
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 98d07d8..cf41bf9 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -12,7 +12,6 @@ obj- :=
# Objects we always build independent of SoC choice
obj-y += init.o cpu.o
-obj-$(CONFIG_SAMSUNG_HRT) += samsung-time.o
obj-$(CONFIG_SAMSUNG_CLOCK) += clock.o
obj-$(CONFIG_SAMSUNG_CLOCK) += pwm-clock.o
diff --git a/arch/arm/plat-samsung/include/plat/samsung-time.h b/arch/arm/plat-samsung/include/plat/samsung-time.h
index 4cc99bb..209464a 100644
--- a/arch/arm/plat-samsung/include/plat/samsung-time.h
+++ b/arch/arm/plat-samsung/include/plat/samsung-time.h
@@ -22,29 +22,6 @@ enum samsung_timer_mode {
SAMSUNG_PWM4,
};
-struct samsung_timer_source {
- unsigned int event_id;
- unsigned int source_id;
-};
-
-/* Be able to sleep for atleast 4 seconds (usually more) */
-#define SAMSUNG_TIMER_MIN_RANGE 4
-
-#if defined(CONFIG_ARCH_S3C24XX) || defined(CONFIG_ARCH_S5PC100)
-#define TCNT_MAX 0xffff
-#define TSCALER_DIV 25
-#define TDIV 50
-#define TSIZE 16
-#else
-#define TCNT_MAX 0xffffffff
-#define TSCALER_DIV 2
-#define TDIV 2
-#define TSIZE 32
-#endif
-
-#define NON_PERIODIC 0
-#define PERIODIC 1
-
extern void __init samsung_set_timer_source(enum samsung_timer_mode event,
enum samsung_timer_mode source);
diff --git a/arch/arm/plat-samsung/samsung-time.c b/arch/arm/plat-samsung/samsung-time.c
deleted file mode 100644
index f899cbc..0000000
--- a/arch/arm/plat-samsung/samsung-time.c
+++ /dev/null
@@ -1,394 +0,0 @@
-/*
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * samsung - Common hr-timer support (s3c and s5p)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/clockchips.h>
-#include <linux/platform_device.h>
-
-#include <asm/smp_twd.h>
-#include <asm/mach/time.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/sched_clock.h>
-
-#include <mach/map.h>
-#include <plat/devs.h>
-#include <plat/regs-timer.h>
-#include <plat/samsung-time.h>
-
-static struct clk *tin_event;
-static struct clk *tin_source;
-static struct clk *tdiv_event;
-static struct clk *tdiv_source;
-static struct clk *timerclk;
-static struct samsung_timer_source timer_source;
-static unsigned long clock_count_per_tick;
-static void samsung_timer_resume(void);
-
-static void samsung_time_stop(enum samsung_timer_mode mode)
-{
- unsigned long tcon;
-
- tcon = __raw_readl(S3C2410_TCON);
-
- switch (mode) {
- case SAMSUNG_PWM0:
- tcon &= ~S3C2410_TCON_T0START;
- break;
-
- case SAMSUNG_PWM1:
- tcon &= ~S3C2410_TCON_T1START;
- break;
-
- case SAMSUNG_PWM2:
- tcon &= ~S3C2410_TCON_T2START;
- break;
-
- case SAMSUNG_PWM3:
- tcon &= ~S3C2410_TCON_T3START;
- break;
-
- case SAMSUNG_PWM4:
- tcon &= ~S3C2410_TCON_T4START;
- break;
-
- default:
- printk(KERN_ERR "Invalid Timer %d\n", mode);
- break;
- }
- __raw_writel(tcon, S3C2410_TCON);
-}
-
-static void samsung_time_setup(enum samsung_timer_mode mode, unsigned long tcnt)
-{
- unsigned long tcon;
-
- tcon = __raw_readl(S3C2410_TCON);
-
- tcnt--;
-
- switch (mode) {
- case SAMSUNG_PWM0:
- tcon &= ~(0x0f << 0);
- tcon |= S3C2410_TCON_T0MANUALUPD;
- break;
-
- case SAMSUNG_PWM1:
- tcon &= ~(0x0f << 8);
- tcon |= S3C2410_TCON_T1MANUALUPD;
- break;
-
- case SAMSUNG_PWM2:
- tcon &= ~(0x0f << 12);
- tcon |= S3C2410_TCON_T2MANUALUPD;
- break;
-
- case SAMSUNG_PWM3:
- tcon &= ~(0x0f << 16);
- tcon |= S3C2410_TCON_T3MANUALUPD;
- break;
-
- case SAMSUNG_PWM4:
- tcon &= ~(0x07 << 20);
- tcon |= S3C2410_TCON_T4MANUALUPD;
- break;
-
- default:
- printk(KERN_ERR "Invalid Timer %d\n", mode);
- break;
- }
-
- __raw_writel(tcnt, S3C2410_TCNTB(mode));
- __raw_writel(tcnt, S3C2410_TCMPB(mode));
- __raw_writel(tcon, S3C2410_TCON);
-}
-
-static void samsung_time_start(enum samsung_timer_mode mode, bool periodic)
-{
- unsigned long tcon;
-
- tcon = __raw_readl(S3C2410_TCON);
-
- switch (mode) {
- case SAMSUNG_PWM0:
- tcon |= S3C2410_TCON_T0START;
- tcon &= ~S3C2410_TCON_T0MANUALUPD;
-
- if (periodic)
- tcon |= S3C2410_TCON_T0RELOAD;
- else
- tcon &= ~S3C2410_TCON_T0RELOAD;
- break;
-
- case SAMSUNG_PWM1:
- tcon |= S3C2410_TCON_T1START;
- tcon &= ~S3C2410_TCON_T1MANUALUPD;
-
- if (periodic)
- tcon |= S3C2410_TCON_T1RELOAD;
- else
- tcon &= ~S3C2410_TCON_T1RELOAD;
- break;
-
- case SAMSUNG_PWM2:
- tcon |= S3C2410_TCON_T2START;
- tcon &= ~S3C2410_TCON_T2MANUALUPD;
-
- if (periodic)
- tcon |= S3C2410_TCON_T2RELOAD;
- else
- tcon &= ~S3C2410_TCON_T2RELOAD;
- break;
-
- case SAMSUNG_PWM3:
- tcon |= S3C2410_TCON_T3START;
- tcon &= ~S3C2410_TCON_T3MANUALUPD;
-
- if (periodic)
- tcon |= S3C2410_TCON_T3RELOAD;
- else
- tcon &= ~S3C2410_TCON_T3RELOAD;
- break;
-
- case SAMSUNG_PWM4:
- tcon |= S3C2410_TCON_T4START;
- tcon &= ~S3C2410_TCON_T4MANUALUPD;
-
- if (periodic)
- tcon |= S3C2410_TCON_T4RELOAD;
- else
- tcon &= ~S3C2410_TCON_T4RELOAD;
- break;
-
- default:
- printk(KERN_ERR "Invalid Timer %d\n", mode);
- break;
- }
- __raw_writel(tcon, S3C2410_TCON);
-}
-
-static int samsung_set_next_event(unsigned long cycles,
- struct clock_event_device *evt)
-{
- samsung_time_setup(timer_source.event_id, cycles);
- samsung_time_start(timer_source.event_id, NON_PERIODIC);
-
- return 0;
-}
-
-static void samsung_set_mode(enum clock_event_mode mode,
- struct clock_event_device *evt)
-{
- samsung_time_stop(timer_source.event_id);
-
- switch (mode) {
- case CLOCK_EVT_MODE_PERIODIC:
- samsung_time_setup(timer_source.event_id, clock_count_per_tick);
- samsung_time_start(timer_source.event_id, PERIODIC);
- break;
-
- case CLOCK_EVT_MODE_ONESHOT:
- break;
-
- case CLOCK_EVT_MODE_UNUSED:
- case CLOCK_EVT_MODE_SHUTDOWN:
- break;
-
- case CLOCK_EVT_MODE_RESUME:
- samsung_timer_resume();
- break;
- }
-}
-
-static void samsung_timer_resume(void)
-{
- /* event timer restart */
- samsung_time_setup(timer_source.event_id, clock_count_per_tick);
- samsung_time_start(timer_source.event_id, PERIODIC);
-
- /* source timer restart */
- samsung_time_setup(timer_source.source_id, TCNT_MAX);
- samsung_time_start(timer_source.source_id, PERIODIC);
-}
-
-void __init samsung_set_timer_source(enum samsung_timer_mode event,
- enum samsung_timer_mode source)
-{
- s3c_device_timer[event].dev.bus = &platform_bus_type;
- s3c_device_timer[source].dev.bus = &platform_bus_type;
-
- timer_source.event_id = event;
- timer_source.source_id = source;
-}
-
-static struct clock_event_device time_event_device = {
- .name = "samsung_event_timer",
- .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
- .rating = 200,
- .set_next_event = samsung_set_next_event,
- .set_mode = samsung_set_mode,
-};
-
-static irqreturn_t samsung_clock_event_isr(int irq, void *dev_id)
-{
- struct clock_event_device *evt = dev_id;
-
- evt->event_handler(evt);
-
- return IRQ_HANDLED;
-}
-
-static struct irqaction samsung_clock_event_irq = {
- .name = "samsung_time_irq",
- .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
- .handler = samsung_clock_event_isr,
- .dev_id = &time_event_device,
-};
-
-static void __init samsung_clockevent_init(void)
-{
- unsigned long pclk;
- unsigned long clock_rate;
- unsigned int irq_number;
- struct clk *tscaler;
-
- pclk = clk_get_rate(timerclk);
-
- tscaler = clk_get_parent(tdiv_event);
-
- clk_set_rate(tscaler, pclk / TSCALER_DIV);
- clk_set_rate(tdiv_event, pclk / TDIV);
- clk_set_parent(tin_event, tdiv_event);
-
- clock_rate = clk_get_rate(tin_event);
- clock_count_per_tick = clock_rate / HZ;
-
- time_event_device.cpumask = cpumask_of(0);
- clockevents_config_and_register(&time_event_device, clock_rate, 1, -1);
-
- irq_number = timer_source.event_id + IRQ_TIMER0;
- setup_irq(irq_number, &samsung_clock_event_irq);
-}
-
-static void __iomem *samsung_timer_reg(void)
-{
- unsigned long offset = 0;
-
- switch (timer_source.source_id) {
- case SAMSUNG_PWM0:
- case SAMSUNG_PWM1:
- case SAMSUNG_PWM2:
- case SAMSUNG_PWM3:
- offset = (timer_source.source_id * 0x0c) + 0x14;
- break;
-
- case SAMSUNG_PWM4:
- offset = 0x40;
- break;
-
- default:
- printk(KERN_ERR "Invalid Timer %d\n", timer_source.source_id);
- return NULL;
- }
-
- return S3C_TIMERREG(offset);
-}
-
-/*
- * Override the global weak sched_clock symbol with this
- * local implementation which uses the clocksource to get some
- * better resolution when scheduling the kernel. We accept that
- * this wraps around for now, since it is just a relative time
- * stamp. (Inspired by U300 implementation.)
- */
-static u32 notrace samsung_read_sched_clock(void)
-{
- void __iomem *reg = samsung_timer_reg();
-
- if (!reg)
- return 0;
-
- return ~__raw_readl(reg);
-}
-
-static void __init samsung_clocksource_init(void)
-{
- unsigned long pclk;
- unsigned long clock_rate;
-
- pclk = clk_get_rate(timerclk);
-
- clk_set_rate(tdiv_source, pclk / TDIV);
- clk_set_parent(tin_source, tdiv_source);
-
- clock_rate = clk_get_rate(tin_source);
-
- samsung_time_setup(timer_source.source_id, TCNT_MAX);
- samsung_time_start(timer_source.source_id, PERIODIC);
-
- setup_sched_clock(samsung_read_sched_clock, TSIZE, clock_rate);
-
- if (clocksource_mmio_init(samsung_timer_reg(), "samsung_clocksource_timer",
- clock_rate, 250, TSIZE, clocksource_mmio_readl_down))
- panic("samsung_clocksource_timer: can't register clocksource\n");
-}
-
-static void __init samsung_timer_resources(void)
-{
-
- unsigned long event_id = timer_source.event_id;
- unsigned long source_id = timer_source.source_id;
- char devname[15];
-
- timerclk = clk_get(NULL, "timers");
- if (IS_ERR(timerclk))
- panic("failed to get timers clock for timer");
-
- clk_enable(timerclk);
-
- sprintf(devname, "s3c24xx-pwm.%lu", event_id);
- s3c_device_timer[event_id].id = event_id;
- s3c_device_timer[event_id].dev.init_name = devname;
-
- tin_event = clk_get(&s3c_device_timer[event_id].dev, "pwm-tin");
- if (IS_ERR(tin_event))
- panic("failed to get pwm-tin clock for event timer");
-
- tdiv_event = clk_get(&s3c_device_timer[event_id].dev, "pwm-tdiv");
- if (IS_ERR(tdiv_event))
- panic("failed to get pwm-tdiv clock for event timer");
-
- clk_enable(tin_event);
-
- sprintf(devname, "s3c24xx-pwm.%lu", source_id);
- s3c_device_timer[source_id].id = source_id;
- s3c_device_timer[source_id].dev.init_name = devname;
-
- tin_source = clk_get(&s3c_device_timer[source_id].dev, "pwm-tin");
- if (IS_ERR(tin_source))
- panic("failed to get pwm-tin clock for source timer");
-
- tdiv_source = clk_get(&s3c_device_timer[source_id].dev, "pwm-tdiv");
- if (IS_ERR(tdiv_source))
- panic("failed to get pwm-tdiv clock for source timer");
-
- clk_enable(tin_source);
-}
-
-void __init samsung_timer_init(void)
-{
- samsung_timer_resources();
- samsung_clockevent_init();
- samsung_clocksource_init();
-}
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 09/18] ARM: SAMSUNG: Remove unused PWM timer IRQ chip code
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (7 preceding siblings ...)
2013-06-20 22:12 ` [PATCH v2 08/18] ARM: SAMSUNG: Remove old samsung-time driver Tomasz Figa
@ 2013-06-20 22:12 ` Tomasz Figa
2013-06-20 22:12 ` [PATCH v2 10/18] pwm: samsung: Rename to pwm-samsung-legacy Tomasz Figa
` (11 subsequent siblings)
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:12 UTC (permalink / raw)
To: linux-arm-kernel
From: Tomasz Figa <t.figa@samsung.com>
As the need for an IRQ chip handling PWM timer interrupt chaining is
gone now, this patch removes all the code made unnecessary.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/Kconfig | 1 -
arch/arm/mach-s3c64xx/common.c | 4 -
arch/arm/mach-s3c64xx/include/mach/irqs.h | 8 --
arch/arm/mach-s5p64x0/include/mach/irqs.h | 2 -
arch/arm/mach-s5pc100/include/mach/irqs.h | 2 -
arch/arm/mach-s5pv210/include/mach/irqs.h | 2 -
arch/arm/plat-samsung/Kconfig | 6 --
arch/arm/plat-samsung/Makefile | 1 -
arch/arm/plat-samsung/devs.c | 25 ++----
arch/arm/plat-samsung/include/plat/irq-vic-timer.h | 13 ---
arch/arm/plat-samsung/include/plat/irqs.h | 9 --
arch/arm/plat-samsung/irq-vic-timer.c | 98 ----------------------
arch/arm/plat-samsung/s5p-irq.c | 3 -
13 files changed, 6 insertions(+), 168 deletions(-)
delete mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h
delete mode 100644 arch/arm/plat-samsung/irq-vic-timer.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ddf2667..b5fdce1 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -732,7 +732,6 @@ config ARCH_S3C64XX
select SAMSUNG_ATAGS
select SAMSUNG_CLKSRC
select SAMSUNG_GPIOLIB_4BIT
- select SAMSUNG_IRQ_VIC_TIMER
select SAMSUNG_WDT_RESET
select USB_ARCH_HAS_OHCI
help
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index 91df45a..0b33683 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -42,7 +42,6 @@
#include <plat/pm.h>
#include <plat/gpio-cfg.h>
#include <plat/irq-uart.h>
-#include <plat/irq-vic-timer.h>
#include <plat/pwm-core.h>
#include <plat/regs-irqtype.h>
#include <plat/regs-serial.h>
@@ -222,9 +221,6 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
/* initialise the pair of VICs */
vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
-
- /* add the timer sub-irqs */
- s3c_init_vic_timer_irq(5, IRQ_TIMER0);
}
#define eint_offset(irq) ((irq) - IRQ_EINT(0))
diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h
index 96d60e0..67bbd1d 100644
--- a/arch/arm/mach-s3c64xx/include/mach/irqs.h
+++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h
@@ -107,14 +107,6 @@
#define IRQ_TC IRQ_PENDN
#define IRQ_ADC S3C64XX_IRQ_VIC1(31)
-#define S3C64XX_TIMER_IRQ(x) S3C_IRQ(64 + (x))
-
-#define IRQ_TIMER0 S3C64XX_TIMER_IRQ(0)
-#define IRQ_TIMER1 S3C64XX_TIMER_IRQ(1)
-#define IRQ_TIMER2 S3C64XX_TIMER_IRQ(2)
-#define IRQ_TIMER3 S3C64XX_TIMER_IRQ(3)
-#define IRQ_TIMER4 S3C64XX_TIMER_IRQ(4)
-
/* compatibility for device defines */
#define IRQ_IIC1 IRQ_S3C6410_IIC1
diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
index 5b845e8..53982db 100644
--- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
+++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
@@ -141,8 +141,6 @@
#define IRQ_EINT_GROUP(grp, x) (IRQ_EINT_GROUP##grp##_BASE + (x))
-#define IRQ_TIMER_BASE (11)
-
/* Set the default NR_IRQS */
#define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
index 2870f12..d2eb475 100644
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
@@ -97,8 +97,6 @@
#define IRQ_SDMFIQ S5P_IRQ_VIC2(31)
#define IRQ_VIC_END S5P_IRQ_VIC2(31)
-#define IRQ_TIMER_BASE (11)
-
#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index e777e01..5e0de3a 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -118,8 +118,6 @@
#define IRQ_MDNIE3 S5P_IRQ_VIC3(8)
#define IRQ_VIC_END S5P_IRQ_VIC3(31)
-#define IRQ_TIMER_BASE (11)
-
#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 3e880b7..b21d9d5 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -25,7 +25,6 @@ config PLAT_S5P
select S5P_GPIO_DRVSTR
select SAMSUNG_CLKSRC if !COMMON_CLK
select SAMSUNG_GPIOLIB_4BIT
- select SAMSUNG_IRQ_VIC_TIMER
help
Base platform code for Samsung's S5P series SoC.
@@ -91,11 +90,6 @@ config S5P_CLOCK
# options for IRQ support
-config SAMSUNG_IRQ_VIC_TIMER
- bool
- help
- Internal configuration to build the VIC timer interrupt code.
-
config S5P_IRQ
def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
help
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index cf41bf9..aafbe56 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -19,7 +19,6 @@ obj-$(CONFIG_SAMSUNG_CLOCK) += pwm-clock.o
obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o
obj-$(CONFIG_S5P_CLOCK) += s5p-clock.o
-obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o
obj-$(CONFIG_S5P_IRQ) += s5p-irq.o
obj-$(CONFIG_S5P_EXT_INT) += s5p-irq-eint.o
obj-$(CONFIG_S5P_GPIO_INT) += s5p-irq-gpioint.o
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index bba6d78..290f63a 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -1099,22 +1099,9 @@ arch_initcall(s5p_pmu_init);
#ifdef CONFIG_SAMSUNG_DEV_PWM
-#define TIMER_RESOURCE_SIZE (1)
-
-#define TIMER_RESOURCE(_tmr, _irq) \
- (struct resource [TIMER_RESOURCE_SIZE]) { \
- [0] = { \
- .start = _irq, \
- .end = _irq, \
- .flags = IORESOURCE_IRQ \
- } \
- }
-
-#define DEFINE_S3C_TIMER(_tmr_no, _irq) \
+#define DEFINE_S3C_TIMER(_tmr_no) \
.name = "s3c24xx-pwm", \
.id = _tmr_no, \
- .num_resources = TIMER_RESOURCE_SIZE, \
- .resource = TIMER_RESOURCE(_tmr_no, _irq), \
/*
* since we already have an static mapping for the timer,
@@ -1122,11 +1109,11 @@ arch_initcall(s5p_pmu_init);
*/
struct platform_device s3c_device_timer[] = {
- [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
- [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
- [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
- [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
- [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
+ [0] = { DEFINE_S3C_TIMER(0) },
+ [1] = { DEFINE_S3C_TIMER(1) },
+ [2] = { DEFINE_S3C_TIMER(2) },
+ [3] = { DEFINE_S3C_TIMER(3) },
+ [4] = { DEFINE_S3C_TIMER(4) },
};
static struct resource samsung_pwm_resource[] = {
diff --git a/arch/arm/plat-samsung/include/plat/irq-vic-timer.h b/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
deleted file mode 100644
index 5b9c42f..0000000
--- a/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* arch/arm/plat-samsung/include/plat/irq-vic-timer.h
- *
- * Copyright (c) 2010 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Header file for Samsung SoC IRQ VIC timer
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-extern void s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq);
diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
index df46b77..039001c 100644
--- a/arch/arm/plat-samsung/include/plat/irqs.h
+++ b/arch/arm/plat-samsung/include/plat/irqs.h
@@ -44,15 +44,6 @@
#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
-#define S5P_TIMER_IRQ(x) (IRQ_TIMER_BASE + (x))
-
-#define IRQ_TIMER0 S5P_TIMER_IRQ(0)
-#define IRQ_TIMER1 S5P_TIMER_IRQ(1)
-#define IRQ_TIMER2 S5P_TIMER_IRQ(2)
-#define IRQ_TIMER3 S5P_TIMER_IRQ(3)
-#define IRQ_TIMER4 S5P_TIMER_IRQ(4)
-#define IRQ_TIMER_COUNT (5)
-
#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \
: ((x) - 16 + S5P_EINT_BASE2))
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
deleted file mode 100644
index 0fceb42..0000000
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ /dev/null
@@ -1,98 +0,0 @@
-/* arch/arm/plat-samsung/irq-vic-timer.c
- * originally part of arch/arm/plat-s3c64xx/irq.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * S3C64XX - Interrupt handling
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/irqchip/chained_irq.h>
-#include <linux/io.h>
-
-#include <mach/map.h>
-#include <mach/irqs.h>
-#include <plat/cpu.h>
-#include <plat/irq-vic-timer.h>
-#include <plat/regs-timer.h>
-
-static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
-{
- struct irq_chip *chip = irq_get_chip(irq);
- chained_irq_enter(chip, desc);
- generic_handle_irq((int)desc->irq_data.handler_data);
- chained_irq_exit(chip, desc);
-}
-
-/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
-static void s3c_irq_timer_ack(struct irq_data *d)
-{
- struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
- u32 mask = (1 << 5) << (d->irq - gc->irq_base);
-
- irq_reg_writel(mask | gc->mask_cache, gc->reg_base);
-}
-
-/**
- * s3c_init_vic_timer_irq() - initialise timer irq chanined off VIC.\
- * @num: Number of timers to initialize
- * @timer_irq: Base IRQ number to be used for the timers.
- *
- * Register the necessary IRQ chaining and support for the timer IRQs
- * chained of the VIC.
- */
-void __init s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq)
-{
- unsigned int pirq[5] = { IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
- IRQ_TIMER3_VIC, IRQ_TIMER4_VIC };
- struct irq_chip_generic *s3c_tgc;
- struct irq_chip_type *ct;
- unsigned int i;
-
-#ifdef CONFIG_ARCH_EXYNOS
- if (soc_is_exynos5250()) {
- pirq[0] = EXYNOS5_IRQ_TIMER0_VIC;
- pirq[1] = EXYNOS5_IRQ_TIMER1_VIC;
- pirq[2] = EXYNOS5_IRQ_TIMER2_VIC;
- pirq[3] = EXYNOS5_IRQ_TIMER3_VIC;
- pirq[4] = EXYNOS5_IRQ_TIMER4_VIC;
- } else {
- pirq[0] = EXYNOS4_IRQ_TIMER0_VIC;
- pirq[1] = EXYNOS4_IRQ_TIMER1_VIC;
- pirq[2] = EXYNOS4_IRQ_TIMER2_VIC;
- pirq[3] = EXYNOS4_IRQ_TIMER3_VIC;
- pirq[4] = EXYNOS4_IRQ_TIMER4_VIC;
- }
-#endif
- s3c_tgc = irq_alloc_generic_chip("s3c-timer", 1, timer_irq,
- S3C64XX_TINT_CSTAT, handle_level_irq);
-
- if (!s3c_tgc) {
- pr_err("%s: irq_alloc_generic_chip for IRQ %d failed\n",
- __func__, timer_irq);
- return;
- }
-
- ct = s3c_tgc->chip_types;
- ct->chip.irq_mask = irq_gc_mask_clr_bit;
- ct->chip.irq_unmask = irq_gc_mask_set_bit;
- ct->chip.irq_ack = s3c_irq_timer_ack;
- irq_setup_generic_chip(s3c_tgc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
- IRQ_NOREQUEST | IRQ_NOPROBE, 0);
- /* Clear the upper bits of the mask_cache*/
- s3c_tgc->mask_cache &= 0x1f;
-
- for (i = 0; i < num; i++, timer_irq++) {
- irq_set_chained_handler(pirq[i], s3c_irq_demux_vic_timer);
- irq_set_handler_data(pirq[i], (void *)timer_irq);
- }
-}
diff --git a/arch/arm/plat-samsung/s5p-irq.c b/arch/arm/plat-samsung/s5p-irq.c
index ff1a760..6729cb2 100644
--- a/arch/arm/plat-samsung/s5p-irq.c
+++ b/arch/arm/plat-samsung/s5p-irq.c
@@ -19,7 +19,6 @@
#include <mach/map.h>
#include <plat/regs-timer.h>
#include <plat/cpu.h>
-#include <plat/irq-vic-timer.h>
void __init s5p_init_irq(u32 *vic, u32 num_vic)
{
@@ -30,6 +29,4 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
for (irq = 0; irq < num_vic; irq++)
vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
#endif
-
- s3c_init_vic_timer_irq(5, IRQ_TIMER0);
}
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 10/18] pwm: samsung: Rename to pwm-samsung-legacy
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (8 preceding siblings ...)
2013-06-20 22:12 ` [PATCH v2 09/18] ARM: SAMSUNG: Remove unused PWM timer IRQ chip code Tomasz Figa
@ 2013-06-20 22:12 ` Tomasz Figa
2013-06-22 13:09 ` [PATCH v3 " Tomasz Figa
2013-06-20 22:12 ` [PATCH v2 11/18] pwm: Add new pwm-samsung driver Tomasz Figa
` (10 subsequent siblings)
20 siblings, 1 reply; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:12 UTC (permalink / raw)
To: linux-arm-kernel
This patch renames the old pwm-samsung driver to pwm-samsung-legacy to
create place for the new, rewritten, DT-aware pwm-samsung driver using
Samsung PWM/timer master driver.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
drivers/pwm/Makefile | 2 +-
drivers/pwm/pwm-samsung-legacy.c | 353 +++++++++++++++++++++++++++++++++++++++
drivers/pwm/pwm-samsung.c | 353 ---------------------------------------
3 files changed, 354 insertions(+), 354 deletions(-)
create mode 100644 drivers/pwm/pwm-samsung-legacy.c
delete mode 100644 drivers/pwm/pwm-samsung.c
diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
index 94ba21e..229a599 100644
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
@@ -8,7 +8,7 @@ obj-$(CONFIG_PWM_LPC32XX) += pwm-lpc32xx.o
obj-$(CONFIG_PWM_MXS) += pwm-mxs.o
obj-$(CONFIG_PWM_PUV3) += pwm-puv3.o
obj-$(CONFIG_PWM_PXA) += pwm-pxa.o
-obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o
+obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung-legacy.o
obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o
obj-$(CONFIG_PWM_TEGRA) += pwm-tegra.o
obj-$(CONFIG_PWM_TIECAP) += pwm-tiecap.o
diff --git a/drivers/pwm/pwm-samsung-legacy.c b/drivers/pwm/pwm-samsung-legacy.c
new file mode 100644
index 0000000..a0ece50
--- /dev/null
+++ b/drivers/pwm/pwm-samsung-legacy.c
@@ -0,0 +1,353 @@
+/* drivers/pwm/pwm-samsung.c
+ *
+ * Copyright (c) 2007 Ben Dooks
+ * Copyright (c) 2008 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
+ *
+ * S3C series PWM device core
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License.
+*/
+
+#define pr_fmt(fmt) "pwm-samsung: " fmt
+
+#include <linux/export.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/pwm.h>
+
+#include <mach/map.h>
+
+#include <plat/regs-timer.h>
+
+struct s3c_chip {
+ struct platform_device *pdev;
+
+ struct clk *clk_div;
+ struct clk *clk;
+ const char *label;
+
+ unsigned int period_ns;
+ unsigned int duty_ns;
+
+ unsigned char tcon_base;
+ unsigned char pwm_id;
+ struct pwm_chip chip;
+};
+
+#define to_s3c_chip(chip) container_of(chip, struct s3c_chip, chip)
+
+#define pwm_dbg(_pwm, msg...) dev_dbg(&(_pwm)->pdev->dev, msg)
+
+static struct clk *clk_scaler[2];
+
+static inline int pwm_is_tdiv(struct s3c_chip *chip)
+{
+ return clk_get_parent(chip->clk) == chip->clk_div;
+}
+
+#define pwm_tcon_start(pwm) (1 << (pwm->tcon_base + 0))
+#define pwm_tcon_invert(pwm) (1 << (pwm->tcon_base + 2))
+#define pwm_tcon_autoreload(pwm) (1 << (pwm->tcon_base + 3))
+#define pwm_tcon_manulupdate(pwm) (1 << (pwm->tcon_base + 1))
+
+static int s3c_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ struct s3c_chip *s3c = to_s3c_chip(chip);
+ unsigned long flags;
+ unsigned long tcon;
+
+ local_irq_save(flags);
+
+ tcon = __raw_readl(S3C2410_TCON);
+ tcon |= pwm_tcon_start(s3c);
+ __raw_writel(tcon, S3C2410_TCON);
+
+ local_irq_restore(flags);
+
+ return 0;
+}
+
+static void s3c_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ struct s3c_chip *s3c = to_s3c_chip(chip);
+ unsigned long flags;
+ unsigned long tcon;
+
+ local_irq_save(flags);
+
+ tcon = __raw_readl(S3C2410_TCON);
+ tcon &= ~pwm_tcon_start(s3c);
+ __raw_writel(tcon, S3C2410_TCON);
+
+ local_irq_restore(flags);
+}
+
+static unsigned long pwm_calc_tin(struct s3c_chip *s3c, unsigned long freq)
+{
+ unsigned long tin_parent_rate;
+ unsigned int div;
+
+ tin_parent_rate = clk_get_rate(clk_get_parent(s3c->clk_div));
+ pwm_dbg(s3c, "tin parent at %lu\n", tin_parent_rate);
+
+ for (div = 2; div <= 16; div *= 2) {
+ if ((tin_parent_rate / (div << 16)) < freq)
+ return tin_parent_rate / div;
+ }
+
+ return tin_parent_rate / 16;
+}
+
+#define NS_IN_HZ (1000000000UL)
+
+static int s3c_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
+ int duty_ns, int period_ns)
+{
+ struct s3c_chip *s3c = to_s3c_chip(chip);
+ unsigned long tin_rate;
+ unsigned long tin_ns;
+ unsigned long period;
+ unsigned long flags;
+ unsigned long tcon;
+ unsigned long tcnt;
+ long tcmp;
+
+ /* We currently avoid using 64bit arithmetic by using the
+ * fact that anything faster than 1Hz is easily representable
+ * by 32bits. */
+
+ if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
+ return -ERANGE;
+
+ if (period_ns == s3c->period_ns &&
+ duty_ns == s3c->duty_ns)
+ return 0;
+
+ /* The TCMP and TCNT can be read without a lock, they're not
+ * shared between the timers. */
+
+ tcmp = __raw_readl(S3C2410_TCMPB(s3c->pwm_id));
+ tcnt = __raw_readl(S3C2410_TCNTB(s3c->pwm_id));
+
+ period = NS_IN_HZ / period_ns;
+
+ pwm_dbg(s3c, "duty_ns=%d, period_ns=%d (%lu)\n",
+ duty_ns, period_ns, period);
+
+ /* Check to see if we are changing the clock rate of the PWM */
+
+ if (s3c->period_ns != period_ns) {
+ if (pwm_is_tdiv(s3c)) {
+ tin_rate = pwm_calc_tin(s3c, period);
+ clk_set_rate(s3c->clk_div, tin_rate);
+ } else
+ tin_rate = clk_get_rate(s3c->clk);
+
+ s3c->period_ns = period_ns;
+
+ pwm_dbg(s3c, "tin_rate=%lu\n", tin_rate);
+
+ tin_ns = NS_IN_HZ / tin_rate;
+ tcnt = period_ns / tin_ns;
+ } else
+ tin_ns = NS_IN_HZ / clk_get_rate(s3c->clk);
+
+ /* Note, counters count down */
+
+ tcmp = duty_ns / tin_ns;
+ tcmp = tcnt - tcmp;
+ /* the pwm hw only checks the compare register after a decrement,
+ so the pin never toggles if tcmp = tcnt */
+ if (tcmp == tcnt)
+ tcmp--;
+
+ pwm_dbg(s3c, "tin_ns=%lu, tcmp=%ld/%lu\n", tin_ns, tcmp, tcnt);
+
+ if (tcmp < 0)
+ tcmp = 0;
+
+ /* Update the PWM register block. */
+
+ local_irq_save(flags);
+
+ __raw_writel(tcmp, S3C2410_TCMPB(s3c->pwm_id));
+ __raw_writel(tcnt, S3C2410_TCNTB(s3c->pwm_id));
+
+ tcon = __raw_readl(S3C2410_TCON);
+ tcon |= pwm_tcon_manulupdate(s3c);
+ tcon |= pwm_tcon_autoreload(s3c);
+ __raw_writel(tcon, S3C2410_TCON);
+
+ tcon &= ~pwm_tcon_manulupdate(s3c);
+ __raw_writel(tcon, S3C2410_TCON);
+
+ local_irq_restore(flags);
+
+ return 0;
+}
+
+static struct pwm_ops s3c_pwm_ops = {
+ .enable = s3c_pwm_enable,
+ .disable = s3c_pwm_disable,
+ .config = s3c_pwm_config,
+ .owner = THIS_MODULE,
+};
+
+static int s3c_pwm_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct s3c_chip *s3c;
+ unsigned long flags;
+ unsigned long tcon;
+ unsigned int id = pdev->id;
+ int ret;
+
+ if (id == 4) {
+ dev_err(dev, "TIMER4 is currently not supported\n");
+ return -ENXIO;
+ }
+
+ s3c = devm_kzalloc(&pdev->dev, sizeof(*s3c), GFP_KERNEL);
+ if (s3c == NULL) {
+ dev_err(dev, "failed to allocate pwm_device\n");
+ return -ENOMEM;
+ }
+
+ /* calculate base of control bits in TCON */
+ s3c->tcon_base = id == 0 ? 0 : (id * 4) + 4;
+ s3c->pwm_id = id;
+ s3c->chip.dev = &pdev->dev;
+ s3c->chip.ops = &s3c_pwm_ops;
+ s3c->chip.base = -1;
+ s3c->chip.npwm = 1;
+
+ s3c->clk = devm_clk_get(dev, "pwm-tin");
+ if (IS_ERR(s3c->clk)) {
+ dev_err(dev, "failed to get pwm tin clk\n");
+ return PTR_ERR(s3c->clk);
+ }
+
+ s3c->clk_div = devm_clk_get(dev, "pwm-tdiv");
+ if (IS_ERR(s3c->clk_div)) {
+ dev_err(dev, "failed to get pwm tdiv clk\n");
+ return PTR_ERR(s3c->clk_div);
+ }
+
+ clk_enable(s3c->clk);
+ clk_enable(s3c->clk_div);
+
+ local_irq_save(flags);
+
+ tcon = __raw_readl(S3C2410_TCON);
+ tcon |= pwm_tcon_invert(s3c);
+ __raw_writel(tcon, S3C2410_TCON);
+
+ local_irq_restore(flags);
+
+ ret = pwmchip_add(&s3c->chip);
+ if (ret < 0) {
+ dev_err(dev, "failed to register pwm\n");
+ goto err_clk_tdiv;
+ }
+
+ pwm_dbg(s3c, "config bits %02x\n",
+ (__raw_readl(S3C2410_TCON) >> s3c->tcon_base) & 0x0f);
+
+ dev_info(dev, "tin at %lu, tdiv at %lu, tin=%sclk, base %d\n",
+ clk_get_rate(s3c->clk),
+ clk_get_rate(s3c->clk_div),
+ pwm_is_tdiv(s3c) ? "div" : "ext", s3c->tcon_base);
+
+ platform_set_drvdata(pdev, s3c);
+ return 0;
+
+ err_clk_tdiv:
+ clk_disable(s3c->clk_div);
+ clk_disable(s3c->clk);
+ return ret;
+}
+
+static int s3c_pwm_remove(struct platform_device *pdev)
+{
+ struct s3c_chip *s3c = platform_get_drvdata(pdev);
+ int err;
+
+ err = pwmchip_remove(&s3c->chip);
+ if (err < 0)
+ return err;
+
+ clk_disable(s3c->clk_div);
+ clk_disable(s3c->clk);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int s3c_pwm_suspend(struct device *dev)
+{
+ struct s3c_chip *s3c = dev_get_drvdata(dev);
+
+ /* No one preserve these values during suspend so reset them
+ * Otherwise driver leaves PWM unconfigured if same values
+ * passed to pwm_config
+ */
+ s3c->period_ns = 0;
+ s3c->duty_ns = 0;
+
+ return 0;
+}
+
+static int s3c_pwm_resume(struct device *dev)
+{
+ struct s3c_chip *s3c = dev_get_drvdata(dev);
+ unsigned long tcon;
+
+ /* Restore invertion */
+ tcon = __raw_readl(S3C2410_TCON);
+ tcon |= pwm_tcon_invert(s3c);
+ __raw_writel(tcon, S3C2410_TCON);
+
+ return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(s3c_pwm_pm_ops, s3c_pwm_suspend,
+ s3c_pwm_resume);
+
+static struct platform_driver s3c_pwm_driver = {
+ .driver = {
+ .name = "s3c24xx-pwm",
+ .owner = THIS_MODULE,
+ .pm = &s3c_pwm_pm_ops,
+ },
+ .probe = s3c_pwm_probe,
+ .remove = s3c_pwm_remove,
+};
+
+static int __init pwm_init(void)
+{
+ int ret;
+
+ clk_scaler[0] = clk_get(NULL, "pwm-scaler0");
+ clk_scaler[1] = clk_get(NULL, "pwm-scaler1");
+
+ if (IS_ERR(clk_scaler[0]) || IS_ERR(clk_scaler[1])) {
+ pr_err("failed to get scaler clocks\n");
+ return -EINVAL;
+ }
+
+ ret = platform_driver_register(&s3c_pwm_driver);
+ if (ret)
+ pr_err("failed to add pwm driver\n");
+
+ return ret;
+}
+
+arch_initcall(pwm_init);
diff --git a/drivers/pwm/pwm-samsung.c b/drivers/pwm/pwm-samsung.c
deleted file mode 100644
index a0ece50..0000000
--- a/drivers/pwm/pwm-samsung.c
+++ /dev/null
@@ -1,353 +0,0 @@
-/* drivers/pwm/pwm-samsung.c
- *
- * Copyright (c) 2007 Ben Dooks
- * Copyright (c) 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
- *
- * S3C series PWM device core
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License.
-*/
-
-#define pr_fmt(fmt) "pwm-samsung: " fmt
-
-#include <linux/export.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/slab.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/pwm.h>
-
-#include <mach/map.h>
-
-#include <plat/regs-timer.h>
-
-struct s3c_chip {
- struct platform_device *pdev;
-
- struct clk *clk_div;
- struct clk *clk;
- const char *label;
-
- unsigned int period_ns;
- unsigned int duty_ns;
-
- unsigned char tcon_base;
- unsigned char pwm_id;
- struct pwm_chip chip;
-};
-
-#define to_s3c_chip(chip) container_of(chip, struct s3c_chip, chip)
-
-#define pwm_dbg(_pwm, msg...) dev_dbg(&(_pwm)->pdev->dev, msg)
-
-static struct clk *clk_scaler[2];
-
-static inline int pwm_is_tdiv(struct s3c_chip *chip)
-{
- return clk_get_parent(chip->clk) == chip->clk_div;
-}
-
-#define pwm_tcon_start(pwm) (1 << (pwm->tcon_base + 0))
-#define pwm_tcon_invert(pwm) (1 << (pwm->tcon_base + 2))
-#define pwm_tcon_autoreload(pwm) (1 << (pwm->tcon_base + 3))
-#define pwm_tcon_manulupdate(pwm) (1 << (pwm->tcon_base + 1))
-
-static int s3c_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
-{
- struct s3c_chip *s3c = to_s3c_chip(chip);
- unsigned long flags;
- unsigned long tcon;
-
- local_irq_save(flags);
-
- tcon = __raw_readl(S3C2410_TCON);
- tcon |= pwm_tcon_start(s3c);
- __raw_writel(tcon, S3C2410_TCON);
-
- local_irq_restore(flags);
-
- return 0;
-}
-
-static void s3c_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
-{
- struct s3c_chip *s3c = to_s3c_chip(chip);
- unsigned long flags;
- unsigned long tcon;
-
- local_irq_save(flags);
-
- tcon = __raw_readl(S3C2410_TCON);
- tcon &= ~pwm_tcon_start(s3c);
- __raw_writel(tcon, S3C2410_TCON);
-
- local_irq_restore(flags);
-}
-
-static unsigned long pwm_calc_tin(struct s3c_chip *s3c, unsigned long freq)
-{
- unsigned long tin_parent_rate;
- unsigned int div;
-
- tin_parent_rate = clk_get_rate(clk_get_parent(s3c->clk_div));
- pwm_dbg(s3c, "tin parent at %lu\n", tin_parent_rate);
-
- for (div = 2; div <= 16; div *= 2) {
- if ((tin_parent_rate / (div << 16)) < freq)
- return tin_parent_rate / div;
- }
-
- return tin_parent_rate / 16;
-}
-
-#define NS_IN_HZ (1000000000UL)
-
-static int s3c_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
- int duty_ns, int period_ns)
-{
- struct s3c_chip *s3c = to_s3c_chip(chip);
- unsigned long tin_rate;
- unsigned long tin_ns;
- unsigned long period;
- unsigned long flags;
- unsigned long tcon;
- unsigned long tcnt;
- long tcmp;
-
- /* We currently avoid using 64bit arithmetic by using the
- * fact that anything faster than 1Hz is easily representable
- * by 32bits. */
-
- if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
- return -ERANGE;
-
- if (period_ns == s3c->period_ns &&
- duty_ns == s3c->duty_ns)
- return 0;
-
- /* The TCMP and TCNT can be read without a lock, they're not
- * shared between the timers. */
-
- tcmp = __raw_readl(S3C2410_TCMPB(s3c->pwm_id));
- tcnt = __raw_readl(S3C2410_TCNTB(s3c->pwm_id));
-
- period = NS_IN_HZ / period_ns;
-
- pwm_dbg(s3c, "duty_ns=%d, period_ns=%d (%lu)\n",
- duty_ns, period_ns, period);
-
- /* Check to see if we are changing the clock rate of the PWM */
-
- if (s3c->period_ns != period_ns) {
- if (pwm_is_tdiv(s3c)) {
- tin_rate = pwm_calc_tin(s3c, period);
- clk_set_rate(s3c->clk_div, tin_rate);
- } else
- tin_rate = clk_get_rate(s3c->clk);
-
- s3c->period_ns = period_ns;
-
- pwm_dbg(s3c, "tin_rate=%lu\n", tin_rate);
-
- tin_ns = NS_IN_HZ / tin_rate;
- tcnt = period_ns / tin_ns;
- } else
- tin_ns = NS_IN_HZ / clk_get_rate(s3c->clk);
-
- /* Note, counters count down */
-
- tcmp = duty_ns / tin_ns;
- tcmp = tcnt - tcmp;
- /* the pwm hw only checks the compare register after a decrement,
- so the pin never toggles if tcmp = tcnt */
- if (tcmp == tcnt)
- tcmp--;
-
- pwm_dbg(s3c, "tin_ns=%lu, tcmp=%ld/%lu\n", tin_ns, tcmp, tcnt);
-
- if (tcmp < 0)
- tcmp = 0;
-
- /* Update the PWM register block. */
-
- local_irq_save(flags);
-
- __raw_writel(tcmp, S3C2410_TCMPB(s3c->pwm_id));
- __raw_writel(tcnt, S3C2410_TCNTB(s3c->pwm_id));
-
- tcon = __raw_readl(S3C2410_TCON);
- tcon |= pwm_tcon_manulupdate(s3c);
- tcon |= pwm_tcon_autoreload(s3c);
- __raw_writel(tcon, S3C2410_TCON);
-
- tcon &= ~pwm_tcon_manulupdate(s3c);
- __raw_writel(tcon, S3C2410_TCON);
-
- local_irq_restore(flags);
-
- return 0;
-}
-
-static struct pwm_ops s3c_pwm_ops = {
- .enable = s3c_pwm_enable,
- .disable = s3c_pwm_disable,
- .config = s3c_pwm_config,
- .owner = THIS_MODULE,
-};
-
-static int s3c_pwm_probe(struct platform_device *pdev)
-{
- struct device *dev = &pdev->dev;
- struct s3c_chip *s3c;
- unsigned long flags;
- unsigned long tcon;
- unsigned int id = pdev->id;
- int ret;
-
- if (id == 4) {
- dev_err(dev, "TIMER4 is currently not supported\n");
- return -ENXIO;
- }
-
- s3c = devm_kzalloc(&pdev->dev, sizeof(*s3c), GFP_KERNEL);
- if (s3c == NULL) {
- dev_err(dev, "failed to allocate pwm_device\n");
- return -ENOMEM;
- }
-
- /* calculate base of control bits in TCON */
- s3c->tcon_base = id == 0 ? 0 : (id * 4) + 4;
- s3c->pwm_id = id;
- s3c->chip.dev = &pdev->dev;
- s3c->chip.ops = &s3c_pwm_ops;
- s3c->chip.base = -1;
- s3c->chip.npwm = 1;
-
- s3c->clk = devm_clk_get(dev, "pwm-tin");
- if (IS_ERR(s3c->clk)) {
- dev_err(dev, "failed to get pwm tin clk\n");
- return PTR_ERR(s3c->clk);
- }
-
- s3c->clk_div = devm_clk_get(dev, "pwm-tdiv");
- if (IS_ERR(s3c->clk_div)) {
- dev_err(dev, "failed to get pwm tdiv clk\n");
- return PTR_ERR(s3c->clk_div);
- }
-
- clk_enable(s3c->clk);
- clk_enable(s3c->clk_div);
-
- local_irq_save(flags);
-
- tcon = __raw_readl(S3C2410_TCON);
- tcon |= pwm_tcon_invert(s3c);
- __raw_writel(tcon, S3C2410_TCON);
-
- local_irq_restore(flags);
-
- ret = pwmchip_add(&s3c->chip);
- if (ret < 0) {
- dev_err(dev, "failed to register pwm\n");
- goto err_clk_tdiv;
- }
-
- pwm_dbg(s3c, "config bits %02x\n",
- (__raw_readl(S3C2410_TCON) >> s3c->tcon_base) & 0x0f);
-
- dev_info(dev, "tin at %lu, tdiv at %lu, tin=%sclk, base %d\n",
- clk_get_rate(s3c->clk),
- clk_get_rate(s3c->clk_div),
- pwm_is_tdiv(s3c) ? "div" : "ext", s3c->tcon_base);
-
- platform_set_drvdata(pdev, s3c);
- return 0;
-
- err_clk_tdiv:
- clk_disable(s3c->clk_div);
- clk_disable(s3c->clk);
- return ret;
-}
-
-static int s3c_pwm_remove(struct platform_device *pdev)
-{
- struct s3c_chip *s3c = platform_get_drvdata(pdev);
- int err;
-
- err = pwmchip_remove(&s3c->chip);
- if (err < 0)
- return err;
-
- clk_disable(s3c->clk_div);
- clk_disable(s3c->clk);
-
- return 0;
-}
-
-#ifdef CONFIG_PM_SLEEP
-static int s3c_pwm_suspend(struct device *dev)
-{
- struct s3c_chip *s3c = dev_get_drvdata(dev);
-
- /* No one preserve these values during suspend so reset them
- * Otherwise driver leaves PWM unconfigured if same values
- * passed to pwm_config
- */
- s3c->period_ns = 0;
- s3c->duty_ns = 0;
-
- return 0;
-}
-
-static int s3c_pwm_resume(struct device *dev)
-{
- struct s3c_chip *s3c = dev_get_drvdata(dev);
- unsigned long tcon;
-
- /* Restore invertion */
- tcon = __raw_readl(S3C2410_TCON);
- tcon |= pwm_tcon_invert(s3c);
- __raw_writel(tcon, S3C2410_TCON);
-
- return 0;
-}
-#endif
-
-static SIMPLE_DEV_PM_OPS(s3c_pwm_pm_ops, s3c_pwm_suspend,
- s3c_pwm_resume);
-
-static struct platform_driver s3c_pwm_driver = {
- .driver = {
- .name = "s3c24xx-pwm",
- .owner = THIS_MODULE,
- .pm = &s3c_pwm_pm_ops,
- },
- .probe = s3c_pwm_probe,
- .remove = s3c_pwm_remove,
-};
-
-static int __init pwm_init(void)
-{
- int ret;
-
- clk_scaler[0] = clk_get(NULL, "pwm-scaler0");
- clk_scaler[1] = clk_get(NULL, "pwm-scaler1");
-
- if (IS_ERR(clk_scaler[0]) || IS_ERR(clk_scaler[1])) {
- pr_err("failed to get scaler clocks\n");
- return -EINVAL;
- }
-
- ret = platform_driver_register(&s3c_pwm_driver);
- if (ret)
- pr_err("failed to add pwm driver\n");
-
- return ret;
-}
-
-arch_initcall(pwm_init);
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v3 10/18] pwm: samsung: Rename to pwm-samsung-legacy
2013-06-20 22:12 ` [PATCH v2 10/18] pwm: samsung: Rename to pwm-samsung-legacy Tomasz Figa
@ 2013-06-22 13:09 ` Tomasz Figa
0 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-22 13:09 UTC (permalink / raw)
To: linux-arm-kernel
This patch renames the old pwm-samsung driver to pwm-samsung-legacy to
create place for the new, rewritten, DT- and multiplatform- aware
pwm-samsung driver that will be added in further patch.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
drivers/pwm/Makefile | 2 +-
drivers/pwm/{pwm-samsung.c => pwm-samsung-legacy.c} | 0
2 files changed, 1 insertion(+), 1 deletion(-)
rename drivers/pwm/{pwm-samsung.c => pwm-samsung-legacy.c} (100%)
Changes since v2:
- Used git format-patch -M to detect rename.
- Corrected commit message.
diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
index 94ba21e..229a599 100644
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
@@ -8,7 +8,7 @@ obj-$(CONFIG_PWM_LPC32XX) += pwm-lpc32xx.o
obj-$(CONFIG_PWM_MXS) += pwm-mxs.o
obj-$(CONFIG_PWM_PUV3) += pwm-puv3.o
obj-$(CONFIG_PWM_PXA) += pwm-pxa.o
-obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o
+obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung-legacy.o
obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o
obj-$(CONFIG_PWM_TEGRA) += pwm-tegra.o
obj-$(CONFIG_PWM_TIECAP) += pwm-tiecap.o
diff --git a/drivers/pwm/pwm-samsung.c b/drivers/pwm/pwm-samsung-legacy.c
similarity index 100%
rename from drivers/pwm/pwm-samsung.c
rename to drivers/pwm/pwm-samsung-legacy.c
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH v2 11/18] pwm: Add new pwm-samsung driver
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (9 preceding siblings ...)
2013-06-20 22:12 ` [PATCH v2 10/18] pwm: samsung: Rename to pwm-samsung-legacy Tomasz Figa
@ 2013-06-20 22:12 ` Tomasz Figa
2013-06-22 13:06 ` [PATCH v3 " Tomasz Figa
2013-06-20 22:12 ` [PATCH v2 12/18] ARM: SAMSUNG: Rework private data handling in dev-backlight Tomasz Figa
` (9 subsequent siblings)
20 siblings, 1 reply; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:12 UTC (permalink / raw)
To: linux-arm-kernel
This patch introduces new Samsung PWM driver, which uses Samsung
PWM/timer master driver to control shared parts of the hardware.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-samsung.c | 601 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 602 insertions(+)
create mode 100644 drivers/pwm/pwm-samsung.c
diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
index 229a599..833c3ac 100644
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_PWM_MXS) += pwm-mxs.o
obj-$(CONFIG_PWM_PUV3) += pwm-puv3.o
obj-$(CONFIG_PWM_PXA) += pwm-pxa.o
obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung-legacy.o
+obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o
obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o
obj-$(CONFIG_PWM_TEGRA) += pwm-tegra.o
obj-$(CONFIG_PWM_TIECAP) += pwm-tiecap.o
diff --git a/drivers/pwm/pwm-samsung.c b/drivers/pwm/pwm-samsung.c
new file mode 100644
index 0000000..e64122a
--- /dev/null
+++ b/drivers/pwm/pwm-samsung.c
@@ -0,0 +1,601 @@
+/*
+ * Copyright (c) 2007 Ben Dooks
+ * Copyright (c) 2008 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
+ * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
+ *
+ * PWM driver for Samsung SoCs
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License.
+ */
+
+#include <linux/bitops.h>
+#include <linux/clk.h>
+#include <linux/export.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/pwm.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/time.h>
+
+/* For struct samsung_timer_variant and samsung_pwm_lock. */
+#include <clocksource/samsung_pwm.h>
+
+#define REG_TCFG0 0x00
+#define REG_TCFG1 0x04
+#define REG_TCON 0x08
+
+#define REG_TCNTB(tmr) (0x0c + ((tmr) * 0xc))
+#define REG_TCMPB(tmr) (0x10 + ((tmr) * 0xc))
+
+#define TCFG0_PRESCALER_MASK 0xff
+#define TCFG0_PRESCALER1_SHIFT 8
+
+#define TCFG1_MUX_MASK 0xf
+#define TCFG1_SHIFT(x) ((x) * 4)
+
+#define TCON_START(chan) (1 << (4 * (chan) + 0))
+#define TCON_MANUALUPDATE(chan) (1 << (4 * (chan) + 1))
+#define TCON_INVERT(chan) (1 << (4 * (chan) + 2))
+#define TCON_AUTORELOAD(chan) (1 << (4 * (chan) \
+ + (((chan) < 5) ? 3 : 2)))
+
+/**
+ * struct samsung_pwm_channel - private data of PWM channel
+ * @period_ns: current period in nanoseconds programmed to the hardware
+ * @duty_ns: current duty time in nanoseconds programmed to the hardware
+ * @tin_ns: time of one timer tick in nanoseconds with current timer rate
+ */
+struct samsung_pwm_channel {
+ u32 period_ns;
+ u32 duty_ns;
+ u32 tin_ns;
+};
+
+/**
+ * struct samsung_pwm_chip - private data of PWM chip
+ * @chip: generic PWM chip
+ * @variant: local copy of hardware variant data
+ * @inverter_mask: inverter status for all channels - one bit per channel
+ * @base: base address of mapped PWM registers
+ * @base_clk: base clock used to drive the timers
+ * @tclk0: external clock 0 (can be ERR_PTR if not present)
+ * @tclk1: external clock 1 (can be ERR_PTR if not present)
+ */
+struct samsung_pwm_chip {
+ struct pwm_chip chip;
+ struct samsung_pwm_variant variant;
+ u8 inverter_mask;
+
+ void __iomem *base;
+ struct clk *base_clk;
+ struct clk *tclk0;
+ struct clk *tclk1;
+};
+
+#ifndef CONFIG_CLKSRC_SAMSUNG_PWM
+/*
+ * PWM block is shared between pwm-samsung and samsung_pwm_timer drivers
+ * and some registers need access synchronization. If both drivers are
+ * compiled in, the spinlock is defined in the clocksource driver,
+ * otherwise following definition is used.
+ */
+static DEFINE_SPINLOCK(samsung_pwm_lock);
+#endif
+
+static inline
+struct samsung_pwm_chip *to_samsung_pwm_chip(struct pwm_chip *chip)
+{
+ return container_of(chip, struct samsung_pwm_chip, chip);
+}
+
+static inline unsigned int to_tcon_channel(unsigned int channel)
+{
+ /* TCON register has a gap of 4 bits (1 channel) */
+ return (channel == 0) ? 0 : (channel + 1);
+}
+
+static void pwm_samsung_set_divisor(struct samsung_pwm_chip *pwm,
+ unsigned int channel, u8 divisor)
+{
+ u8 shift = TCFG1_SHIFT(channel);
+ unsigned long flags;
+ u32 reg;
+ u8 bits;
+
+ bits = (fls(divisor) - 1) - pwm->variant.div_base;
+
+ spin_lock_irqsave(&samsung_pwm_lock, flags);
+
+ reg = readl(pwm->base + REG_TCFG1);
+ reg &= ~(TCFG1_MUX_MASK << shift);
+ reg |= bits << shift;
+ writel(reg, pwm->base + REG_TCFG1);
+
+ spin_unlock_irqrestore(&samsung_pwm_lock, flags);
+}
+
+static int pwm_samsung_is_tdiv(struct samsung_pwm_chip *chip, unsigned int chan)
+{
+ struct samsung_pwm_variant *variant = &chip->variant;
+ u32 reg;
+
+ reg = readl(chip->base + REG_TCFG1);
+ reg >>= TCFG1_SHIFT(chan);
+ reg &= TCFG1_MUX_MASK;
+
+ return (BIT(reg) & variant->tclk_mask) == 0;
+}
+
+static unsigned long pwm_samsung_get_tin_rate(struct samsung_pwm_chip *chip,
+ unsigned int chan)
+{
+ unsigned long rate;
+ u32 reg;
+
+ rate = clk_get_rate(chip->base_clk);
+
+ reg = readl(chip->base + REG_TCFG0);
+ if (chan >= 2)
+ reg >>= TCFG0_PRESCALER1_SHIFT;
+ reg &= TCFG0_PRESCALER_MASK;
+
+ return rate / (reg + 1);
+}
+
+static unsigned long pwm_samsung_calc_tin(struct samsung_pwm_chip *chip,
+ unsigned int chan, unsigned long freq)
+{
+ struct samsung_pwm_variant *variant = &chip->variant;
+ unsigned long rate;
+ struct clk *clk;
+ u8 div;
+
+ if (!pwm_samsung_is_tdiv(chip, chan)) {
+ clk = (chan < 2) ? chip->tclk0 : chip->tclk1;
+ if (!IS_ERR(clk)) {
+ rate = clk_get_rate(clk);
+ if (rate)
+ return rate;
+ }
+
+ dev_warn(chip->chip.dev,
+ "tclk of PWM %d is inoperational, using tdiv\n", chan);
+ }
+
+ rate = pwm_samsung_get_tin_rate(chip, chan);
+ dev_dbg(chip->chip.dev, "tin parent at %lu\n", rate);
+
+ /*
+ * Compare minimum PWM frequency that can be achieved with possible
+ * divider settings and choose the lowest divisor that can generate
+ * frequencies lower than requested.
+ */
+ for (div = variant->div_base; div < 4; ++div)
+ if ((rate >> (variant->bits + div)) < freq)
+ break;
+
+ pwm_samsung_set_divisor(chip, chan, BIT(div));
+
+ return rate >> div;
+}
+
+static int pwm_samsung_request(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ struct samsung_pwm_chip *our_chip = to_samsung_pwm_chip(chip);
+ struct samsung_pwm_channel *our_chan;
+
+ if (!(our_chip->variant.output_mask & (BIT(pwm->hwpwm)))) {
+ dev_warn(chip->dev,
+ "tried to request PWM channel %d without output\n",
+ pwm->hwpwm);
+ return -EINVAL;
+ }
+
+ our_chan = devm_kzalloc(chip->dev, sizeof(*our_chan), GFP_KERNEL);
+ if (!our_chan)
+ return -ENOMEM;
+
+ pwm_set_chip_data(pwm, our_chan);
+
+ return 0;
+}
+
+static void pwm_samsung_free(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ pwm_set_chip_data(pwm, NULL);
+ devm_kfree(chip->dev, pwm_get_chip_data(pwm));
+}
+
+static int pwm_samsung_enable(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ struct samsung_pwm_chip *our_chip = to_samsung_pwm_chip(chip);
+ unsigned int tcon_chan = to_tcon_channel(pwm->hwpwm);
+ unsigned long flags;
+ u32 tcon;
+
+ spin_lock_irqsave(&samsung_pwm_lock, flags);
+
+ tcon = __raw_readl(our_chip->base + REG_TCON);
+
+ tcon &= ~TCON_START(tcon_chan);
+ tcon |= TCON_MANUALUPDATE(tcon_chan);
+ __raw_writel(tcon, our_chip->base + REG_TCON);
+
+ tcon &= ~TCON_MANUALUPDATE(tcon_chan);
+ tcon |= TCON_START(tcon_chan) | TCON_AUTORELOAD(tcon_chan);
+ __raw_writel(tcon, our_chip->base + REG_TCON);
+
+ spin_unlock_irqrestore(&samsung_pwm_lock, flags);
+
+ return 0;
+}
+
+static void pwm_samsung_disable(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ struct samsung_pwm_chip *our_chip = to_samsung_pwm_chip(chip);
+ unsigned int tcon_chan = to_tcon_channel(pwm->hwpwm);
+ unsigned long flags;
+ u32 tcon;
+
+ spin_lock_irqsave(&samsung_pwm_lock, flags);
+
+ tcon = __raw_readl(our_chip->base + REG_TCON);
+ tcon &= ~TCON_AUTORELOAD(tcon_chan);
+ __raw_writel(tcon, our_chip->base + REG_TCON);
+
+ spin_unlock_irqrestore(&samsung_pwm_lock, flags);
+}
+
+static int pwm_samsung_config(struct pwm_chip *chip, struct pwm_device *pwm,
+ int duty_ns, int period_ns)
+{
+ struct samsung_pwm_chip *our_chip = to_samsung_pwm_chip(chip);
+ struct samsung_pwm_channel *chan = pwm_get_chip_data(pwm);
+ u32 tin_ns = chan->tin_ns, tcnt, tcmp;
+
+ /*
+ * We currently avoid using 64bit arithmetic by using the
+ * fact that anything faster than 1Hz is easily representable
+ * by 32bits.
+ */
+ if (period_ns > NSEC_PER_SEC)
+ return -ERANGE;
+
+ if (period_ns == chan->period_ns && duty_ns == chan->duty_ns)
+ return 0;
+
+ tcnt = readl(our_chip->base + REG_TCNTB(pwm->hwpwm));
+
+ /* We need tick count for calculation, not last tick. */
+ ++tcnt;
+
+ /* Check to see if we are changing the clock rate of the PWM. */
+ if (chan->period_ns != period_ns) {
+ unsigned long tin_rate;
+ u32 period;
+
+ period = NSEC_PER_SEC / period_ns;
+
+ dev_dbg(our_chip->chip.dev, "duty_ns=%d, period_ns=%d (%u)\n",
+ duty_ns, period_ns, period);
+
+ tin_rate = pwm_samsung_calc_tin(our_chip, pwm->hwpwm, period);
+
+ dev_dbg(our_chip->chip.dev, "tin_rate=%lu\n", tin_rate);
+
+ tin_ns = NSEC_PER_SEC / tin_rate;
+ tcnt = period_ns / tin_ns;
+ }
+
+ /* Period is too short. */
+ if (tcnt <= 1)
+ return -ERANGE;
+
+ /* Note that counters count down. */
+ tcmp = duty_ns / tin_ns;
+
+ /* 0% duty is not available */
+ if (!tcmp)
+ ++tcmp;
+
+ tcmp = tcnt - tcmp;
+
+ /* Decrement to get tick numbers, instead of tick counts. */
+ --tcnt;
+ /* -1UL will give 100% duty. */
+ --tcmp;
+
+ dev_dbg(our_chip->chip.dev,
+ "tin_ns=%u, tcmp=%u/%u\n", tin_ns, tcmp, tcnt);
+
+ /* Update PWM registers. */
+ __raw_writel(tcnt, our_chip->base + REG_TCNTB(pwm->hwpwm));
+ __raw_writel(tcmp, our_chip->base + REG_TCMPB(pwm->hwpwm));
+
+ if (test_bit(PWMF_ENABLED, &pwm->flags))
+ pwm_samsung_enable(chip, pwm);
+
+ chan->period_ns = period_ns;
+ chan->tin_ns = tin_ns;
+ chan->duty_ns = duty_ns;
+
+ return 0;
+}
+
+static void pwm_samsung_set_invert(struct samsung_pwm_chip *chip,
+ unsigned int channel, bool invert)
+{
+ unsigned int tcon_chan = to_tcon_channel(channel);
+ unsigned long flags;
+ u32 tcon;
+
+ spin_lock_irqsave(&samsung_pwm_lock, flags);
+
+ tcon = __raw_readl(chip->base + REG_TCON);
+
+ if (invert) {
+ chip->inverter_mask |= BIT(channel);
+ tcon |= TCON_INVERT(tcon_chan);
+ } else {
+ chip->inverter_mask &= ~BIT(channel);
+ tcon &= ~TCON_INVERT(tcon_chan);
+ }
+
+ __raw_writel(tcon, chip->base + REG_TCON);
+
+ spin_unlock_irqrestore(&samsung_pwm_lock, flags);
+}
+
+static int pwm_samsung_set_polarity(struct pwm_chip *chip,
+ struct pwm_device *pwm,
+ enum pwm_polarity polarity)
+{
+ struct samsung_pwm_chip *our_chip = to_samsung_pwm_chip(chip);
+ bool invert = (polarity == PWM_POLARITY_NORMAL);
+
+ /* Inverted means normal in the hardware. */
+ pwm_samsung_set_invert(our_chip, pwm->hwpwm, invert);
+
+ return 0;
+}
+
+static const struct pwm_ops pwm_samsung_ops = {
+ .request = pwm_samsung_request,
+ .free = pwm_samsung_free,
+ .enable = pwm_samsung_enable,
+ .disable = pwm_samsung_disable,
+ .config = pwm_samsung_config,
+ .set_polarity = pwm_samsung_set_polarity,
+ .owner = THIS_MODULE,
+};
+
+#ifdef CONFIG_OF
+static const struct samsung_pwm_variant s3c24xx_variant = {
+ .bits = 16,
+ .div_base = 1,
+ .has_tint_cstat = false,
+ .tclk_mask = BIT(4),
+};
+
+static const struct samsung_pwm_variant s3c64xx_variant = {
+ .bits = 32,
+ .div_base = 0,
+ .has_tint_cstat = true,
+ .tclk_mask = BIT(7) | BIT(6) | BIT(5),
+};
+
+static const struct samsung_pwm_variant s5p64x0_variant = {
+ .bits = 32,
+ .div_base = 0,
+ .has_tint_cstat = true,
+};
+
+static const struct samsung_pwm_variant s5p_variant = {
+ .bits = 32,
+ .div_base = 0,
+ .has_tint_cstat = true,
+ .tclk_mask = BIT(5),
+};
+
+static const struct of_device_id samsung_pwm_matches[] = {
+ { .compatible = "samsung,s3c2410-pwm", .data = &s3c24xx_variant },
+ { .compatible = "samsung,s3c6400-pwm", .data = &s3c64xx_variant },
+ { .compatible = "samsung,s5p6440-pwm", .data = &s5p64x0_variant },
+ { .compatible = "samsung,s5pc100-pwm", .data = &s5p_variant },
+ { .compatible = "samsung,exynos4210-pwm", .data = &s5p64x0_variant },
+ {},
+};
+
+static int pwm_samsung_parse_dt(struct samsung_pwm_chip *chip)
+{
+ struct device_node *np = chip->chip.dev->of_node;
+ const struct of_device_id *match;
+ struct property *prop;
+ const __be32 *cur;
+ u32 val;
+
+ match = of_match_node(samsung_pwm_matches, np);
+ if (!match)
+ return -ENODEV;
+
+ memcpy(&chip->variant, match->data, sizeof(chip->variant));
+
+ of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, val) {
+ if (val >= SAMSUNG_PWM_NUM) {
+ pr_warning("%s: invalid channel index in samsung,pwm-outputs property\n",
+ __func__);
+ continue;
+ }
+ chip->variant.output_mask |= BIT(val);
+ }
+
+ return 0;
+}
+#else
+static int pwm_samsung_parse_dt(struct samsung_pwm_chip *chip)
+{
+ return -ENODEV;
+}
+#endif
+
+static int pwm_samsung_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct samsung_pwm_chip *chip;
+ struct resource *res;
+ unsigned int chan;
+ int ret;
+
+ chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
+ if (chip == NULL)
+ return -ENOMEM;
+
+ chip->chip.dev = &pdev->dev;
+ chip->chip.ops = &pwm_samsung_ops;
+ chip->chip.base = -1;
+ chip->chip.npwm = SAMSUNG_PWM_NUM;
+ chip->inverter_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+
+ if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
+ ret = pwm_samsung_parse_dt(chip);
+ if (ret)
+ return ret;
+
+ chip->chip.of_xlate = of_pwm_xlate_with_flags;
+ chip->chip.of_pwm_n_cells = 3;
+ } else {
+ if (!pdev->dev.platform_data) {
+ dev_err(&pdev->dev, "no platform data specified\n");
+ return -EINVAL;
+ }
+
+ memcpy(&chip->variant, pdev->dev.platform_data,
+ sizeof(chip->variant));
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ chip->base = devm_ioremap_resource(&pdev->dev, res);
+ if (!chip->base)
+ return -ENOMEM;
+
+ chip->base_clk = devm_clk_get(&pdev->dev, "timers");
+ if (IS_ERR(chip->base_clk)) {
+ dev_err(dev, "failed to get timer base clk\n");
+ return PTR_ERR(chip->base_clk);
+ }
+
+ ret = clk_prepare_enable(chip->base_clk);
+ if (ret < 0) {
+ dev_err(dev, "failed to enable base clock\n");
+ return ret;
+ }
+
+ for (chan = 0; chan < SAMSUNG_PWM_NUM; ++chan)
+ if (chip->variant.output_mask & BIT(chan))
+ pwm_samsung_set_invert(chip, chan, true);
+
+ /* Following clocks are optional. */
+ chip->tclk0 = devm_clk_get(&pdev->dev, "pwm-tclk0");
+ chip->tclk1 = devm_clk_get(&pdev->dev, "pwm-tclk1");
+
+ platform_set_drvdata(pdev, chip);
+
+ ret = pwmchip_add(&chip->chip);
+ if (ret < 0) {
+ dev_err(dev, "failed to register PWM chip\n");
+ clk_disable_unprepare(chip->base_clk);
+ return ret;
+ }
+
+ dev_dbg(dev, "base_clk at %lu, tclk0 at %lu, tclk1 at %lu\n",
+ clk_get_rate(chip->base_clk),
+ !IS_ERR(chip->tclk0) ? clk_get_rate(chip->tclk0) : 0,
+ !IS_ERR(chip->tclk1) ? clk_get_rate(chip->tclk1) : 0);
+
+ return 0;
+}
+
+static int pwm_samsung_remove(struct platform_device *pdev)
+{
+ struct samsung_pwm_chip *chip = platform_get_drvdata(pdev);
+ int ret;
+
+ ret = pwmchip_remove(&chip->chip);
+ if (ret < 0)
+ return ret;
+
+ clk_disable_unprepare(chip->base_clk);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int pwm_samsung_suspend(struct device *dev)
+{
+ struct samsung_pwm_chip *chip = dev_get_drvdata(dev);
+ unsigned int i;
+
+ /*
+ * No one preserves these values during suspend so reset them.
+ * Otherwise driver leaves PWM unconfigured if same values are
+ * passed to pwm_config() next time.
+ */
+ for (i = 0; i < SAMSUNG_PWM_NUM; ++i) {
+ struct pwm_device *pwm = &chip->chip.pwms[i];
+ struct samsung_pwm_channel *chan = pwm_get_chip_data(pwm);
+
+ if (!chan)
+ continue;
+
+ chan->period_ns = 0;
+ chan->duty_ns = 0;
+ }
+
+ return 0;
+}
+
+static int pwm_samsung_resume(struct device *dev)
+{
+ struct samsung_pwm_chip *chip = dev_get_drvdata(dev);
+ unsigned int chan;
+
+ /*
+ * Inverter setting must be preserved across suspend/resume
+ * as nobody really seems to configure it more than once.
+ */
+ for (chan = 0; chan < SAMSUNG_PWM_NUM; ++chan) {
+ if (chip->variant.output_mask & BIT(chan))
+ pwm_samsung_set_invert(chip, chan,
+ chip->inverter_mask & BIT(chan));
+ }
+
+ return 0;
+}
+#endif
+
+static struct dev_pm_ops pwm_samsung_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(pwm_samsung_suspend, pwm_samsung_resume)
+};
+
+static struct platform_driver pwm_samsung_driver = {
+ .driver = {
+ .name = "samsung-pwm",
+ .owner = THIS_MODULE,
+ .pm = &pwm_samsung_pm_ops,
+ .of_match_table = of_match_ptr(samsung_pwm_matches),
+ },
+ .probe = pwm_samsung_probe,
+ .remove = pwm_samsung_remove,
+};
+module_platform_driver(pwm_samsung_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Tomasz Figa <tomasz.figa@gmail.com>");
+MODULE_ALIAS("platform:samsung-pwm");
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v3 11/18] pwm: Add new pwm-samsung driver
2013-06-20 22:12 ` [PATCH v2 11/18] pwm: Add new pwm-samsung driver Tomasz Figa
@ 2013-06-22 13:06 ` Tomasz Figa
2013-06-24 15:22 ` Kukjin Kim
0 siblings, 1 reply; 45+ messages in thread
From: Tomasz Figa @ 2013-06-22 13:06 UTC (permalink / raw)
To: linux-arm-kernel
This patch introduces new Samsung PWM driver, which is heavily cleaned,
multiplatform aware and supports DeviceTree based instantiation.
Since on historical hardware PWM block can be shared with clocksource
driver, a shared spinlock is used to protect access to shared registers,
already exported from the clocksource driver.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-samsung.c | 601 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 602 insertions(+)
create mode 100644 drivers/pwm/pwm-samsung.c
Changes since v2:
- Replaced __raw_{readl,writel} with {readl,writel}.
- Corrected commit message.
diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
index 229a599..833c3ac 100644
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_PWM_MXS) += pwm-mxs.o
obj-$(CONFIG_PWM_PUV3) += pwm-puv3.o
obj-$(CONFIG_PWM_PXA) += pwm-pxa.o
obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung-legacy.o
+obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o
obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o
obj-$(CONFIG_PWM_TEGRA) += pwm-tegra.o
obj-$(CONFIG_PWM_TIECAP) += pwm-tiecap.o
diff --git a/drivers/pwm/pwm-samsung.c b/drivers/pwm/pwm-samsung.c
new file mode 100644
index 0000000..04fa29c
--- /dev/null
+++ b/drivers/pwm/pwm-samsung.c
@@ -0,0 +1,601 @@
+/*
+ * Copyright (c) 2007 Ben Dooks
+ * Copyright (c) 2008 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
+ * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
+ *
+ * PWM driver for Samsung SoCs
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License.
+ */
+
+#include <linux/bitops.h>
+#include <linux/clk.h>
+#include <linux/export.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/pwm.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/time.h>
+
+/* For struct samsung_timer_variant and samsung_pwm_lock. */
+#include <clocksource/samsung_pwm.h>
+
+#define REG_TCFG0 0x00
+#define REG_TCFG1 0x04
+#define REG_TCON 0x08
+
+#define REG_TCNTB(tmr) (0x0c + ((tmr) * 0xc))
+#define REG_TCMPB(tmr) (0x10 + ((tmr) * 0xc))
+
+#define TCFG0_PRESCALER_MASK 0xff
+#define TCFG0_PRESCALER1_SHIFT 8
+
+#define TCFG1_MUX_MASK 0xf
+#define TCFG1_SHIFT(x) ((x) * 4)
+
+#define TCON_START(chan) (1 << (4 * (chan) + 0))
+#define TCON_MANUALUPDATE(chan) (1 << (4 * (chan) + 1))
+#define TCON_INVERT(chan) (1 << (4 * (chan) + 2))
+#define TCON_AUTORELOAD(chan) (1 << (4 * (chan) \
+ + (((chan) < 5) ? 3 : 2)))
+
+/**
+ * struct samsung_pwm_channel - private data of PWM channel
+ * @period_ns: current period in nanoseconds programmed to the hardware
+ * @duty_ns: current duty time in nanoseconds programmed to the hardware
+ * @tin_ns: time of one timer tick in nanoseconds with current timer rate
+ */
+struct samsung_pwm_channel {
+ u32 period_ns;
+ u32 duty_ns;
+ u32 tin_ns;
+};
+
+/**
+ * struct samsung_pwm_chip - private data of PWM chip
+ * @chip: generic PWM chip
+ * @variant: local copy of hardware variant data
+ * @inverter_mask: inverter status for all channels - one bit per channel
+ * @base: base address of mapped PWM registers
+ * @base_clk: base clock used to drive the timers
+ * @tclk0: external clock 0 (can be ERR_PTR if not present)
+ * @tclk1: external clock 1 (can be ERR_PTR if not present)
+ */
+struct samsung_pwm_chip {
+ struct pwm_chip chip;
+ struct samsung_pwm_variant variant;
+ u8 inverter_mask;
+
+ void __iomem *base;
+ struct clk *base_clk;
+ struct clk *tclk0;
+ struct clk *tclk1;
+};
+
+#ifndef CONFIG_CLKSRC_SAMSUNG_PWM
+/*
+ * PWM block is shared between pwm-samsung and samsung_pwm_timer drivers
+ * and some registers need access synchronization. If both drivers are
+ * compiled in, the spinlock is defined in the clocksource driver,
+ * otherwise following definition is used.
+ */
+static DEFINE_SPINLOCK(samsung_pwm_lock);
+#endif
+
+static inline
+struct samsung_pwm_chip *to_samsung_pwm_chip(struct pwm_chip *chip)
+{
+ return container_of(chip, struct samsung_pwm_chip, chip);
+}
+
+static inline unsigned int to_tcon_channel(unsigned int channel)
+{
+ /* TCON register has a gap of 4 bits (1 channel) */
+ return (channel == 0) ? 0 : (channel + 1);
+}
+
+static void pwm_samsung_set_divisor(struct samsung_pwm_chip *pwm,
+ unsigned int channel, u8 divisor)
+{
+ u8 shift = TCFG1_SHIFT(channel);
+ unsigned long flags;
+ u32 reg;
+ u8 bits;
+
+ bits = (fls(divisor) - 1) - pwm->variant.div_base;
+
+ spin_lock_irqsave(&samsung_pwm_lock, flags);
+
+ reg = readl(pwm->base + REG_TCFG1);
+ reg &= ~(TCFG1_MUX_MASK << shift);
+ reg |= bits << shift;
+ writel(reg, pwm->base + REG_TCFG1);
+
+ spin_unlock_irqrestore(&samsung_pwm_lock, flags);
+}
+
+static int pwm_samsung_is_tdiv(struct samsung_pwm_chip *chip, unsigned int chan)
+{
+ struct samsung_pwm_variant *variant = &chip->variant;
+ u32 reg;
+
+ reg = readl(chip->base + REG_TCFG1);
+ reg >>= TCFG1_SHIFT(chan);
+ reg &= TCFG1_MUX_MASK;
+
+ return (BIT(reg) & variant->tclk_mask) == 0;
+}
+
+static unsigned long pwm_samsung_get_tin_rate(struct samsung_pwm_chip *chip,
+ unsigned int chan)
+{
+ unsigned long rate;
+ u32 reg;
+
+ rate = clk_get_rate(chip->base_clk);
+
+ reg = readl(chip->base + REG_TCFG0);
+ if (chan >= 2)
+ reg >>= TCFG0_PRESCALER1_SHIFT;
+ reg &= TCFG0_PRESCALER_MASK;
+
+ return rate / (reg + 1);
+}
+
+static unsigned long pwm_samsung_calc_tin(struct samsung_pwm_chip *chip,
+ unsigned int chan, unsigned long freq)
+{
+ struct samsung_pwm_variant *variant = &chip->variant;
+ unsigned long rate;
+ struct clk *clk;
+ u8 div;
+
+ if (!pwm_samsung_is_tdiv(chip, chan)) {
+ clk = (chan < 2) ? chip->tclk0 : chip->tclk1;
+ if (!IS_ERR(clk)) {
+ rate = clk_get_rate(clk);
+ if (rate)
+ return rate;
+ }
+
+ dev_warn(chip->chip.dev,
+ "tclk of PWM %d is inoperational, using tdiv\n", chan);
+ }
+
+ rate = pwm_samsung_get_tin_rate(chip, chan);
+ dev_dbg(chip->chip.dev, "tin parent at %lu\n", rate);
+
+ /*
+ * Compare minimum PWM frequency that can be achieved with possible
+ * divider settings and choose the lowest divisor that can generate
+ * frequencies lower than requested.
+ */
+ for (div = variant->div_base; div < 4; ++div)
+ if ((rate >> (variant->bits + div)) < freq)
+ break;
+
+ pwm_samsung_set_divisor(chip, chan, BIT(div));
+
+ return rate >> div;
+}
+
+static int pwm_samsung_request(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ struct samsung_pwm_chip *our_chip = to_samsung_pwm_chip(chip);
+ struct samsung_pwm_channel *our_chan;
+
+ if (!(our_chip->variant.output_mask & (BIT(pwm->hwpwm)))) {
+ dev_warn(chip->dev,
+ "tried to request PWM channel %d without output\n",
+ pwm->hwpwm);
+ return -EINVAL;
+ }
+
+ our_chan = devm_kzalloc(chip->dev, sizeof(*our_chan), GFP_KERNEL);
+ if (!our_chan)
+ return -ENOMEM;
+
+ pwm_set_chip_data(pwm, our_chan);
+
+ return 0;
+}
+
+static void pwm_samsung_free(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ pwm_set_chip_data(pwm, NULL);
+ devm_kfree(chip->dev, pwm_get_chip_data(pwm));
+}
+
+static int pwm_samsung_enable(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ struct samsung_pwm_chip *our_chip = to_samsung_pwm_chip(chip);
+ unsigned int tcon_chan = to_tcon_channel(pwm->hwpwm);
+ unsigned long flags;
+ u32 tcon;
+
+ spin_lock_irqsave(&samsung_pwm_lock, flags);
+
+ tcon = readl(our_chip->base + REG_TCON);
+
+ tcon &= ~TCON_START(tcon_chan);
+ tcon |= TCON_MANUALUPDATE(tcon_chan);
+ writel(tcon, our_chip->base + REG_TCON);
+
+ tcon &= ~TCON_MANUALUPDATE(tcon_chan);
+ tcon |= TCON_START(tcon_chan) | TCON_AUTORELOAD(tcon_chan);
+ writel(tcon, our_chip->base + REG_TCON);
+
+ spin_unlock_irqrestore(&samsung_pwm_lock, flags);
+
+ return 0;
+}
+
+static void pwm_samsung_disable(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ struct samsung_pwm_chip *our_chip = to_samsung_pwm_chip(chip);
+ unsigned int tcon_chan = to_tcon_channel(pwm->hwpwm);
+ unsigned long flags;
+ u32 tcon;
+
+ spin_lock_irqsave(&samsung_pwm_lock, flags);
+
+ tcon = readl(our_chip->base + REG_TCON);
+ tcon &= ~TCON_AUTORELOAD(tcon_chan);
+ writel(tcon, our_chip->base + REG_TCON);
+
+ spin_unlock_irqrestore(&samsung_pwm_lock, flags);
+}
+
+static int pwm_samsung_config(struct pwm_chip *chip, struct pwm_device *pwm,
+ int duty_ns, int period_ns)
+{
+ struct samsung_pwm_chip *our_chip = to_samsung_pwm_chip(chip);
+ struct samsung_pwm_channel *chan = pwm_get_chip_data(pwm);
+ u32 tin_ns = chan->tin_ns, tcnt, tcmp;
+
+ /*
+ * We currently avoid using 64bit arithmetic by using the
+ * fact that anything faster than 1Hz is easily representable
+ * by 32bits.
+ */
+ if (period_ns > NSEC_PER_SEC)
+ return -ERANGE;
+
+ if (period_ns == chan->period_ns && duty_ns == chan->duty_ns)
+ return 0;
+
+ tcnt = readl(our_chip->base + REG_TCNTB(pwm->hwpwm));
+
+ /* We need tick count for calculation, not last tick. */
+ ++tcnt;
+
+ /* Check to see if we are changing the clock rate of the PWM. */
+ if (chan->period_ns != period_ns) {
+ unsigned long tin_rate;
+ u32 period;
+
+ period = NSEC_PER_SEC / period_ns;
+
+ dev_dbg(our_chip->chip.dev, "duty_ns=%d, period_ns=%d (%u)\n",
+ duty_ns, period_ns, period);
+
+ tin_rate = pwm_samsung_calc_tin(our_chip, pwm->hwpwm, period);
+
+ dev_dbg(our_chip->chip.dev, "tin_rate=%lu\n", tin_rate);
+
+ tin_ns = NSEC_PER_SEC / tin_rate;
+ tcnt = period_ns / tin_ns;
+ }
+
+ /* Period is too short. */
+ if (tcnt <= 1)
+ return -ERANGE;
+
+ /* Note that counters count down. */
+ tcmp = duty_ns / tin_ns;
+
+ /* 0% duty is not available */
+ if (!tcmp)
+ ++tcmp;
+
+ tcmp = tcnt - tcmp;
+
+ /* Decrement to get tick numbers, instead of tick counts. */
+ --tcnt;
+ /* -1UL will give 100% duty. */
+ --tcmp;
+
+ dev_dbg(our_chip->chip.dev,
+ "tin_ns=%u, tcmp=%u/%u\n", tin_ns, tcmp, tcnt);
+
+ /* Update PWM registers. */
+ writel(tcnt, our_chip->base + REG_TCNTB(pwm->hwpwm));
+ writel(tcmp, our_chip->base + REG_TCMPB(pwm->hwpwm));
+
+ if (test_bit(PWMF_ENABLED, &pwm->flags))
+ pwm_samsung_enable(chip, pwm);
+
+ chan->period_ns = period_ns;
+ chan->tin_ns = tin_ns;
+ chan->duty_ns = duty_ns;
+
+ return 0;
+}
+
+static void pwm_samsung_set_invert(struct samsung_pwm_chip *chip,
+ unsigned int channel, bool invert)
+{
+ unsigned int tcon_chan = to_tcon_channel(channel);
+ unsigned long flags;
+ u32 tcon;
+
+ spin_lock_irqsave(&samsung_pwm_lock, flags);
+
+ tcon = readl(chip->base + REG_TCON);
+
+ if (invert) {
+ chip->inverter_mask |= BIT(channel);
+ tcon |= TCON_INVERT(tcon_chan);
+ } else {
+ chip->inverter_mask &= ~BIT(channel);
+ tcon &= ~TCON_INVERT(tcon_chan);
+ }
+
+ writel(tcon, chip->base + REG_TCON);
+
+ spin_unlock_irqrestore(&samsung_pwm_lock, flags);
+}
+
+static int pwm_samsung_set_polarity(struct pwm_chip *chip,
+ struct pwm_device *pwm,
+ enum pwm_polarity polarity)
+{
+ struct samsung_pwm_chip *our_chip = to_samsung_pwm_chip(chip);
+ bool invert = (polarity == PWM_POLARITY_NORMAL);
+
+ /* Inverted means normal in the hardware. */
+ pwm_samsung_set_invert(our_chip, pwm->hwpwm, invert);
+
+ return 0;
+}
+
+static const struct pwm_ops pwm_samsung_ops = {
+ .request = pwm_samsung_request,
+ .free = pwm_samsung_free,
+ .enable = pwm_samsung_enable,
+ .disable = pwm_samsung_disable,
+ .config = pwm_samsung_config,
+ .set_polarity = pwm_samsung_set_polarity,
+ .owner = THIS_MODULE,
+};
+
+#ifdef CONFIG_OF
+static const struct samsung_pwm_variant s3c24xx_variant = {
+ .bits = 16,
+ .div_base = 1,
+ .has_tint_cstat = false,
+ .tclk_mask = BIT(4),
+};
+
+static const struct samsung_pwm_variant s3c64xx_variant = {
+ .bits = 32,
+ .div_base = 0,
+ .has_tint_cstat = true,
+ .tclk_mask = BIT(7) | BIT(6) | BIT(5),
+};
+
+static const struct samsung_pwm_variant s5p64x0_variant = {
+ .bits = 32,
+ .div_base = 0,
+ .has_tint_cstat = true,
+};
+
+static const struct samsung_pwm_variant s5p_variant = {
+ .bits = 32,
+ .div_base = 0,
+ .has_tint_cstat = true,
+ .tclk_mask = BIT(5),
+};
+
+static const struct of_device_id samsung_pwm_matches[] = {
+ { .compatible = "samsung,s3c2410-pwm", .data = &s3c24xx_variant },
+ { .compatible = "samsung,s3c6400-pwm", .data = &s3c64xx_variant },
+ { .compatible = "samsung,s5p6440-pwm", .data = &s5p64x0_variant },
+ { .compatible = "samsung,s5pc100-pwm", .data = &s5p_variant },
+ { .compatible = "samsung,exynos4210-pwm", .data = &s5p64x0_variant },
+ {},
+};
+
+static int pwm_samsung_parse_dt(struct samsung_pwm_chip *chip)
+{
+ struct device_node *np = chip->chip.dev->of_node;
+ const struct of_device_id *match;
+ struct property *prop;
+ const __be32 *cur;
+ u32 val;
+
+ match = of_match_node(samsung_pwm_matches, np);
+ if (!match)
+ return -ENODEV;
+
+ memcpy(&chip->variant, match->data, sizeof(chip->variant));
+
+ of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, val) {
+ if (val >= SAMSUNG_PWM_NUM) {
+ pr_warning("%s: invalid channel index in samsung,pwm-outputs property\n",
+ __func__);
+ continue;
+ }
+ chip->variant.output_mask |= BIT(val);
+ }
+
+ return 0;
+}
+#else
+static int pwm_samsung_parse_dt(struct samsung_pwm_chip *chip)
+{
+ return -ENODEV;
+}
+#endif
+
+static int pwm_samsung_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct samsung_pwm_chip *chip;
+ struct resource *res;
+ unsigned int chan;
+ int ret;
+
+ chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
+ if (chip == NULL)
+ return -ENOMEM;
+
+ chip->chip.dev = &pdev->dev;
+ chip->chip.ops = &pwm_samsung_ops;
+ chip->chip.base = -1;
+ chip->chip.npwm = SAMSUNG_PWM_NUM;
+ chip->inverter_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+
+ if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
+ ret = pwm_samsung_parse_dt(chip);
+ if (ret)
+ return ret;
+
+ chip->chip.of_xlate = of_pwm_xlate_with_flags;
+ chip->chip.of_pwm_n_cells = 3;
+ } else {
+ if (!pdev->dev.platform_data) {
+ dev_err(&pdev->dev, "no platform data specified\n");
+ return -EINVAL;
+ }
+
+ memcpy(&chip->variant, pdev->dev.platform_data,
+ sizeof(chip->variant));
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ chip->base = devm_ioremap_resource(&pdev->dev, res);
+ if (!chip->base)
+ return -ENOMEM;
+
+ chip->base_clk = devm_clk_get(&pdev->dev, "timers");
+ if (IS_ERR(chip->base_clk)) {
+ dev_err(dev, "failed to get timer base clk\n");
+ return PTR_ERR(chip->base_clk);
+ }
+
+ ret = clk_prepare_enable(chip->base_clk);
+ if (ret < 0) {
+ dev_err(dev, "failed to enable base clock\n");
+ return ret;
+ }
+
+ for (chan = 0; chan < SAMSUNG_PWM_NUM; ++chan)
+ if (chip->variant.output_mask & BIT(chan))
+ pwm_samsung_set_invert(chip, chan, true);
+
+ /* Following clocks are optional. */
+ chip->tclk0 = devm_clk_get(&pdev->dev, "pwm-tclk0");
+ chip->tclk1 = devm_clk_get(&pdev->dev, "pwm-tclk1");
+
+ platform_set_drvdata(pdev, chip);
+
+ ret = pwmchip_add(&chip->chip);
+ if (ret < 0) {
+ dev_err(dev, "failed to register PWM chip\n");
+ clk_disable_unprepare(chip->base_clk);
+ return ret;
+ }
+
+ dev_dbg(dev, "base_clk at %lu, tclk0 at %lu, tclk1 at %lu\n",
+ clk_get_rate(chip->base_clk),
+ !IS_ERR(chip->tclk0) ? clk_get_rate(chip->tclk0) : 0,
+ !IS_ERR(chip->tclk1) ? clk_get_rate(chip->tclk1) : 0);
+
+ return 0;
+}
+
+static int pwm_samsung_remove(struct platform_device *pdev)
+{
+ struct samsung_pwm_chip *chip = platform_get_drvdata(pdev);
+ int ret;
+
+ ret = pwmchip_remove(&chip->chip);
+ if (ret < 0)
+ return ret;
+
+ clk_disable_unprepare(chip->base_clk);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int pwm_samsung_suspend(struct device *dev)
+{
+ struct samsung_pwm_chip *chip = dev_get_drvdata(dev);
+ unsigned int i;
+
+ /*
+ * No one preserves these values during suspend so reset them.
+ * Otherwise driver leaves PWM unconfigured if same values are
+ * passed to pwm_config() next time.
+ */
+ for (i = 0; i < SAMSUNG_PWM_NUM; ++i) {
+ struct pwm_device *pwm = &chip->chip.pwms[i];
+ struct samsung_pwm_channel *chan = pwm_get_chip_data(pwm);
+
+ if (!chan)
+ continue;
+
+ chan->period_ns = 0;
+ chan->duty_ns = 0;
+ }
+
+ return 0;
+}
+
+static int pwm_samsung_resume(struct device *dev)
+{
+ struct samsung_pwm_chip *chip = dev_get_drvdata(dev);
+ unsigned int chan;
+
+ /*
+ * Inverter setting must be preserved across suspend/resume
+ * as nobody really seems to configure it more than once.
+ */
+ for (chan = 0; chan < SAMSUNG_PWM_NUM; ++chan) {
+ if (chip->variant.output_mask & BIT(chan))
+ pwm_samsung_set_invert(chip, chan,
+ chip->inverter_mask & BIT(chan));
+ }
+
+ return 0;
+}
+#endif
+
+static struct dev_pm_ops pwm_samsung_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(pwm_samsung_suspend, pwm_samsung_resume)
+};
+
+static struct platform_driver pwm_samsung_driver = {
+ .driver = {
+ .name = "samsung-pwm",
+ .owner = THIS_MODULE,
+ .pm = &pwm_samsung_pm_ops,
+ .of_match_table = of_match_ptr(samsung_pwm_matches),
+ },
+ .probe = pwm_samsung_probe,
+ .remove = pwm_samsung_remove,
+};
+module_platform_driver(pwm_samsung_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Tomasz Figa <tomasz.figa@gmail.com>");
+MODULE_ALIAS("platform:samsung-pwm");
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v3 11/18] pwm: Add new pwm-samsung driver
2013-06-22 13:06 ` [PATCH v3 " Tomasz Figa
@ 2013-06-24 15:22 ` Kukjin Kim
2013-06-24 15:37 ` Tomasz Figa
2013-06-24 17:49 ` Thierry Reding
0 siblings, 2 replies; 45+ messages in thread
From: Kukjin Kim @ 2013-06-24 15:22 UTC (permalink / raw)
To: linux-arm-kernel
On 06/22/13 22:06, Tomasz Figa wrote:
> This patch introduces new Samsung PWM driver, which is heavily cleaned,
> multiplatform aware and supports DeviceTree based instantiation.
>
> Since on historical hardware PWM block can be shared with clocksource
> driver, a shared spinlock is used to protect access to shared registers,
> already exported from the clocksource driver.
>
> Signed-off-by: Tomasz Figa<tomasz.figa@gmail.com>
> ---
> drivers/pwm/Makefile | 1 +
> drivers/pwm/pwm-samsung.c | 601 ++++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 602 insertions(+)
> create mode 100644 drivers/pwm/pwm-samsung.c
>
> Changes since v2:
> - Replaced __raw_{readl,writel} with {readl,writel}.
> - Corrected commit message.
>
[...]
> + of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, val) {
> + if (val>= SAMSUNG_PWM_NUM) {
> + pr_warning("%s: invalid channel index in samsung,pwm-outputs property\n",
Just note, checkpatch complains following, so fixed to use pr_warn()
when I applied.
WARNING: Prefer pr_warn(... to pr_warning(...
#471: FILE: drivers/pwm/pwm-samsung.c:432:
+ pr_warning("%s: invalid channel index in samsung,pwm-outputs
property\n",
[...]
> +
> +static struct dev_pm_ops pwm_samsung_pm_ops = {
WARNING: struct dev_pm_ops should normally be const
#622: FILE: drivers/pwm/pwm-samsung.c:583:
+static struct dev_pm_ops pwm_samsung_pm_ops = {
fixed to add const when I applied.
> + SET_SYSTEM_SLEEP_PM_OPS(pwm_samsung_suspend, pwm_samsung_resume)
> +};
> +
Thanks,
- Kukjin
^ permalink raw reply [flat|nested] 45+ messages in thread* [PATCH v3 11/18] pwm: Add new pwm-samsung driver
2013-06-24 15:22 ` Kukjin Kim
@ 2013-06-24 15:37 ` Tomasz Figa
2013-06-24 17:49 ` Thierry Reding
1 sibling, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-24 15:37 UTC (permalink / raw)
To: linux-arm-kernel
On Tuesday 25 of June 2013 00:22:42 Kukjin Kim wrote:
> On 06/22/13 22:06, Tomasz Figa wrote:
> > This patch introduces new Samsung PWM driver, which is heavily
> > cleaned,
> > multiplatform aware and supports DeviceTree based instantiation.
> >
> > Since on historical hardware PWM block can be shared with clocksource
> > driver, a shared spinlock is used to protect access to shared
> > registers, already exported from the clocksource driver.
> >
> > Signed-off-by: Tomasz Figa<tomasz.figa@gmail.com>
> > ---
> >
> > drivers/pwm/Makefile | 1 +
> > drivers/pwm/pwm-samsung.c | 601
> > ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 602
> > insertions(+)
> > create mode 100644 drivers/pwm/pwm-samsung.c
> >
> > Changes since v2:
> > - Replaced __raw_{readl,writel} with {readl,writel}.
> > - Corrected commit message.
>
> [...]
>
> > + of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur,
val)
> > {
> > + if (val>= SAMSUNG_PWM_NUM) {
> > + pr_warning("%s: invalid channel index in
samsung,pwm-outputs
> > property\n",
> Just note, checkpatch complains following, so fixed to use pr_warn()
> when I applied.
>
> WARNING: Prefer pr_warn(... to pr_warning(...
> #471: FILE: drivers/pwm/pwm-samsung.c:432:
> + pr_warning("%s: invalid channel index in
samsung,pwm-outputs
> property\n",
>
> [...]
>
> > +
> > +static struct dev_pm_ops pwm_samsung_pm_ops = {
>
> WARNING: struct dev_pm_ops should normally be const
> #622: FILE: drivers/pwm/pwm-samsung.c:583:
> +static struct dev_pm_ops pwm_samsung_pm_ops = {
>
> fixed to add const when I applied.
Oops, I forgot to fix them, sorry. Thank you for fixing and applying.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 45+ messages in thread* [PATCH v3 11/18] pwm: Add new pwm-samsung driver
2013-06-24 15:22 ` Kukjin Kim
2013-06-24 15:37 ` Tomasz Figa
@ 2013-06-24 17:49 ` Thierry Reding
2013-06-24 18:31 ` Tomasz Figa
2013-06-25 16:30 ` Kukjin Kim
1 sibling, 2 replies; 45+ messages in thread
From: Thierry Reding @ 2013-06-24 17:49 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Jun 25, 2013 at 12:22:42AM +0900, Kukjin Kim wrote:
> On 06/22/13 22:06, Tomasz Figa wrote:
> >This patch introduces new Samsung PWM driver, which is heavily cleaned,
> >multiplatform aware and supports DeviceTree based instantiation.
> >
> >Since on historical hardware PWM block can be shared with clocksource
> >driver, a shared spinlock is used to protect access to shared registers,
> >already exported from the clocksource driver.
> >
> >Signed-off-by: Tomasz Figa<tomasz.figa@gmail.com>
> >---
> > drivers/pwm/Makefile | 1 +
> > drivers/pwm/pwm-samsung.c | 601 ++++++++++++++++++++++++++++++++++++++++++++++
> > 2 files changed, 602 insertions(+)
> > create mode 100644 drivers/pwm/pwm-samsung.c
> >
> >Changes since v2:
> > - Replaced __raw_{readl,writel} with {readl,writel}.
> > - Corrected commit message.
> >
>
> [...]
>
> >+ of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, val) {
> >+ if (val>= SAMSUNG_PWM_NUM) {
> >+ pr_warning("%s: invalid channel index in samsung,pwm-outputs property\n",
>
> Just note, checkpatch complains following, so fixed to use pr_warn()
> when I applied.
Note that you can't apply patches that touch the PWM tree without my Ack
and I already mentioned that the current way this driver is written
isn't acceptable.
So either you fix it properly, or if everybody except me thinks we don't
need a proper design for drivers anymore, then the only way I'll accept
this driver into the PWM tree is if you put a really big comment at the
top of the file saying that the driver is badly designed on purpose and
that people shouldn't be using it as a reference.
Thierry
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^ permalink raw reply [flat|nested] 45+ messages in thread* [PATCH v3 11/18] pwm: Add new pwm-samsung driver
2013-06-24 17:49 ` Thierry Reding
@ 2013-06-24 18:31 ` Tomasz Figa
2013-06-24 20:13 ` Thierry Reding
2013-06-25 16:30 ` Kukjin Kim
1 sibling, 1 reply; 45+ messages in thread
From: Tomasz Figa @ 2013-06-24 18:31 UTC (permalink / raw)
To: linux-arm-kernel
On Monday 24 of June 2013 19:49:04 Thierry Reding wrote:
> On Tue, Jun 25, 2013 at 12:22:42AM +0900, Kukjin Kim wrote:
> > On 06/22/13 22:06, Tomasz Figa wrote:
> > >This patch introduces new Samsung PWM driver, which is heavily
> > >cleaned,
> > >multiplatform aware and supports DeviceTree based instantiation.
> > >
> > >Since on historical hardware PWM block can be shared with clocksource
> > >driver, a shared spinlock is used to protect access to shared
> > >registers, already exported from the clocksource driver.
> > >
> > >Signed-off-by: Tomasz Figa<tomasz.figa@gmail.com>
> > >---
> > >
> > > drivers/pwm/Makefile | 1 +
> > > drivers/pwm/pwm-samsung.c | 601
> > > ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed,
> > > 602 insertions(+)
> > > create mode 100644 drivers/pwm/pwm-samsung.c
> > >
> > >Changes since v2:
> > > - Replaced __raw_{readl,writel} with {readl,writel}.
> > > - Corrected commit message.
> >
> > [...]
> >
> > >+ of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur,
val)
> > >{
> > >+ if (val>= SAMSUNG_PWM_NUM) {
> > >+ pr_warning("%s: invalid channel index in
samsung,pwm-outputs
> > >property\n",>
> > Just note, checkpatch complains following, so fixed to use pr_warn()
> > when I applied.
>
> Note that you can't apply patches that touch the PWM tree without my Ack
> and I already mentioned that the current way this driver is written
> isn't acceptable.
>
> So either you fix it properly, or if everybody except me thinks we don't
> need a proper design for drivers anymore, then the only way I'll accept
> this driver into the PWM tree is if you put a really big comment at the
> top of the file saying that the driver is badly designed on purpose and
> that people shouldn't be using it as a reference.
Sorry, I don't understand what problem you have with this design. It
completely meets all the requirements applicable on hardware platforms it
is (and going to be) used on.
The only thing it would do in a suboptimal way would be synchronization of
register accesses for multiple instances of the driver - one spinlock
would be used for all of them. This is insignificant because there is no
time critical code in this driver and it is really unlikely that a SoC
with multiple instances of this IP block shows up.
Channel reservation between clocksource and PWM drivers is completely
correct, relying on the fact that the former can only use channels
_without_ outputs and the latter can only use channels _with_ outputs. Do
I have to add that there can't be a channel both with and without output?
So the only place for improvement here, without starting overengineering
things, is a comment about the purpose of the spinlock and why it can be
used in our case.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 45+ messages in thread* [PATCH v3 11/18] pwm: Add new pwm-samsung driver
2013-06-24 18:31 ` Tomasz Figa
@ 2013-06-24 20:13 ` Thierry Reding
2013-06-24 20:32 ` Tomasz Figa
0 siblings, 1 reply; 45+ messages in thread
From: Thierry Reding @ 2013-06-24 20:13 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jun 24, 2013 at 08:31:43PM +0200, Tomasz Figa wrote:
> On Monday 24 of June 2013 19:49:04 Thierry Reding wrote:
> > On Tue, Jun 25, 2013 at 12:22:42AM +0900, Kukjin Kim wrote:
> > > On 06/22/13 22:06, Tomasz Figa wrote:
> > > >This patch introduces new Samsung PWM driver, which is heavily
> > > >cleaned,
> > > >multiplatform aware and supports DeviceTree based instantiation.
> > > >
> > > >Since on historical hardware PWM block can be shared with clocksource
> > > >driver, a shared spinlock is used to protect access to shared
> > > >registers, already exported from the clocksource driver.
> > > >
> > > >Signed-off-by: Tomasz Figa<tomasz.figa@gmail.com>
> > > >---
> > > >
> > > > drivers/pwm/Makefile | 1 +
> > > > drivers/pwm/pwm-samsung.c | 601
> > > > ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed,
> > > > 602 insertions(+)
> > > > create mode 100644 drivers/pwm/pwm-samsung.c
> > > >
> > > >Changes since v2:
> > > > - Replaced __raw_{readl,writel} with {readl,writel}.
> > > > - Corrected commit message.
> > >
> > > [...]
> > >
> > > >+ of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur,
> val)
> > > >{
> > > >+ if (val>= SAMSUNG_PWM_NUM) {
> > > >+ pr_warning("%s: invalid channel index in
> samsung,pwm-outputs
> > > >property\n",>
> > > Just note, checkpatch complains following, so fixed to use pr_warn()
> > > when I applied.
> >
> > Note that you can't apply patches that touch the PWM tree without my Ack
> > and I already mentioned that the current way this driver is written
> > isn't acceptable.
> >
> > So either you fix it properly, or if everybody except me thinks we don't
> > need a proper design for drivers anymore, then the only way I'll accept
> > this driver into the PWM tree is if you put a really big comment at the
> > top of the file saying that the driver is badly designed on purpose and
> > that people shouldn't be using it as a reference.
>
> Sorry, I don't understand what problem you have with this design. It
> completely meets all the requirements applicable on hardware platforms it
> is (and going to be) used on.
My main problem with it is that there is no design. And as such it sets
a bad example. If I accept this into the PWM tree as is then what am I
supposed to tell the next person that comes up with a similarly broken
driver?
> The only thing it would do in a suboptimal way would be synchronization of
> register accesses for multiple instances of the driver - one spinlock
> would be used for all of them. This is insignificant because there is no
> time critical code in this driver and it is really unlikely that a SoC
> with multiple instances of this IP block shows up.
I've had people give me guarantees that this and that would *never*
happen only to change their minds 6 months down the road. And again,
even if it was actually true in this case, it isn't a valid excuse for
setting a bad example.
> Channel reservation between clocksource and PWM drivers is completely
> correct, relying on the fact that the former can only use channels
> _without_ outputs and the latter can only use channels _with_ outputs. Do
> I have to add that there can't be a channel both with and without output?
The issue is that you can't really ensure that both the clocksource and
PWM drivers use the same variant and therefore might be using different
masks.
> So the only place for improvement here, without starting overengineering
> things, is a comment about the purpose of the spinlock and why it can be
> used in our case.
I disagree. You actually even had a version with a halfway decent design
at some point and it was discarded. I don't think I'm asking for all
that much here. I even gave you the option of admitting that the driver
was suboptimal. All I request in return is that you mention that in the
code so that either somebody else might go and clean things up or at
least that nobody will copy from a bad example.
Thierry
-------------- next part --------------
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^ permalink raw reply [flat|nested] 45+ messages in thread* [PATCH v3 11/18] pwm: Add new pwm-samsung driver
2013-06-24 20:13 ` Thierry Reding
@ 2013-06-24 20:32 ` Tomasz Figa
2013-06-24 20:53 ` Thierry Reding
0 siblings, 1 reply; 45+ messages in thread
From: Tomasz Figa @ 2013-06-24 20:32 UTC (permalink / raw)
To: linux-arm-kernel
On Monday 24 of June 2013 22:13:27 Thierry Reding wrote:
> On Mon, Jun 24, 2013 at 08:31:43PM +0200, Tomasz Figa wrote:
> > On Monday 24 of June 2013 19:49:04 Thierry Reding wrote:
> > > On Tue, Jun 25, 2013 at 12:22:42AM +0900, Kukjin Kim wrote:
[snip]
> > > >
> > > > Just note, checkpatch complains following, so fixed to use
> > > > pr_warn()
> > > > when I applied.
> > >
> > > Note that you can't apply patches that touch the PWM tree without my
> > > Ack and I already mentioned that the current way this driver is
> > > written isn't acceptable.
> > >
> > > So either you fix it properly, or if everybody except me thinks we
> > > don't need a proper design for drivers anymore, then the only way
> > > I'll accept this driver into the PWM tree is if you put a really
> > > big comment at the top of the file saying that the driver is badly
> > > designed on purpose and that people shouldn't be using it as a
> > > reference.
> >
> > Sorry, I don't understand what problem you have with this design. It
> > completely meets all the requirements applicable on hardware platforms
> > it is (and going to be) used on.
>
> My main problem with it is that there is no design. And as such it sets
> a bad example. If I accept this into the PWM tree as is then what am I
> supposed to tell the next person that comes up with a similarly broken
> driver?
I wouldn't call it no design. It's a simple (trivial) design.
Simple design is often better than a complex one. In this case it indeed
is, because it doesn't add code that serves no purpose, without any
functional drawbacks.
> > The only thing it would do in a suboptimal way would be
> > synchronization of register accesses for multiple instances of the
> > driver - one spinlock would be used for all of them. This is
> > insignificant because there is no time critical code in this driver
> > and it is really unlikely that a SoC with multiple instances of this
> > IP block shows up.
>
> I've had people give me guarantees that this and that would *never*
> happen only to change their minds 6 months down the road. And again,
> even if it was actually true in this case, it isn't a valid excuse for
> setting a bad example.
Well, even if that happens, there is nothing on the way stopping from
extending this design with something that will work optimally for multiple
instances. For all currently supported platforms solution used in this
series is enough.
> > Channel reservation between clocksource and PWM drivers is completely
> > correct, relying on the fact that the former can only use channels
> > _without_ outputs and the latter can only use channels _with_ outputs.
> > Do I have to add that there can't be a channel both with and without
> > output?
> The issue is that you can't really ensure that both the clocksource and
> PWM drivers use the same variant and therefore might be using different
> masks.
Output mask is _not_ a part of the constant variant data. It is stored in
the same struct, which is to simplify passing SoC-specific parameters from
platform code to both drivers, but it is not defined as a constant
anywhere in drivers.
As I already explained in one of my previous replies, it is either parsed
from DT (samsung,pwm-outputs property) or passed through the variant
struct as platform_data from board files. It isn't possible for both
drivers to get different mask values.
> > So the only place for improvement here, without starting
> > overengineering things, is a comment about the purpose of the
> > spinlock and why it can be used in our case.
>
> I disagree. You actually even had a version with a halfway decent design
> at some point and it was discarded. I don't think I'm asking for all
> that much here. I even gave you the option of admitting that the driver
> was suboptimal. All I request in return is that you mention that in the
> code so that either somebody else might go and clean things up or at
> least that nobody will copy from a bad example.
What about:
/*
* PWM block is shared between pwm-samsung and samsung_pwm_timer drivers
* and some registers need access synchronization. If both drivers are
* compiled in, the spinlock is defined in the clocksource driver,
* otherwise following definition is used.
*
* Currently we do not need any more complex synchronization method
* because all the supported SoCs contain only one instance of the PWM
* IP. Should this change, both drivers will need to be modified to
* properly synchronize accesses to particular instances.
*/
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v3 11/18] pwm: Add new pwm-samsung driver
2013-06-24 20:32 ` Tomasz Figa
@ 2013-06-24 20:53 ` Thierry Reding
2013-06-24 21:17 ` Tomasz Figa
0 siblings, 1 reply; 45+ messages in thread
From: Thierry Reding @ 2013-06-24 20:53 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jun 24, 2013 at 10:32:55PM +0200, Tomasz Figa wrote:
> On Monday 24 of June 2013 22:13:27 Thierry Reding wrote:
> > On Mon, Jun 24, 2013 at 08:31:43PM +0200, Tomasz Figa wrote:
[...]
> > > Channel reservation between clocksource and PWM drivers is completely
> > > correct, relying on the fact that the former can only use channels
> > > _without_ outputs and the latter can only use channels _with_ outputs.
> > > Do I have to add that there can't be a channel both with and without
> > > output?
> > The issue is that you can't really ensure that both the clocksource and
> > PWM drivers use the same variant and therefore might be using different
> > masks.
>
> Output mask is _not_ a part of the constant variant data. It is stored in
> the same struct, which is to simplify passing SoC-specific parameters from
> platform code to both drivers, but it is not defined as a constant
> anywhere in drivers.
>
> As I already explained in one of my previous replies, it is either parsed
> from DT (samsung,pwm-outputs property) or passed through the variant
> struct as platform_data from board files. It isn't possible for both
> drivers to get different mask values.
But samsung_pwm_set_platdata() and samsung_pwm_clocksource_init() can
still be called with different variants, can't they? Furthermore the
variants aren't read-only and therefore can be modified at any point in
time. So it is indeed possible for them to get different mask values.
Granted, it may be unlikely that they will but it wouldn't be all that
difficult to write the driver in a way to make it really impossible and
at the same time make sure that both driver share the same variant
information.
> > > So the only place for improvement here, without starting
> > > overengineering things, is a comment about the purpose of the
> > > spinlock and why it can be used in our case.
> >
> > I disagree. You actually even had a version with a halfway decent design
> > at some point and it was discarded. I don't think I'm asking for all
> > that much here. I even gave you the option of admitting that the driver
> > was suboptimal. All I request in return is that you mention that in the
> > code so that either somebody else might go and clean things up or at
> > least that nobody will copy from a bad example.
>
> What about:
>
> /*
> * PWM block is shared between pwm-samsung and samsung_pwm_timer drivers
> * and some registers need access synchronization. If both drivers are
> * compiled in, the spinlock is defined in the clocksource driver,
> * otherwise following definition is used.
> *
> * Currently we do not need any more complex synchronization method
> * because all the supported SoCs contain only one instance of the PWM
> * IP. Should this change, both drivers will need to be modified to
> * properly synchronize accesses to particular instances.
> */
I see that you can't be persuaded. And everybody else seems to be okay
with it so... have it your way. I'm probably going to regret this.
Thierry
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^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v3 11/18] pwm: Add new pwm-samsung driver
2013-06-24 20:53 ` Thierry Reding
@ 2013-06-24 21:17 ` Tomasz Figa
2013-06-25 10:26 ` Thierry Reding
0 siblings, 1 reply; 45+ messages in thread
From: Tomasz Figa @ 2013-06-24 21:17 UTC (permalink / raw)
To: linux-arm-kernel
On Monday 24 of June 2013 22:53:42 Thierry Reding wrote:
> On Mon, Jun 24, 2013 at 10:32:55PM +0200, Tomasz Figa wrote:
> > On Monday 24 of June 2013 22:13:27 Thierry Reding wrote:
> > > On Mon, Jun 24, 2013 at 08:31:43PM +0200, Tomasz Figa wrote:
> [...]
>
> > > > Channel reservation between clocksource and PWM drivers is
> > > > completely
> > > > correct, relying on the fact that the former can only use channels
> > > > _without_ outputs and the latter can only use channels _with_
> > > > outputs.
> > > > Do I have to add that there can't be a channel both with and
> > > > without
> > > > output?
> > >
> > > The issue is that you can't really ensure that both the clocksource
> > > and
> > > PWM drivers use the same variant and therefore might be using
> > > different
> > > masks.
> >
> > Output mask is _not_ a part of the constant variant data. It is stored
> > in the same struct, which is to simplify passing SoC-specific
> > parameters from platform code to both drivers, but it is not defined
> > as a constant anywhere in drivers.
> >
> > As I already explained in one of my previous replies, it is either
> > parsed from DT (samsung,pwm-outputs property) or passed through the
> > variant struct as platform_data from board files. It isn't possible
> > for both drivers to get different mask values.
>
> But samsung_pwm_set_platdata() and samsung_pwm_clocksource_init() can
> still be called with different variants, can't they?
Sure, they can be, but the question is who would even want to call them
this way? We are on kernel level, we have assumptions here and we don't
break those assumptions.
> Furthermore the
> variants aren't read-only and therefore can be modified at any point in
> time. So it is indeed possible for them to get different mask values.
Again, who would be willing to do something like this? We are not in
userspace.
> Granted, it may be unlikely that they will but it wouldn't be all that
> difficult to write the driver in a way to make it really impossible and
> at the same time make sure that both driver share the same variant
> information.
Sure, it wouldn't. If I'm not mistaken, I already acomplished this in one
or two of the versions I posted long time ago, but was it really worth all
the added drawbacks?
Keep in mind that originally, when I started my work on this, I thought
exactly the same as you - let's design something scalable and sane.
However, sometimes it's necessary to ask the question if that's really
what is needed.
> > > > So the only place for improvement here, without starting
> > > > overengineering things, is a comment about the purpose of the
> > > > spinlock and why it can be used in our case.
> > >
> > > I disagree. You actually even had a version with a halfway decent
> > > design at some point and it was discarded. I don't think I'm asking
> > > for all that much here. I even gave you the option of admitting
> > > that the driver was suboptimal. All I request in return is that you
> > > mention that in the code so that either somebody else might go and
> > > clean things up or at least that nobody will copy from a bad
> > > example.
> >
> > What about:
> >
> > /*
> >
> > * PWM block is shared between pwm-samsung and samsung_pwm_timer
> > drivers
> > * and some registers need access synchronization. If both drivers are
> > * compiled in, the spinlock is defined in the clocksource driver,
> > * otherwise following definition is used.
> > *
> > * Currently we do not need any more complex synchronization method
> > * because all the supported SoCs contain only one instance of the PWM
> > * IP. Should this change, both drivers will need to be modified to
> > * properly synchronize accesses to particular instances.
> > */
>
> I see that you can't be persuaded. And everybody else seems to be okay
> with it so... have it your way. I'm probably going to regret this.
This was just a proposal. Do you want anything else to be added to the
comment or anything to be changed?
Sure, an alternative would be getting rid of the hacky shared spinlock,
but do we really need that? Do we really want to have something in the
kernel that we don't need? I'm just trying to avoid this.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v3 11/18] pwm: Add new pwm-samsung driver
2013-06-24 21:17 ` Tomasz Figa
@ 2013-06-25 10:26 ` Thierry Reding
2013-06-25 11:19 ` Tomasz Figa
0 siblings, 1 reply; 45+ messages in thread
From: Thierry Reding @ 2013-06-25 10:26 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jun 24, 2013 at 11:17:03PM +0200, Tomasz Figa wrote:
> On Monday 24 of June 2013 22:53:42 Thierry Reding wrote:
> > On Mon, Jun 24, 2013 at 10:32:55PM +0200, Tomasz Figa wrote:
[...]
> > > What about:
> > >
> > > /*
> > >
> > > * PWM block is shared between pwm-samsung and samsung_pwm_timer
> > > drivers
> > > * and some registers need access synchronization. If both drivers are
> > > * compiled in, the spinlock is defined in the clocksource driver,
> > > * otherwise following definition is used.
> > > *
> > > * Currently we do not need any more complex synchronization method
> > > * because all the supported SoCs contain only one instance of the PWM
> > > * IP. Should this change, both drivers will need to be modified to
> > > * properly synchronize accesses to particular instances.
> > > */
> >
> > I see that you can't be persuaded. And everybody else seems to be okay
> > with it so... have it your way. I'm probably going to regret this.
>
> This was just a proposal. Do you want anything else to be added to the
> comment or anything to be changed?
For reference, I still don't like this but since I'm the only one
complaining, go ahead. With that comment added to the driver:
Acked-by: Thierry Reding <thierry.reding@gmail.com>
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^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v3 11/18] pwm: Add new pwm-samsung driver
2013-06-25 10:26 ` Thierry Reding
@ 2013-06-25 11:19 ` Tomasz Figa
2013-06-25 15:18 ` Mark Brown
2013-06-25 16:41 ` Kukjin Kim
0 siblings, 2 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-25 11:19 UTC (permalink / raw)
To: linux-arm-kernel
On Tuesday 25 of June 2013 12:26:47 Thierry Reding wrote:
> On Mon, Jun 24, 2013 at 11:17:03PM +0200, Tomasz Figa wrote:
> > On Monday 24 of June 2013 22:53:42 Thierry Reding wrote:
> > > On Mon, Jun 24, 2013 at 10:32:55PM +0200, Tomasz Figa wrote:
> [...]
>
> > > > What about:
> > > >
> > > > /*
> > > >
> > > > * PWM block is shared between pwm-samsung and samsung_pwm_timer
> > > > drivers
> > > > * and some registers need access synchronization. If both drivers
> > > > are
> > > > * compiled in, the spinlock is defined in the clocksource driver,
> > > > * otherwise following definition is used.
> > > > *
> > > > * Currently we do not need any more complex synchronization method
> > > > * because all the supported SoCs contain only one instance of the
> > > > PWM
> > > > * IP. Should this change, both drivers will need to be modified to
> > > > * properly synchronize accesses to particular instances.
> > > > */
> > >
> > > I see that you can't be persuaded. And everybody else seems to be
> > > okay
> > > with it so... have it your way. I'm probably going to regret this.
> >
> > This was just a proposal. Do you want anything else to be added to the
> > comment or anything to be changed?
>
> For reference, I still don't like this but since I'm the only one
> complaining, go ahead. With that comment added to the driver:
>
> Acked-by: Thierry Reding <thierry.reding@gmail.com>
OK. Thank you.
Kukjin, can you amend the comment I mentioned to this patch above the line
with DEFINE_SPINLOCK or I should send fixed version?
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v3 11/18] pwm: Add new pwm-samsung driver
2013-06-25 11:19 ` Tomasz Figa
@ 2013-06-25 15:18 ` Mark Brown
2013-06-25 16:41 ` Kukjin Kim
1 sibling, 0 replies; 45+ messages in thread
From: Mark Brown @ 2013-06-25 15:18 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Jun 25, 2013 at 01:19:54PM +0200, Tomasz Figa wrote:
> Kukjin, can you amend the comment I mentioned to this patch above the line
> with DEFINE_SPINLOCK or I should send fixed version?
If you're amending stuff please feel free to also add
Tested-by: Mark Brown <broonie@linaro.org>
(for the whole series)
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^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v3 11/18] pwm: Add new pwm-samsung driver
2013-06-25 11:19 ` Tomasz Figa
2013-06-25 15:18 ` Mark Brown
@ 2013-06-25 16:41 ` Kukjin Kim
1 sibling, 0 replies; 45+ messages in thread
From: Kukjin Kim @ 2013-06-25 16:41 UTC (permalink / raw)
To: linux-arm-kernel
On 06/25/13 20:19, Tomasz Figa wrote:
[...]
>>>>> /*
>>>>>
>>>>> * PWM block is shared between pwm-samsung and samsung_pwm_timer
>>>>> drivers
>>>>> * and some registers need access synchronization. If both drivers
>>>>> are
>>>>> * compiled in, the spinlock is defined in the clocksource driver,
>>>>> * otherwise following definition is used.
>>>>> *
>>>>> * Currently we do not need any more complex synchronization method
>>>>> * because all the supported SoCs contain only one instance of the
>>>>> PWM
>>>>> * IP. Should this change, both drivers will need to be modified to
>>>>> * properly synchronize accesses to particular instances.
>>>>> */
>>>>
>>>> I see that you can't be persuaded. And everybody else seems to be
>>>> okay
>>>> with it so... have it your way. I'm probably going to regret this.
>>>
>>> This was just a proposal. Do you want anything else to be added to the
>>> comment or anything to be changed?
>>
>> For reference, I still don't like this but since I'm the only one
>> complaining, go ahead. With that comment added to the driver:
>>
>> Acked-by: Thierry Reding<thierry.reding@gmail.com>
>
> OK. Thank you.
>
> Kukjin, can you amend the comment I mentioned to this patch above the line
> with DEFINE_SPINLOCK or I should send fixed version?
>
Tomasz, please re-send this one with fixing it but I'm not sure this can
be sent for upcoming merge window because it's a little bit late.
Anyway, let me try it.
Thanks,
- Kukjin
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v3 11/18] pwm: Add new pwm-samsung driver
2013-06-24 17:49 ` Thierry Reding
2013-06-24 18:31 ` Tomasz Figa
@ 2013-06-25 16:30 ` Kukjin Kim
1 sibling, 0 replies; 45+ messages in thread
From: Kukjin Kim @ 2013-06-25 16:30 UTC (permalink / raw)
To: linux-arm-kernel
On 06/25/13 02:49, Thierry Reding wrote:
[...]
> Note that you can't apply patches that touch the PWM tree without my Ack
> and I already mentioned that the current way this driver is written
> isn't acceptable.
>
> So either you fix it properly, or if everybody except me thinks we don't
> need a proper design for drivers anymore, then the only way I'll accept
> this driver into the PWM tree is if you put a really big comment at the
> top of the file saying that the driver is badly designed on purpose and
> that people shouldn't be using it as a reference.
>
Thierry, hmm...I thought Tomasz addressed comments from you and probably
there are some comments I I missed...OK, I see what your concern is.
Let me drop this series for upcoming merge window.
- Kukjin
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v2 12/18] ARM: SAMSUNG: Rework private data handling in dev-backlight
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (10 preceding siblings ...)
2013-06-20 22:12 ` [PATCH v2 11/18] pwm: Add new pwm-samsung driver Tomasz Figa
@ 2013-06-20 22:12 ` Tomasz Figa
2013-06-20 22:12 ` [PATCH v2 13/18] ARM: SAMSUNG: Modify board files to use new PWM platform device Tomasz Figa
` (8 subsequent siblings)
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:12 UTC (permalink / raw)
To: linux-arm-kernel
This patch modifies dev-backlight helpers to get private data using
container_of instead of abusing platform_data field of PWM device.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
arch/arm/plat-samsung/dev-backlight.c | 51 ++++++++++++++++++++---------------
1 file changed, 29 insertions(+), 22 deletions(-)
diff --git a/arch/arm/plat-samsung/dev-backlight.c b/arch/arm/plat-samsung/dev-backlight.c
index 5f197dc..e467a01 100644
--- a/arch/arm/plat-samsung/dev-backlight.c
+++ b/arch/arm/plat-samsung/dev-backlight.c
@@ -20,13 +20,18 @@
#include <plat/gpio-cfg.h>
#include <plat/backlight.h>
+struct samsung_bl_drvdata {
+ struct platform_pwm_backlight_data plat_data;
+ struct samsung_bl_gpio_info *gpio_info;
+};
+
static int samsung_bl_init(struct device *dev)
{
int ret = 0;
- struct platform_device *timer_dev =
- container_of(dev->parent, struct platform_device, dev);
- struct samsung_bl_gpio_info *bl_gpio_info =
- timer_dev->dev.platform_data;
+ struct platform_pwm_backlight_data *pdata = dev->platform_data;
+ struct samsung_bl_drvdata *drvdata = container_of(pdata,
+ struct samsung_bl_drvdata, plat_data);
+ struct samsung_bl_gpio_info *bl_gpio_info = drvdata->gpio_info;
ret = gpio_request(bl_gpio_info->no, "Backlight");
if (ret) {
@@ -42,10 +47,10 @@ static int samsung_bl_init(struct device *dev)
static void samsung_bl_exit(struct device *dev)
{
- struct platform_device *timer_dev =
- container_of(dev->parent, struct platform_device, dev);
- struct samsung_bl_gpio_info *bl_gpio_info =
- timer_dev->dev.platform_data;
+ struct platform_pwm_backlight_data *pdata = dev->platform_data;
+ struct samsung_bl_drvdata *drvdata = container_of(pdata,
+ struct samsung_bl_drvdata, plat_data);
+ struct samsung_bl_gpio_info *bl_gpio_info = drvdata->gpio_info;
s3c_gpio_cfgpin(bl_gpio_info->no, S3C_GPIO_OUTPUT);
gpio_free(bl_gpio_info->no);
@@ -60,12 +65,14 @@ static void samsung_bl_exit(struct device *dev)
* for their specific boards
*/
-static struct platform_pwm_backlight_data samsung_dfl_bl_data __initdata = {
- .max_brightness = 255,
- .dft_brightness = 255,
- .pwm_period_ns = 78770,
- .init = samsung_bl_init,
- .exit = samsung_bl_exit,
+static struct samsung_bl_drvdata samsung_dfl_bl_data __initdata = {
+ .plat_data = {
+ .max_brightness = 255,
+ .dft_brightness = 255,
+ .pwm_period_ns = 78770,
+ .init = samsung_bl_init,
+ .exit = samsung_bl_exit,
+ },
};
static struct platform_device samsung_dfl_bl_device __initdata = {
@@ -82,6 +89,7 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
{
int ret = 0;
struct platform_device *samsung_bl_device;
+ struct samsung_bl_drvdata *samsung_bl_drvdata;
struct platform_pwm_backlight_data *samsung_bl_data;
samsung_bl_device = kmemdup(&samsung_dfl_bl_device,
@@ -91,17 +99,19 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
return;
}
- samsung_bl_data = s3c_set_platdata(&samsung_dfl_bl_data,
- sizeof(struct platform_pwm_backlight_data), samsung_bl_device);
- if (!samsung_bl_data) {
+ samsung_bl_drvdata = kmemdup(&samsung_dfl_bl_data,
+ sizeof(samsung_dfl_bl_data), GFP_KERNEL);
+ if (!samsung_bl_drvdata) {
printk(KERN_ERR "%s: no memory for platform dev\n", __func__);
goto err_data;
}
+ samsung_bl_device->dev.platform_data = &samsung_bl_drvdata->plat_data;
+ samsung_bl_drvdata->gpio_info = gpio_info;
+ samsung_bl_data = &samsung_bl_drvdata->plat_data;
/* Copy board specific data provided by user */
samsung_bl_data->pwm_id = bl_data->pwm_id;
- samsung_bl_device->dev.parent =
- &s3c_device_timer[samsung_bl_data->pwm_id].dev;
+ samsung_bl_device->dev.parent = &samsung_device_pwm.dev;
if (bl_data->max_brightness)
samsung_bl_data->max_brightness = bl_data->max_brightness;
@@ -122,9 +132,6 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
if (bl_data->check_fb)
samsung_bl_data->check_fb = bl_data->check_fb;
- /* Keep the GPIO info for future use */
- s3c_device_timer[samsung_bl_data->pwm_id].dev.platform_data = gpio_info;
-
/* Register the specific PWM timer dev for Backlight control */
ret = platform_device_register(
&s3c_device_timer[samsung_bl_data->pwm_id]);
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 13/18] ARM: SAMSUNG: Modify board files to use new PWM platform device
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (11 preceding siblings ...)
2013-06-20 22:12 ` [PATCH v2 12/18] ARM: SAMSUNG: Rework private data handling in dev-backlight Tomasz Figa
@ 2013-06-20 22:12 ` Tomasz Figa
2013-06-20 22:12 ` [PATCH v2 14/18] pwm: Remove superseded pwm-samsung-legacy driver Tomasz Figa
` (7 subsequent siblings)
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:12 UTC (permalink / raw)
To: linux-arm-kernel
This patch modifies any board files using the legacy PWM device to use
the new device instead.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
arch/arm/mach-s3c24xx/mach-h1940.c | 4 ++--
arch/arm/mach-s3c24xx/mach-rx1950.c | 5 ++---
arch/arm/mach-s3c64xx/mach-crag6410.c | 4 ++--
arch/arm/mach-s3c64xx/mach-hmt.c | 4 ++--
arch/arm/mach-s3c64xx/mach-smartq.c | 4 ++--
arch/arm/mach-s3c64xx/mach-smdk6410.c | 5 +++--
arch/arm/mach-s5p64x0/mach-smdk6440.c | 5 +++--
arch/arm/mach-s5p64x0/mach-smdk6450.c | 5 +++--
arch/arm/mach-s5pc100/mach-smdkc100.c | 5 +++--
arch/arm/mach-s5pv210/mach-smdkv210.c | 5 +++--
arch/arm/plat-samsung/dev-backlight.c | 10 ----------
11 files changed, 25 insertions(+), 31 deletions(-)
diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c
index af4334d..74dd479 100644
--- a/arch/arm/mach-s3c24xx/mach-h1940.c
+++ b/arch/arm/mach-s3c24xx/mach-h1940.c
@@ -512,7 +512,7 @@ static struct platform_pwm_backlight_data backlight_data = {
static struct platform_device h1940_backlight = {
.name = "pwm-backlight",
.dev = {
- .parent = &s3c_device_timer[0].dev,
+ .parent = &samsung_device_pwm.dev,
.platform_data = &backlight_data,
},
.id = -1,
@@ -632,7 +632,7 @@ static struct platform_device *h1940_devices[] __initdata = {
&h1940_device_bluetooth,
&s3c_device_sdi,
&s3c_device_rtc,
- &s3c_device_timer[0],
+ &samsung_device_pwm,
&h1940_backlight,
&h1940_lcd_powerdev,
&s3c_device_adc,
diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c
index 44ca018..206b1f7 100644
--- a/arch/arm/mach-s3c24xx/mach-rx1950.c
+++ b/arch/arm/mach-s3c24xx/mach-rx1950.c
@@ -530,7 +530,7 @@ static struct platform_pwm_backlight_data rx1950_backlight_data = {
static struct platform_device rx1950_backlight = {
.name = "pwm-backlight",
.dev = {
- .parent = &s3c_device_timer[0].dev,
+ .parent = &samsung_device_pwm.dev,
.platform_data = &rx1950_backlight_data,
},
};
@@ -717,8 +717,7 @@ static struct platform_device *rx1950_devices[] __initdata = {
&s3c_device_sdi,
&s3c_device_adc,
&s3c_device_ts,
- &s3c_device_timer[0],
- &s3c_device_timer[1],
+ &samsung_device_pwm,
&rx1950_backlight,
&rx1950_device_gpiokeys,
&power_supply,
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 8ad88ac..28889cc 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -120,7 +120,7 @@ static struct platform_device crag6410_backlight_device = {
.name = "pwm-backlight",
.id = -1,
.dev = {
- .parent = &s3c_device_timer[0].dev,
+ .parent = &samsung_device_pwm.dev,
.platform_data = &crag6410_backlight_data,
},
};
@@ -375,7 +375,7 @@ static struct platform_device *crag6410_devices[] __initdata = {
&s3c_device_fb,
&s3c_device_ohci,
&s3c_device_usb_hsotg,
- &s3c_device_timer[0],
+ &samsung_device_pwm,
&s3c64xx_device_iis0,
&s3c64xx_device_iis1,
&samsung_device_keypad,
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 5b7f357..f39569e 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -123,7 +123,7 @@ static struct platform_pwm_backlight_data hmt_backlight_data = {
static struct platform_device hmt_backlight_device = {
.name = "pwm-backlight",
.dev = {
- .parent = &s3c_device_timer[1].dev,
+ .parent = &samsung_device_pwm.dev,
.platform_data = &hmt_backlight_data,
},
};
@@ -239,7 +239,7 @@ static struct platform_device *hmt_devices[] __initdata = {
&s3c_device_nand,
&s3c_device_fb,
&s3c_device_ohci,
- &s3c_device_timer[1],
+ &samsung_device_pwm,
&hmt_backlight_device,
&hmt_leds_device,
};
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c
index 58ac990..86d980b 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -157,7 +157,7 @@ static struct platform_pwm_backlight_data smartq_backlight_data = {
static struct platform_device smartq_backlight_device = {
.name = "pwm-backlight",
.dev = {
- .parent = &s3c_device_timer[1].dev,
+ .parent = &samsung_device_pwm.dev,
.platform_data = &smartq_backlight_data,
},
};
@@ -246,7 +246,7 @@ static struct platform_device *smartq_devices[] __initdata = {
&s3c_device_i2c0,
&s3c_device_ohci,
&s3c_device_rtc,
- &s3c_device_timer[1],
+ &samsung_device_pwm,
&s3c_device_ts,
&s3c_device_usb_hsotg,
&s3c64xx_device_iis0,
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index bd3295a..d90b450 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -274,6 +274,7 @@ static struct platform_device *smdk6410_devices[] __initdata = {
&s3c_device_i2c1,
&s3c_device_fb,
&s3c_device_ohci,
+ &samsung_device_pwm,
&s3c_device_usb_hsotg,
&s3c64xx_device_iisv4,
&samsung_device_keypad,
@@ -691,9 +692,9 @@ static void __init smdk6410_machine_init(void)
s3c_ide_set_platdata(&smdk6410_ide_pdata);
- samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
-
platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
+
+ samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
}
MACHINE_START(SMDK6410, "SMDK6410")
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 73f71a6..0b00304 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -162,6 +162,7 @@ static struct platform_device *smdk6440_devices[] __initdata = {
&s3c_device_rtc,
&s3c_device_i2c0,
&s3c_device_i2c1,
+ &samsung_device_pwm,
&s3c_device_ts,
&s3c_device_wdt,
&s5p6440_device_iis,
@@ -254,8 +255,6 @@ static void __init smdk6440_machine_init(void)
i2c_register_board_info(1, smdk6440_i2c_devs1,
ARRAY_SIZE(smdk6440_i2c_devs1));
- samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data);
-
s5p6440_set_lcd_interface();
s3c_fb_set_platdata(&smdk6440_lcd_pdata);
@@ -264,6 +263,8 @@ static void __init smdk6440_machine_init(void)
s3c_sdhci2_set_platdata(&smdk6440_hsmmc2_pdata);
platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
+
+ samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data);
}
MACHINE_START(SMDK6440, "SMDK6440")
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 18303e1..5949296 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -180,6 +180,7 @@ static struct platform_device *smdk6450_devices[] __initdata = {
&s3c_device_rtc,
&s3c_device_i2c0,
&s3c_device_i2c1,
+ &samsung_device_pwm,
&s3c_device_ts,
&s3c_device_wdt,
&s5p6450_device_iis0,
@@ -273,8 +274,6 @@ static void __init smdk6450_machine_init(void)
i2c_register_board_info(1, smdk6450_i2c_devs1,
ARRAY_SIZE(smdk6450_i2c_devs1));
- samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data);
-
s5p6450_set_lcd_interface();
s3c_fb_set_platdata(&smdk6450_lcd_pdata);
@@ -283,6 +282,8 @@ static void __init smdk6450_machine_init(void)
s3c_sdhci2_set_platdata(&smdk6450_hsmmc2_pdata);
platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
+
+ samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data);
}
MACHINE_START(SMDK6450, "SMDK6450")
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 8c880f7..7c57a22 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -194,6 +194,7 @@ static struct platform_device *smdkc100_devices[] __initdata = {
&s3c_device_hsmmc0,
&s3c_device_hsmmc1,
&s3c_device_hsmmc2,
+ &samsung_device_pwm,
&s3c_device_ts,
&s3c_device_wdt,
&smdkc100_lcd_powerdev,
@@ -246,9 +247,9 @@ static void __init smdkc100_machine_init(void)
gpio_request(S5PC100_GPH0(6), "GPH0");
smdkc100_lcd_power_set(&smdkc100_lcd_power_data, 0);
- samsung_bl_set(&smdkc100_bl_gpio_info, &smdkc100_bl_data);
-
platform_add_devices(smdkc100_devices, ARRAY_SIZE(smdkc100_devices));
+
+ samsung_bl_set(&smdkc100_bl_gpio_info, &smdkc100_bl_data);
}
MACHINE_START(SMDKC100, "SMDKC100")
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index d50b6f1..6d72bb99 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -218,6 +218,7 @@ static struct platform_device *smdkv210_devices[] __initdata = {
&s3c_device_i2c0,
&s3c_device_i2c1,
&s3c_device_i2c2,
+ &samsung_device_pwm,
&s3c_device_rtc,
&s3c_device_ts,
&s3c_device_usb_hsotg,
@@ -316,11 +317,11 @@ static void __init smdkv210_machine_init(void)
s3c_fb_set_platdata(&smdkv210_lcd0_pdata);
- samsung_bl_set(&smdkv210_bl_gpio_info, &smdkv210_bl_data);
-
s3c_hsotg_set_platdata(&smdkv210_hsotg_pdata);
platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
+
+ samsung_bl_set(&smdkv210_bl_gpio_info, &smdkv210_bl_data);
}
MACHINE_START(SMDKV210, "SMDKV210")
diff --git a/arch/arm/plat-samsung/dev-backlight.c b/arch/arm/plat-samsung/dev-backlight.c
index e467a01..d51f956 100644
--- a/arch/arm/plat-samsung/dev-backlight.c
+++ b/arch/arm/plat-samsung/dev-backlight.c
@@ -132,14 +132,6 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
if (bl_data->check_fb)
samsung_bl_data->check_fb = bl_data->check_fb;
- /* Register the specific PWM timer dev for Backlight control */
- ret = platform_device_register(
- &s3c_device_timer[samsung_bl_data->pwm_id]);
- if (ret) {
- printk(KERN_ERR "failed to register pwm timer for backlight: %d\n", ret);
- goto err_plat_reg1;
- }
-
/* Register the Backlight dev */
ret = platform_device_register(samsung_bl_device);
if (ret) {
@@ -150,8 +142,6 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
return;
err_plat_reg2:
- platform_device_unregister(&s3c_device_timer[samsung_bl_data->pwm_id]);
-err_plat_reg1:
kfree(samsung_bl_data);
err_data:
kfree(samsung_bl_device);
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 14/18] pwm: Remove superseded pwm-samsung-legacy driver
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (12 preceding siblings ...)
2013-06-20 22:12 ` [PATCH v2 13/18] ARM: SAMSUNG: Modify board files to use new PWM platform device Tomasz Figa
@ 2013-06-20 22:12 ` Tomasz Figa
2013-06-20 22:13 ` [PATCH v2 15/18] ARM: SAMSUNG: Remove old PWM timer platform devices Tomasz Figa
` (6 subsequent siblings)
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:12 UTC (permalink / raw)
To: linux-arm-kernel
This patch removes the now unused pwm-samsung-legacy driver, which was
replaced by new pwm-samsung driver.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
drivers/pwm/Makefile | 1 -
drivers/pwm/pwm-samsung-legacy.c | 353 ---------------------------------------
2 files changed, 354 deletions(-)
delete mode 100644 drivers/pwm/pwm-samsung-legacy.c
diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
index 833c3ac..94ba21e 100644
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
@@ -8,7 +8,6 @@ obj-$(CONFIG_PWM_LPC32XX) += pwm-lpc32xx.o
obj-$(CONFIG_PWM_MXS) += pwm-mxs.o
obj-$(CONFIG_PWM_PUV3) += pwm-puv3.o
obj-$(CONFIG_PWM_PXA) += pwm-pxa.o
-obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung-legacy.o
obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o
obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o
obj-$(CONFIG_PWM_TEGRA) += pwm-tegra.o
diff --git a/drivers/pwm/pwm-samsung-legacy.c b/drivers/pwm/pwm-samsung-legacy.c
deleted file mode 100644
index a0ece50..0000000
--- a/drivers/pwm/pwm-samsung-legacy.c
+++ /dev/null
@@ -1,353 +0,0 @@
-/* drivers/pwm/pwm-samsung.c
- *
- * Copyright (c) 2007 Ben Dooks
- * Copyright (c) 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
- *
- * S3C series PWM device core
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License.
-*/
-
-#define pr_fmt(fmt) "pwm-samsung: " fmt
-
-#include <linux/export.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/slab.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/pwm.h>
-
-#include <mach/map.h>
-
-#include <plat/regs-timer.h>
-
-struct s3c_chip {
- struct platform_device *pdev;
-
- struct clk *clk_div;
- struct clk *clk;
- const char *label;
-
- unsigned int period_ns;
- unsigned int duty_ns;
-
- unsigned char tcon_base;
- unsigned char pwm_id;
- struct pwm_chip chip;
-};
-
-#define to_s3c_chip(chip) container_of(chip, struct s3c_chip, chip)
-
-#define pwm_dbg(_pwm, msg...) dev_dbg(&(_pwm)->pdev->dev, msg)
-
-static struct clk *clk_scaler[2];
-
-static inline int pwm_is_tdiv(struct s3c_chip *chip)
-{
- return clk_get_parent(chip->clk) == chip->clk_div;
-}
-
-#define pwm_tcon_start(pwm) (1 << (pwm->tcon_base + 0))
-#define pwm_tcon_invert(pwm) (1 << (pwm->tcon_base + 2))
-#define pwm_tcon_autoreload(pwm) (1 << (pwm->tcon_base + 3))
-#define pwm_tcon_manulupdate(pwm) (1 << (pwm->tcon_base + 1))
-
-static int s3c_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
-{
- struct s3c_chip *s3c = to_s3c_chip(chip);
- unsigned long flags;
- unsigned long tcon;
-
- local_irq_save(flags);
-
- tcon = __raw_readl(S3C2410_TCON);
- tcon |= pwm_tcon_start(s3c);
- __raw_writel(tcon, S3C2410_TCON);
-
- local_irq_restore(flags);
-
- return 0;
-}
-
-static void s3c_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
-{
- struct s3c_chip *s3c = to_s3c_chip(chip);
- unsigned long flags;
- unsigned long tcon;
-
- local_irq_save(flags);
-
- tcon = __raw_readl(S3C2410_TCON);
- tcon &= ~pwm_tcon_start(s3c);
- __raw_writel(tcon, S3C2410_TCON);
-
- local_irq_restore(flags);
-}
-
-static unsigned long pwm_calc_tin(struct s3c_chip *s3c, unsigned long freq)
-{
- unsigned long tin_parent_rate;
- unsigned int div;
-
- tin_parent_rate = clk_get_rate(clk_get_parent(s3c->clk_div));
- pwm_dbg(s3c, "tin parent at %lu\n", tin_parent_rate);
-
- for (div = 2; div <= 16; div *= 2) {
- if ((tin_parent_rate / (div << 16)) < freq)
- return tin_parent_rate / div;
- }
-
- return tin_parent_rate / 16;
-}
-
-#define NS_IN_HZ (1000000000UL)
-
-static int s3c_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
- int duty_ns, int period_ns)
-{
- struct s3c_chip *s3c = to_s3c_chip(chip);
- unsigned long tin_rate;
- unsigned long tin_ns;
- unsigned long period;
- unsigned long flags;
- unsigned long tcon;
- unsigned long tcnt;
- long tcmp;
-
- /* We currently avoid using 64bit arithmetic by using the
- * fact that anything faster than 1Hz is easily representable
- * by 32bits. */
-
- if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
- return -ERANGE;
-
- if (period_ns == s3c->period_ns &&
- duty_ns == s3c->duty_ns)
- return 0;
-
- /* The TCMP and TCNT can be read without a lock, they're not
- * shared between the timers. */
-
- tcmp = __raw_readl(S3C2410_TCMPB(s3c->pwm_id));
- tcnt = __raw_readl(S3C2410_TCNTB(s3c->pwm_id));
-
- period = NS_IN_HZ / period_ns;
-
- pwm_dbg(s3c, "duty_ns=%d, period_ns=%d (%lu)\n",
- duty_ns, period_ns, period);
-
- /* Check to see if we are changing the clock rate of the PWM */
-
- if (s3c->period_ns != period_ns) {
- if (pwm_is_tdiv(s3c)) {
- tin_rate = pwm_calc_tin(s3c, period);
- clk_set_rate(s3c->clk_div, tin_rate);
- } else
- tin_rate = clk_get_rate(s3c->clk);
-
- s3c->period_ns = period_ns;
-
- pwm_dbg(s3c, "tin_rate=%lu\n", tin_rate);
-
- tin_ns = NS_IN_HZ / tin_rate;
- tcnt = period_ns / tin_ns;
- } else
- tin_ns = NS_IN_HZ / clk_get_rate(s3c->clk);
-
- /* Note, counters count down */
-
- tcmp = duty_ns / tin_ns;
- tcmp = tcnt - tcmp;
- /* the pwm hw only checks the compare register after a decrement,
- so the pin never toggles if tcmp = tcnt */
- if (tcmp == tcnt)
- tcmp--;
-
- pwm_dbg(s3c, "tin_ns=%lu, tcmp=%ld/%lu\n", tin_ns, tcmp, tcnt);
-
- if (tcmp < 0)
- tcmp = 0;
-
- /* Update the PWM register block. */
-
- local_irq_save(flags);
-
- __raw_writel(tcmp, S3C2410_TCMPB(s3c->pwm_id));
- __raw_writel(tcnt, S3C2410_TCNTB(s3c->pwm_id));
-
- tcon = __raw_readl(S3C2410_TCON);
- tcon |= pwm_tcon_manulupdate(s3c);
- tcon |= pwm_tcon_autoreload(s3c);
- __raw_writel(tcon, S3C2410_TCON);
-
- tcon &= ~pwm_tcon_manulupdate(s3c);
- __raw_writel(tcon, S3C2410_TCON);
-
- local_irq_restore(flags);
-
- return 0;
-}
-
-static struct pwm_ops s3c_pwm_ops = {
- .enable = s3c_pwm_enable,
- .disable = s3c_pwm_disable,
- .config = s3c_pwm_config,
- .owner = THIS_MODULE,
-};
-
-static int s3c_pwm_probe(struct platform_device *pdev)
-{
- struct device *dev = &pdev->dev;
- struct s3c_chip *s3c;
- unsigned long flags;
- unsigned long tcon;
- unsigned int id = pdev->id;
- int ret;
-
- if (id == 4) {
- dev_err(dev, "TIMER4 is currently not supported\n");
- return -ENXIO;
- }
-
- s3c = devm_kzalloc(&pdev->dev, sizeof(*s3c), GFP_KERNEL);
- if (s3c == NULL) {
- dev_err(dev, "failed to allocate pwm_device\n");
- return -ENOMEM;
- }
-
- /* calculate base of control bits in TCON */
- s3c->tcon_base = id == 0 ? 0 : (id * 4) + 4;
- s3c->pwm_id = id;
- s3c->chip.dev = &pdev->dev;
- s3c->chip.ops = &s3c_pwm_ops;
- s3c->chip.base = -1;
- s3c->chip.npwm = 1;
-
- s3c->clk = devm_clk_get(dev, "pwm-tin");
- if (IS_ERR(s3c->clk)) {
- dev_err(dev, "failed to get pwm tin clk\n");
- return PTR_ERR(s3c->clk);
- }
-
- s3c->clk_div = devm_clk_get(dev, "pwm-tdiv");
- if (IS_ERR(s3c->clk_div)) {
- dev_err(dev, "failed to get pwm tdiv clk\n");
- return PTR_ERR(s3c->clk_div);
- }
-
- clk_enable(s3c->clk);
- clk_enable(s3c->clk_div);
-
- local_irq_save(flags);
-
- tcon = __raw_readl(S3C2410_TCON);
- tcon |= pwm_tcon_invert(s3c);
- __raw_writel(tcon, S3C2410_TCON);
-
- local_irq_restore(flags);
-
- ret = pwmchip_add(&s3c->chip);
- if (ret < 0) {
- dev_err(dev, "failed to register pwm\n");
- goto err_clk_tdiv;
- }
-
- pwm_dbg(s3c, "config bits %02x\n",
- (__raw_readl(S3C2410_TCON) >> s3c->tcon_base) & 0x0f);
-
- dev_info(dev, "tin at %lu, tdiv at %lu, tin=%sclk, base %d\n",
- clk_get_rate(s3c->clk),
- clk_get_rate(s3c->clk_div),
- pwm_is_tdiv(s3c) ? "div" : "ext", s3c->tcon_base);
-
- platform_set_drvdata(pdev, s3c);
- return 0;
-
- err_clk_tdiv:
- clk_disable(s3c->clk_div);
- clk_disable(s3c->clk);
- return ret;
-}
-
-static int s3c_pwm_remove(struct platform_device *pdev)
-{
- struct s3c_chip *s3c = platform_get_drvdata(pdev);
- int err;
-
- err = pwmchip_remove(&s3c->chip);
- if (err < 0)
- return err;
-
- clk_disable(s3c->clk_div);
- clk_disable(s3c->clk);
-
- return 0;
-}
-
-#ifdef CONFIG_PM_SLEEP
-static int s3c_pwm_suspend(struct device *dev)
-{
- struct s3c_chip *s3c = dev_get_drvdata(dev);
-
- /* No one preserve these values during suspend so reset them
- * Otherwise driver leaves PWM unconfigured if same values
- * passed to pwm_config
- */
- s3c->period_ns = 0;
- s3c->duty_ns = 0;
-
- return 0;
-}
-
-static int s3c_pwm_resume(struct device *dev)
-{
- struct s3c_chip *s3c = dev_get_drvdata(dev);
- unsigned long tcon;
-
- /* Restore invertion */
- tcon = __raw_readl(S3C2410_TCON);
- tcon |= pwm_tcon_invert(s3c);
- __raw_writel(tcon, S3C2410_TCON);
-
- return 0;
-}
-#endif
-
-static SIMPLE_DEV_PM_OPS(s3c_pwm_pm_ops, s3c_pwm_suspend,
- s3c_pwm_resume);
-
-static struct platform_driver s3c_pwm_driver = {
- .driver = {
- .name = "s3c24xx-pwm",
- .owner = THIS_MODULE,
- .pm = &s3c_pwm_pm_ops,
- },
- .probe = s3c_pwm_probe,
- .remove = s3c_pwm_remove,
-};
-
-static int __init pwm_init(void)
-{
- int ret;
-
- clk_scaler[0] = clk_get(NULL, "pwm-scaler0");
- clk_scaler[1] = clk_get(NULL, "pwm-scaler1");
-
- if (IS_ERR(clk_scaler[0]) || IS_ERR(clk_scaler[1])) {
- pr_err("failed to get scaler clocks\n");
- return -EINVAL;
- }
-
- ret = platform_driver_register(&s3c_pwm_driver);
- if (ret)
- pr_err("failed to add pwm driver\n");
-
- return ret;
-}
-
-arch_initcall(pwm_init);
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 15/18] ARM: SAMSUNG: Remove old PWM timer platform devices
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (13 preceding siblings ...)
2013-06-20 22:12 ` [PATCH v2 14/18] pwm: Remove superseded pwm-samsung-legacy driver Tomasz Figa
@ 2013-06-20 22:13 ` Tomasz Figa
2013-06-20 22:13 ` [PATCH v2 16/18] ARM: SAMSUNG: Remove pwm-clock infrastructure Tomasz Figa
` (5 subsequent siblings)
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:13 UTC (permalink / raw)
To: linux-arm-kernel
This patch removes old Samsung PWM timer platform devices that are not
used any more.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
arch/arm/plat-samsung/devs.c | 18 ------------------
1 file changed, 18 deletions(-)
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 290f63a..8ce0ac0 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -1098,24 +1098,6 @@ arch_initcall(s5p_pmu_init);
/* PWM Timer */
#ifdef CONFIG_SAMSUNG_DEV_PWM
-
-#define DEFINE_S3C_TIMER(_tmr_no) \
- .name = "s3c24xx-pwm", \
- .id = _tmr_no, \
-
-/*
- * since we already have an static mapping for the timer,
- * we do not bother setting any IO resource for the base.
- */
-
-struct platform_device s3c_device_timer[] = {
- [0] = { DEFINE_S3C_TIMER(0) },
- [1] = { DEFINE_S3C_TIMER(1) },
- [2] = { DEFINE_S3C_TIMER(2) },
- [3] = { DEFINE_S3C_TIMER(3) },
- [4] = { DEFINE_S3C_TIMER(4) },
-};
-
static struct resource samsung_pwm_resource[] = {
DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
};
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 16/18] ARM: SAMSUNG: Remove pwm-clock infrastructure
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (14 preceding siblings ...)
2013-06-20 22:13 ` [PATCH v2 15/18] ARM: SAMSUNG: Remove old PWM timer platform devices Tomasz Figa
@ 2013-06-20 22:13 ` Tomasz Figa
2013-06-20 22:13 ` [PATCH v2 17/18] ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header Tomasz Figa
` (4 subsequent siblings)
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:13 UTC (permalink / raw)
To: linux-arm-kernel
Since all the used PWM prescalers and dividers configuration has been
moved to appropriate drivers, the pwm-clock infrastructure is now
unused and so this patch removes it.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
arch/arm/mach-s3c24xx/clock-s3c2410.c | 1 -
arch/arm/mach-s3c24xx/clock-s3c2412.c | 1 -
arch/arm/mach-s3c24xx/clock-s3c2416.c | 2 -
arch/arm/mach-s3c24xx/clock-s3c2443.c | 2 -
arch/arm/mach-s3c64xx/clock.c | 2 -
arch/arm/mach-s5p64x0/clock-s5p6440.c | 2 -
arch/arm/mach-s5p64x0/clock-s5p6450.c | 2 -
arch/arm/mach-s5pc100/clock.c | 2 -
arch/arm/mach-s5pv210/clock.c | 1 -
arch/arm/plat-samsung/Makefile | 1 -
arch/arm/plat-samsung/include/plat/clock.h | 4 -
arch/arm/plat-samsung/include/plat/pwm-clock.h | 81 -----
arch/arm/plat-samsung/pwm-clock.c | 474 -------------------------
13 files changed, 575 deletions(-)
delete mode 100644 arch/arm/plat-samsung/include/plat/pwm-clock.h
delete mode 100644 arch/arm/plat-samsung/pwm-clock.c
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2410.c b/arch/arm/mach-s3c24xx/clock-s3c2410.c
index 34fffdf..afa0267 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2410.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2410.c
@@ -246,6 +246,5 @@ int __init s3c2410_baseclk_add(void)
(clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on",
(clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on");
- s3c_pwmclk_init();
return 0;
}
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2412.c b/arch/arm/mach-s3c24xx/clock-s3c2412.c
index 2cc017d..d8f253f 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2412.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2412.c
@@ -757,6 +757,5 @@ int __init s3c2412_baseclk_add(void)
}
clkdev_add_table(s3c2412_clk_lookup, ARRAY_SIZE(s3c2412_clk_lookup));
- s3c_pwmclk_init();
return 0;
}
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2416.c b/arch/arm/mach-s3c24xx/clock-s3c2416.c
index 036056ce..d421a72 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2416.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2416.c
@@ -168,6 +168,4 @@ void __init s3c2416_init_clocks(int xtal)
s3c24xx_register_clock(&hsmmc0_clk);
clkdev_add_table(s3c2416_clk_lookup, ARRAY_SIZE(s3c2416_clk_lookup));
- s3c_pwmclk_init();
-
}
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c b/arch/arm/mach-s3c24xx/clock-s3c2443.c
index 0a53051..76cd31f 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2443.c
@@ -209,6 +209,4 @@ void __init s3c2443_init_clocks(int xtal)
s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
clkdev_add_table(s3c2443_clk_lookup, ARRAY_SIZE(s3c2443_clk_lookup));
-
- s3c_pwmclk_init();
}
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 8499415..c1bcc4a 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -1004,6 +1004,4 @@ void __init s3c64xx_register_clocks(unsigned long xtal,
for (cnt = 0; cnt < ARRAY_SIZE(clksrc_cdev); cnt++)
s3c_register_clksrc(clksrc_cdev[cnt], 1);
clkdev_add_table(s3c64xx_clk_lookup, ARRAY_SIZE(s3c64xx_clk_lookup));
-
- s3c_pwmclk_init();
}
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index 35378152..ae34a1d 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -629,6 +629,4 @@ void __init s5p6440_register_clocks(void)
clkdev_add_table(s5p6440_clk_lookup, ARRAY_SIZE(s5p6440_clk_lookup));
s3c24xx_register_clock(&dummy_apb_pclk);
-
- s3c_pwmclk_init();
}
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index af384dd..0b3ca2e 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -698,6 +698,4 @@ void __init s5p6450_register_clocks(void)
clkdev_add_table(s5p6450_clk_lookup, ARRAY_SIZE(s5p6450_clk_lookup));
s3c24xx_register_clock(&dummy_apb_pclk);
-
- s3c_pwmclk_init();
}
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index a206dc3..d0dc10e 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -1358,6 +1358,4 @@ void __init s5pc100_register_clocks(void)
s3c_disable_clocks(clk_cdev[ptr], 1);
s3c24xx_register_clock(&dummy_apb_pclk);
-
- s3c_pwmclk_init();
}
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index f051f53..ca46372 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -1362,5 +1362,4 @@ void __init s5pv210_register_clocks(void)
for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
s3c_disable_clocks(clk_cdev[ptr], 1);
- s3c_pwmclk_init();
}
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index aafbe56..5d7f839 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -14,7 +14,6 @@ obj- :=
obj-y += init.o cpu.o
obj-$(CONFIG_SAMSUNG_CLOCK) += clock.o
-obj-$(CONFIG_SAMSUNG_CLOCK) += pwm-clock.o
obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o
obj-$(CONFIG_S5P_CLOCK) += s5p-clock.o
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index a62753d..254c3dd 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -140,10 +140,6 @@ extern int s3c2443_clkcon_enable_s(struct clk *clk, int enable);
extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
-/* Init for pwm clock code */
-
-extern void s3c_pwmclk_init(void);
-
/* Global watchdog clock used by arch_wtd_reset() callback */
extern struct clk *s3c2410_wdtclk;
diff --git a/arch/arm/plat-samsung/include/plat/pwm-clock.h b/arch/arm/plat-samsung/include/plat/pwm-clock.h
deleted file mode 100644
index bf6a60e..0000000
--- a/arch/arm/plat-samsung/include/plat/pwm-clock.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/pwm-clock.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * SAMSUNG - pwm clock and timer support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_PLAT_PWM_CLOCK_H
-#define __ASM_PLAT_PWM_CLOCK_H __FILE__
-
-/**
- * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
- * @tcfg: The timer TCFG1 register bits shifted down to 0.
- *
- * Return true if the given configuration from TCFG1 is a TCLK instead
- * any of the TDIV clocks.
- */
-static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
-{
- if (soc_is_s3c24xx())
- return tcfg == S3C2410_TCFG1_MUX_TCLK;
- else if (soc_is_s3c64xx() || soc_is_s5pc100())
- return tcfg >= S3C64XX_TCFG1_MUX_TCLK;
- else if (soc_is_s5p6440() || soc_is_s5p6450())
- return 0;
- else
- return tcfg == S3C64XX_TCFG1_MUX_TCLK;
-}
-
-/**
- * tcfg_to_divisor() - convert tcfg1 setting to a divisor
- * @tcfg1: The tcfg1 setting, shifted down.
- *
- * Get the divisor value for the given tcfg1 setting. We assume the
- * caller has already checked to see if this is not a TCLK source.
- */
-static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
-{
- if (soc_is_s3c24xx())
- return 1 << (tcfg1 + 1);
- else
- return 1 << tcfg1;
-}
-
-/**
- * pwm_tdiv_has_div1() - does the tdiv setting have a /1
- *
- * Return true if we have a /1 in the tdiv setting.
- */
-static inline unsigned int pwm_tdiv_has_div1(void)
-{
- if (soc_is_s3c24xx())
- return 0;
- else
- return 1;
-}
-
-/**
- * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
- * @div: The divisor to calculate the bit information for.
- *
- * Turn a divisor into the necessary bit field for TCFG1.
- */
-static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
-{
- if (soc_is_s3c24xx())
- return ilog2(div) - 1;
- else
- return ilog2(div);
-}
-#endif /* __ASM_PLAT_PWM_CLOCK_H */
diff --git a/arch/arm/plat-samsung/pwm-clock.c b/arch/arm/plat-samsung/pwm-clock.c
deleted file mode 100644
index a35ff3b..0000000
--- a/arch/arm/plat-samsung/pwm-clock.c
+++ /dev/null
@@ -1,474 +0,0 @@
-/* linux/arch/arm/plat-s3c24xx/pwm-clock.c
- *
- * Copyright (c) 2007 Simtec Electronics
- * Copyright (c) 2007, 2008 Ben Dooks
- * Ben Dooks <ben-linux@fluff.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/log2.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <asm/irq.h>
-
-#include <plat/clock.h>
-#include <plat/cpu.h>
-
-#include <plat/regs-timer.h>
-#include <plat/pwm-clock.h>
-
-/* Each of the timers 0 through 5 go through the following
- * clock tree, with the inputs depending on the timers.
- *
- * pclk ---- [ prescaler 0 ] -+---> timer 0
- * +---> timer 1
- *
- * pclk ---- [ prescaler 1 ] -+---> timer 2
- * +---> timer 3
- * \---> timer 4
- *
- * Which are fed into the timers as so:
- *
- * prescaled 0 ---- [ div 2,4,8,16 ] ---\
- * [mux] -> timer 0
- * tclk 0 ------------------------------/
- *
- * prescaled 0 ---- [ div 2,4,8,16 ] ---\
- * [mux] -> timer 1
- * tclk 0 ------------------------------/
- *
- *
- * prescaled 1 ---- [ div 2,4,8,16 ] ---\
- * [mux] -> timer 2
- * tclk 1 ------------------------------/
- *
- * prescaled 1 ---- [ div 2,4,8,16 ] ---\
- * [mux] -> timer 3
- * tclk 1 ------------------------------/
- *
- * prescaled 1 ---- [ div 2,4,8, 16 ] --\
- * [mux] -> timer 4
- * tclk 1 ------------------------------/
- *
- * Since the mux and the divider are tied together in the
- * same register space, it is impossible to set the parent
- * and the rate at the same time. To avoid this, we add an
- * intermediate 'prescaled-and-divided' clock to select
- * as the parent for the timer input clock called tdiv.
- *
- * prescaled clk --> pwm-tdiv ---\
- * [ mux ] --> timer X
- * tclk -------------------------/
-*/
-
-static struct clk clk_timer_scaler[];
-
-static unsigned long clk_pwm_scaler_get_rate(struct clk *clk)
-{
- unsigned long tcfg0 = __raw_readl(S3C2410_TCFG0);
-
- if (clk == &clk_timer_scaler[1]) {
- tcfg0 &= S3C2410_TCFG_PRESCALER1_MASK;
- tcfg0 >>= S3C2410_TCFG_PRESCALER1_SHIFT;
- } else {
- tcfg0 &= S3C2410_TCFG_PRESCALER0_MASK;
- }
-
- return clk_get_rate(clk->parent) / (tcfg0 + 1);
-}
-
-static unsigned long clk_pwm_scaler_round_rate(struct clk *clk,
- unsigned long rate)
-{
- unsigned long parent_rate = clk_get_rate(clk->parent);
- unsigned long divisor = parent_rate / rate;
-
- if (divisor > 256)
- divisor = 256;
- else if (divisor < 2)
- divisor = 2;
-
- return parent_rate / divisor;
-}
-
-static int clk_pwm_scaler_set_rate(struct clk *clk, unsigned long rate)
-{
- unsigned long round = clk_pwm_scaler_round_rate(clk, rate);
- unsigned long tcfg0;
- unsigned long divisor;
- unsigned long flags;
-
- divisor = clk_get_rate(clk->parent) / round;
- divisor--;
-
- local_irq_save(flags);
- tcfg0 = __raw_readl(S3C2410_TCFG0);
-
- if (clk == &clk_timer_scaler[1]) {
- tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
- tcfg0 |= divisor << S3C2410_TCFG_PRESCALER1_SHIFT;
- } else {
- tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK;
- tcfg0 |= divisor;
- }
-
- __raw_writel(tcfg0, S3C2410_TCFG0);
- local_irq_restore(flags);
-
- return 0;
-}
-
-static struct clk_ops clk_pwm_scaler_ops = {
- .get_rate = clk_pwm_scaler_get_rate,
- .set_rate = clk_pwm_scaler_set_rate,
- .round_rate = clk_pwm_scaler_round_rate,
-};
-
-static struct clk clk_timer_scaler[] = {
- [0] = {
- .name = "pwm-scaler0",
- .id = -1,
- .ops = &clk_pwm_scaler_ops,
- },
- [1] = {
- .name = "pwm-scaler1",
- .id = -1,
- .ops = &clk_pwm_scaler_ops,
- },
-};
-
-static struct clk clk_timer_tclk[] = {
- [0] = {
- .name = "pwm-tclk0",
- .id = -1,
- },
- [1] = {
- .name = "pwm-tclk1",
- .id = -1,
- },
-};
-
-struct pwm_tdiv_clk {
- struct clk clk;
- unsigned int divisor;
-};
-
-static inline struct pwm_tdiv_clk *to_tdiv(struct clk *clk)
-{
- return container_of(clk, struct pwm_tdiv_clk, clk);
-}
-
-static unsigned long clk_pwm_tdiv_get_rate(struct clk *clk)
-{
- unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
- unsigned int divisor;
-
- tcfg1 >>= S3C2410_TCFG1_SHIFT(clk->id);
- tcfg1 &= S3C2410_TCFG1_MUX_MASK;
-
- if (pwm_cfg_src_is_tclk(tcfg1))
- divisor = to_tdiv(clk)->divisor;
- else
- divisor = tcfg_to_divisor(tcfg1);
-
- return clk_get_rate(clk->parent) / divisor;
-}
-
-static unsigned long clk_pwm_tdiv_round_rate(struct clk *clk,
- unsigned long rate)
-{
- unsigned long parent_rate;
- unsigned long divisor;
-
- parent_rate = clk_get_rate(clk->parent);
- divisor = parent_rate / rate;
-
- if (divisor <= 1 && pwm_tdiv_has_div1())
- divisor = 1;
- else if (divisor <= 2)
- divisor = 2;
- else if (divisor <= 4)
- divisor = 4;
- else if (divisor <= 8)
- divisor = 8;
- else
- divisor = 16;
-
- return parent_rate / divisor;
-}
-
-static unsigned long clk_pwm_tdiv_bits(struct pwm_tdiv_clk *divclk)
-{
- return pwm_tdiv_div_bits(divclk->divisor);
-}
-
-static void clk_pwm_tdiv_update(struct pwm_tdiv_clk *divclk)
-{
- unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
- unsigned long bits = clk_pwm_tdiv_bits(divclk);
- unsigned long flags;
- unsigned long shift = S3C2410_TCFG1_SHIFT(divclk->clk.id);
-
- local_irq_save(flags);
-
- tcfg1 = __raw_readl(S3C2410_TCFG1);
- tcfg1 &= ~(S3C2410_TCFG1_MUX_MASK << shift);
- tcfg1 |= bits << shift;
- __raw_writel(tcfg1, S3C2410_TCFG1);
-
- local_irq_restore(flags);
-}
-
-static int clk_pwm_tdiv_set_rate(struct clk *clk, unsigned long rate)
-{
- struct pwm_tdiv_clk *divclk = to_tdiv(clk);
- unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
- unsigned long parent_rate = clk_get_rate(clk->parent);
- unsigned long divisor;
-
- tcfg1 >>= S3C2410_TCFG1_SHIFT(clk->id);
- tcfg1 &= S3C2410_TCFG1_MUX_MASK;
-
- rate = clk_round_rate(clk, rate);
- divisor = parent_rate / rate;
-
- if (divisor > 16)
- return -EINVAL;
-
- divclk->divisor = divisor;
-
- /* Update the current MUX settings if we are currently
- * selected as the clock source for this clock. */
-
- if (!pwm_cfg_src_is_tclk(tcfg1))
- clk_pwm_tdiv_update(divclk);
-
- return 0;
-}
-
-static struct clk_ops clk_tdiv_ops = {
- .get_rate = clk_pwm_tdiv_get_rate,
- .set_rate = clk_pwm_tdiv_set_rate,
- .round_rate = clk_pwm_tdiv_round_rate,
-};
-
-static struct pwm_tdiv_clk clk_timer_tdiv[] = {
- [0] = {
- .clk = {
- .name = "pwm-tdiv",
- .devname = "s3c24xx-pwm.0",
- .ops = &clk_tdiv_ops,
- .parent = &clk_timer_scaler[0],
- },
- },
- [1] = {
- .clk = {
- .name = "pwm-tdiv",
- .devname = "s3c24xx-pwm.1",
- .ops = &clk_tdiv_ops,
- .parent = &clk_timer_scaler[0],
- }
- },
- [2] = {
- .clk = {
- .name = "pwm-tdiv",
- .devname = "s3c24xx-pwm.2",
- .ops = &clk_tdiv_ops,
- .parent = &clk_timer_scaler[1],
- },
- },
- [3] = {
- .clk = {
- .name = "pwm-tdiv",
- .devname = "s3c24xx-pwm.3",
- .ops = &clk_tdiv_ops,
- .parent = &clk_timer_scaler[1],
- },
- },
- [4] = {
- .clk = {
- .name = "pwm-tdiv",
- .devname = "s3c24xx-pwm.4",
- .ops = &clk_tdiv_ops,
- .parent = &clk_timer_scaler[1],
- },
- },
-};
-
-static int __init clk_pwm_tdiv_register(unsigned int id)
-{
- struct pwm_tdiv_clk *divclk = &clk_timer_tdiv[id];
- unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
-
- tcfg1 >>= S3C2410_TCFG1_SHIFT(id);
- tcfg1 &= S3C2410_TCFG1_MUX_MASK;
-
- divclk->clk.id = id;
- divclk->divisor = tcfg_to_divisor(tcfg1);
-
- return s3c24xx_register_clock(&divclk->clk);
-}
-
-static inline struct clk *s3c24xx_pwmclk_tclk(unsigned int id)
-{
- return (id >= 2) ? &clk_timer_tclk[1] : &clk_timer_tclk[0];
-}
-
-static inline struct clk *s3c24xx_pwmclk_tdiv(unsigned int id)
-{
- return &clk_timer_tdiv[id].clk;
-}
-
-static int clk_pwm_tin_set_parent(struct clk *clk, struct clk *parent)
-{
- unsigned int id = clk->id;
- unsigned long tcfg1;
- unsigned long flags;
- unsigned long bits;
- unsigned long shift = S3C2410_TCFG1_SHIFT(id);
-
- unsigned long mux_tclk;
-
- if (soc_is_s3c24xx())
- mux_tclk = S3C2410_TCFG1_MUX_TCLK;
- else if (soc_is_s5p6440() || soc_is_s5p6450())
- mux_tclk = 0;
- else
- mux_tclk = S3C64XX_TCFG1_MUX_TCLK;
-
- if (parent == s3c24xx_pwmclk_tclk(id))
- bits = mux_tclk << shift;
- else if (parent == s3c24xx_pwmclk_tdiv(id))
- bits = clk_pwm_tdiv_bits(to_tdiv(parent)) << shift;
- else
- return -EINVAL;
-
- clk->parent = parent;
-
- local_irq_save(flags);
-
- tcfg1 = __raw_readl(S3C2410_TCFG1);
- tcfg1 &= ~(S3C2410_TCFG1_MUX_MASK << shift);
- __raw_writel(tcfg1 | bits, S3C2410_TCFG1);
-
- local_irq_restore(flags);
-
- return 0;
-}
-
-static struct clk_ops clk_tin_ops = {
- .set_parent = clk_pwm_tin_set_parent,
-};
-
-static struct clk clk_tin[] = {
- [0] = {
- .name = "pwm-tin",
- .devname = "s3c24xx-pwm.0",
- .id = 0,
- .ops = &clk_tin_ops,
- },
- [1] = {
- .name = "pwm-tin",
- .devname = "s3c24xx-pwm.1",
- .id = 1,
- .ops = &clk_tin_ops,
- },
- [2] = {
- .name = "pwm-tin",
- .devname = "s3c24xx-pwm.2",
- .id = 2,
- .ops = &clk_tin_ops,
- },
- [3] = {
- .name = "pwm-tin",
- .devname = "s3c24xx-pwm.3",
- .id = 3,
- .ops = &clk_tin_ops,
- },
- [4] = {
- .name = "pwm-tin",
- .devname = "s3c24xx-pwm.4",
- .id = 4,
- .ops = &clk_tin_ops,
- },
-};
-
-static __init int clk_pwm_tin_register(struct clk *pwm)
-{
- unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
- unsigned int id = pwm->id;
-
- struct clk *parent;
- int ret;
-
- ret = s3c24xx_register_clock(pwm);
- if (ret < 0)
- return ret;
-
- tcfg1 >>= S3C2410_TCFG1_SHIFT(id);
- tcfg1 &= S3C2410_TCFG1_MUX_MASK;
-
- if (pwm_cfg_src_is_tclk(tcfg1))
- parent = s3c24xx_pwmclk_tclk(id);
- else
- parent = s3c24xx_pwmclk_tdiv(id);
-
- return clk_set_parent(pwm, parent);
-}
-
-/**
- * s3c_pwmclk_init() - initialise pwm clocks
- *
- * Initialise and register the clocks which provide the inputs for the
- * pwm timer blocks.
- *
- * Note, this call is required by the time core, so must be called after
- * the base clocks are added and before any of the initcalls are run.
- */
-__init void s3c_pwmclk_init(void)
-{
- struct clk *clk_timers;
- unsigned int clk;
- int ret;
-
- clk_timers = clk_get(NULL, "timers");
- if (IS_ERR(clk_timers)) {
- printk(KERN_ERR "%s: no parent clock\n", __func__);
- return;
- }
-
- for (clk = 0; clk < ARRAY_SIZE(clk_timer_scaler); clk++)
- clk_timer_scaler[clk].parent = clk_timers;
-
- s3c_register_clocks(clk_timer_scaler, ARRAY_SIZE(clk_timer_scaler));
- s3c_register_clocks(clk_timer_tclk, ARRAY_SIZE(clk_timer_tclk));
-
- for (clk = 0; clk < ARRAY_SIZE(clk_timer_tdiv); clk++) {
- ret = clk_pwm_tdiv_register(clk);
-
- if (ret < 0) {
- printk(KERN_ERR "error adding pwm%d tdiv clock\n", clk);
- return;
- }
- }
-
- for (clk = 0; clk < ARRAY_SIZE(clk_tin); clk++) {
- ret = clk_pwm_tin_register(&clk_tin[clk]);
- if (ret < 0) {
- printk(KERN_ERR "error adding pwm%d tin clock\n", clk);
- return;
- }
- }
-}
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 17/18] ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (15 preceding siblings ...)
2013-06-20 22:13 ` [PATCH v2 16/18] ARM: SAMSUNG: Remove pwm-clock infrastructure Tomasz Figa
@ 2013-06-20 22:13 ` Tomasz Figa
2013-06-20 22:13 ` [PATCH v2 18/18] ARM: SAMSUNG: Remove " Tomasz Figa
` (3 subsequent siblings)
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:13 UTC (permalink / raw)
To: linux-arm-kernel
This patch removes remaining inclusions of plat/regs-timer.h as
a preparation to remove the header.
As a part of this, things like save and restore of PWM registers are
removed from SoC-specific code, because it is handled in appropriate
drivers now.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
arch/arm/mach-s3c64xx/irq-pm.c | 2 --
arch/arm/mach-s5p64x0/pm.c | 3 ---
arch/arm/mach-s5pv210/pm.c | 10 ----------
arch/arm/plat-samsung/s5p-irq.c | 1 -
4 files changed, 16 deletions(-)
diff --git a/arch/arm/mach-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c
index 0c7e1d9..c3da1b6 100644
--- a/arch/arm/mach-s3c64xx/irq-pm.c
+++ b/arch/arm/mach-s3c64xx/irq-pm.c
@@ -22,7 +22,6 @@
#include <mach/map.h>
#include <plat/regs-serial.h>
-#include <plat/regs-timer.h>
#include <mach/regs-gpio.h>
#include <plat/cpu.h>
#include <plat/pm.h>
@@ -43,7 +42,6 @@ static struct sleep_save irq_save[] = {
SAVE_ITEM(S3C64XX_EINT0FLTCON2),
SAVE_ITEM(S3C64XX_EINT0FLTCON3),
SAVE_ITEM(S3C64XX_EINT0MASK),
- SAVE_ITEM(S3C64XX_TINT_CSTAT),
};
static struct irq_grp_save {
diff --git a/arch/arm/mach-s5p64x0/pm.c b/arch/arm/mach-s5p64x0/pm.c
index 97c2a08a..861e15c 100644
--- a/arch/arm/mach-s5p64x0/pm.c
+++ b/arch/arm/mach-s5p64x0/pm.c
@@ -18,7 +18,6 @@
#include <plat/cpu.h>
#include <plat/pm.h>
-#include <plat/regs-timer.h>
#include <plat/wakeup-mask.h>
#include <mach/regs-clock.h>
@@ -48,8 +47,6 @@ static struct sleep_save s5p64x0_misc_save[] = {
SAVE_ITEM(S5P64X0_MEM0CONSLP1),
SAVE_ITEM(S5P64X0_MEM0DRVCON),
SAVE_ITEM(S5P64X0_MEM1DRVCON),
-
- SAVE_ITEM(S3C64XX_TINT_CSTAT),
};
/* DPLL is present only in S5P6450 */
diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c
index 2b68a67..3cf3f9c 100644
--- a/arch/arm/mach-s5pv210/pm.c
+++ b/arch/arm/mach-s5pv210/pm.c
@@ -21,7 +21,6 @@
#include <plat/cpu.h>
#include <plat/pm.h>
-#include <plat/regs-timer.h>
#include <mach/regs-irq.h>
#include <mach/regs-clock.h>
@@ -77,15 +76,6 @@ static struct sleep_save s5pv210_core_save[] = {
/* Clock ETC */
SAVE_ITEM(S5P_CLK_OUT),
SAVE_ITEM(S5P_MDNIE_SEL),
-
- /* PWM Register */
- SAVE_ITEM(S3C2410_TCFG0),
- SAVE_ITEM(S3C2410_TCFG1),
- SAVE_ITEM(S3C64XX_TINT_CSTAT),
- SAVE_ITEM(S3C2410_TCON),
- SAVE_ITEM(S3C2410_TCNTB(0)),
- SAVE_ITEM(S3C2410_TCMPB(0)),
- SAVE_ITEM(S3C2410_TCNTO(0)),
};
static int s5pv210_cpu_suspend(unsigned long arg)
diff --git a/arch/arm/plat-samsung/s5p-irq.c b/arch/arm/plat-samsung/s5p-irq.c
index 6729cb2..ddfaca9 100644
--- a/arch/arm/plat-samsung/s5p-irq.c
+++ b/arch/arm/plat-samsung/s5p-irq.c
@@ -17,7 +17,6 @@
#include <mach/irqs.h>
#include <mach/map.h>
-#include <plat/regs-timer.h>
#include <plat/cpu.h>
void __init s5p_init_irq(u32 *vic, u32 num_vic)
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 18/18] ARM: SAMSUNG: Remove plat/regs-timer.h header
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (16 preceding siblings ...)
2013-06-20 22:13 ` [PATCH v2 17/18] ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header Tomasz Figa
@ 2013-06-20 22:13 ` Tomasz Figa
2013-06-20 23:05 ` [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (2 subsequent siblings)
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 22:13 UTC (permalink / raw)
To: linux-arm-kernel
Since all uses of the header has been removed by previous patches it can
be removed safely.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
arch/arm/plat-samsung/include/plat/regs-timer.h | 124 ------------------------
1 file changed, 124 deletions(-)
delete mode 100644 arch/arm/plat-samsung/include/plat/regs-timer.h
diff --git a/arch/arm/plat-samsung/include/plat/regs-timer.h b/arch/arm/plat-samsung/include/plat/regs-timer.h
deleted file mode 100644
index d097d92..0000000
--- a/arch/arm/plat-samsung/include/plat/regs-timer.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-timer.h
- *
- * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
- * http://www.simtec.co.uk/products/SWLINUX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2410 Timer configuration
-*/
-
-#ifndef __ASM_ARCH_REGS_TIMER_H
-#define __ASM_ARCH_REGS_TIMER_H
-
-#define S3C_TIMERREG(x) (S3C_VA_TIMER + (x))
-#define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c))
-
-#define S3C2410_TCFG0 S3C_TIMERREG(0x00)
-#define S3C2410_TCFG1 S3C_TIMERREG(0x04)
-#define S3C2410_TCON S3C_TIMERREG(0x08)
-
-#define S3C64XX_TINT_CSTAT S3C_TIMERREG(0x44)
-
-#define S3C2410_TCFG_PRESCALER0_MASK (255<<0)
-#define S3C2410_TCFG_PRESCALER1_MASK (255<<8)
-#define S3C2410_TCFG_PRESCALER1_SHIFT (8)
-#define S3C2410_TCFG_DEADZONE_MASK (255<<16)
-#define S3C2410_TCFG_DEADZONE_SHIFT (16)
-
-#define S3C2410_TCFG1_MUX4_DIV2 (0<<16)
-#define S3C2410_TCFG1_MUX4_DIV4 (1<<16)
-#define S3C2410_TCFG1_MUX4_DIV8 (2<<16)
-#define S3C2410_TCFG1_MUX4_DIV16 (3<<16)
-#define S3C2410_TCFG1_MUX4_TCLK1 (4<<16)
-#define S3C2410_TCFG1_MUX4_MASK (15<<16)
-#define S3C2410_TCFG1_MUX4_SHIFT (16)
-
-#define S3C2410_TCFG1_MUX3_DIV2 (0<<12)
-#define S3C2410_TCFG1_MUX3_DIV4 (1<<12)
-#define S3C2410_TCFG1_MUX3_DIV8 (2<<12)
-#define S3C2410_TCFG1_MUX3_DIV16 (3<<12)
-#define S3C2410_TCFG1_MUX3_TCLK1 (4<<12)
-#define S3C2410_TCFG1_MUX3_MASK (15<<12)
-
-
-#define S3C2410_TCFG1_MUX2_DIV2 (0<<8)
-#define S3C2410_TCFG1_MUX2_DIV4 (1<<8)
-#define S3C2410_TCFG1_MUX2_DIV8 (2<<8)
-#define S3C2410_TCFG1_MUX2_DIV16 (3<<8)
-#define S3C2410_TCFG1_MUX2_TCLK1 (4<<8)
-#define S3C2410_TCFG1_MUX2_MASK (15<<8)
-
-
-#define S3C2410_TCFG1_MUX1_DIV2 (0<<4)
-#define S3C2410_TCFG1_MUX1_DIV4 (1<<4)
-#define S3C2410_TCFG1_MUX1_DIV8 (2<<4)
-#define S3C2410_TCFG1_MUX1_DIV16 (3<<4)
-#define S3C2410_TCFG1_MUX1_TCLK0 (4<<4)
-#define S3C2410_TCFG1_MUX1_MASK (15<<4)
-
-#define S3C2410_TCFG1_MUX0_DIV2 (0<<0)
-#define S3C2410_TCFG1_MUX0_DIV4 (1<<0)
-#define S3C2410_TCFG1_MUX0_DIV8 (2<<0)
-#define S3C2410_TCFG1_MUX0_DIV16 (3<<0)
-#define S3C2410_TCFG1_MUX0_TCLK0 (4<<0)
-#define S3C2410_TCFG1_MUX0_MASK (15<<0)
-
-#define S3C2410_TCFG1_MUX_DIV2 (0<<0)
-#define S3C2410_TCFG1_MUX_DIV4 (1<<0)
-#define S3C2410_TCFG1_MUX_DIV8 (2<<0)
-#define S3C2410_TCFG1_MUX_DIV16 (3<<0)
-#define S3C2410_TCFG1_MUX_TCLK (4<<0)
-#define S3C2410_TCFG1_MUX_MASK (15<<0)
-
-#define S3C64XX_TCFG1_MUX_DIV1 (0<<0)
-#define S3C64XX_TCFG1_MUX_DIV2 (1<<0)
-#define S3C64XX_TCFG1_MUX_DIV4 (2<<0)
-#define S3C64XX_TCFG1_MUX_DIV8 (3<<0)
-#define S3C64XX_TCFG1_MUX_DIV16 (4<<0)
-#define S3C64XX_TCFG1_MUX_TCLK (5<<0) /* 3 sets of TCLK */
-#define S3C64XX_TCFG1_MUX_MASK (15<<0)
-
-#define S3C2410_TCFG1_SHIFT(x) ((x) * 4)
-
-/* for each timer, we have an count buffer, an compare buffer and
- * an observation buffer
-*/
-
-/* WARNING - timer 4 has no buffer reg, and it's observation is@+4 */
-
-#define S3C2410_TCNTB(tmr) S3C_TIMERREG2(tmr, 0x00)
-#define S3C2410_TCMPB(tmr) S3C_TIMERREG2(tmr, 0x04)
-#define S3C2410_TCNTO(tmr) S3C_TIMERREG2(tmr, (((tmr) == 4) ? 0x04 : 0x08))
-
-#define S3C2410_TCON_T4RELOAD (1<<22)
-#define S3C2410_TCON_T4MANUALUPD (1<<21)
-#define S3C2410_TCON_T4START (1<<20)
-
-#define S3C2410_TCON_T3RELOAD (1<<19)
-#define S3C2410_TCON_T3INVERT (1<<18)
-#define S3C2410_TCON_T3MANUALUPD (1<<17)
-#define S3C2410_TCON_T3START (1<<16)
-
-#define S3C2410_TCON_T2RELOAD (1<<15)
-#define S3C2410_TCON_T2INVERT (1<<14)
-#define S3C2410_TCON_T2MANUALUPD (1<<13)
-#define S3C2410_TCON_T2START (1<<12)
-
-#define S3C2410_TCON_T1RELOAD (1<<11)
-#define S3C2410_TCON_T1INVERT (1<<10)
-#define S3C2410_TCON_T1MANUALUPD (1<<9)
-#define S3C2410_TCON_T1START (1<<8)
-
-#define S3C2410_TCON_T0DEADZONE (1<<4)
-#define S3C2410_TCON_T0RELOAD (1<<3)
-#define S3C2410_TCON_T0INVERT (1<<2)
-#define S3C2410_TCON_T0MANUALUPD (1<<1)
-#define S3C2410_TCON_T0START (1<<0)
-
-#endif /* __ASM_ARCH_REGS_TIMER_H */
-
-
-
--
1.8.2.1
^ permalink raw reply related [flat|nested] 45+ messages in thread* [PATCH v2 00/18] Final Samsung PWM support cleanup
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (17 preceding siblings ...)
2013-06-20 22:13 ` [PATCH v2 18/18] ARM: SAMSUNG: Remove " Tomasz Figa
@ 2013-06-20 23:05 ` Tomasz Figa
2013-06-21 14:04 ` Arnd Bergmann
2013-06-22 18:01 ` Heiko Stübner
20 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-20 23:05 UTC (permalink / raw)
To: linux-arm-kernel
Hi All,
On Friday 21 of June 2013 00:12:45 Tomasz Figa wrote:
> Since we now have a proper Samsung PWM clocksource driver in place,
> we can proceed with further cleanup of PWM timers support on Samsung
> SoCs.
>
> This series attempts to achieve this goal by:
> 1) moving remaining Samsung platforms to the new clocksource driver
> 2) removing old clocksource driver
> 3) adding new multiplatform- and DT-aware PWM driver
> 4) moving all Samsung platforms to use the new PWM driver
> 5) removing old PWM driver
> 6) removing all PWM-related code that is not used anymore
>
> Cleaning up the PWM driver is a bit tricky, because the design of
> current driver makes it completely unsuitable for DT and multiplatform
> and would require a heavy rework to make it usable, breaking any
> existing Samsung PWM users by the way. To avoid any breakage I decided
> to keep the old driver, add new one, move all platforms to it and then
> remove the old one.
>
> See particular patches for more detailed descriptions.
>
> On S3C6410-based Tiny6410 (Mini6410-compatible), after enabling
> pwm-beeper and Exynos4210-based Origen board (with PWM0 attached to a
> scope):
>
> Tested-by: Tomasz Figa <tomasz.figa@gmail.com>
Just tested on SMDK6410 with PWM backlight and works fine.
Best regards,
Tomasz
> Changes since v1:
> - made sure that suspend/resume is handled correctly in both
> clocksource and PWM drivers,
> - fixed incorrect definition of AUTORELOAD bit for channel 4,
> - fixed order of registering PWM device and calling samsung_bl_set(),
> which assumes that PWM device has been already registered,
> - corrected commit messages of several patches,
> - addressed all the valid comments from reviewers, including cleanup
> of most code originally copied from previous PWM driver,
> - rebased on top of current Kgene's for-next,
> - tested on Exynos4210, verifying correct PWM output with a scope.
>
> Needs testing on other platforms as I could only compile test for them.
> Tomasz Figa (18):
> ARM: SAMSUNG: Unify base address definitions of timer block
> ARM: SAMSUNG: Add new PWM platform device
> ARM: SAMSUNG: Set PWM platform data
> clocksource: samsung_pwm_timer: Cache clocksource register address
> clocksource: samsung_pwm_timer: Do not use clocksource_mmio
> clocksource: samsung_pwm_timer: Handle suspend/resume correctly
> ARM: SAMSUNG: Move all platforms to new clocksource driver
> ARM: SAMSUNG: Remove old samsung-time driver
> ARM: SAMSUNG: Remove unused PWM timer IRQ chip code
> pwm: samsung: Rename to pwm-samsung-legacy
> pwm: Add new pwm-samsung driver
> ARM: SAMSUNG: Rework private data handling in dev-backlight
> ARM: SAMSUNG: Modify board files to use new PWM platform device
> pwm: Remove superseded pwm-samsung-legacy driver
> ARM: SAMSUNG: Remove old PWM timer platform devices
> ARM: SAMSUNG: Remove pwm-clock infrastructure
> ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header
> ARM: SAMSUNG: Remove plat/regs-timer.h header
>
> arch/arm/Kconfig | 1 -
> arch/arm/mach-s3c24xx/Kconfig | 12 +-
> arch/arm/mach-s3c24xx/clock-s3c2410.c | 1 -
> arch/arm/mach-s3c24xx/clock-s3c2412.c | 1 -
> arch/arm/mach-s3c24xx/clock-s3c2416.c | 2 -
> arch/arm/mach-s3c24xx/clock-s3c2443.c | 2 -
> arch/arm/mach-s3c24xx/common.c | 27 +
> arch/arm/mach-s3c24xx/include/mach/map.h | 2 +
> arch/arm/mach-s3c24xx/mach-h1940.c | 4 +-
> arch/arm/mach-s3c24xx/mach-rx1950.c | 5 +-
> arch/arm/mach-s3c64xx/Kconfig | 4 +-
> arch/arm/mach-s3c64xx/clock.c | 2 -
> arch/arm/mach-s3c64xx/common.c | 32 +-
> arch/arm/mach-s3c64xx/include/mach/irqs.h | 8 -
> arch/arm/mach-s3c64xx/include/mach/map.h | 1 +
> arch/arm/mach-s3c64xx/irq-pm.c | 2 -
> arch/arm/mach-s3c64xx/mach-crag6410.c | 4 +-
> arch/arm/mach-s3c64xx/mach-hmt.c | 4 +-
> arch/arm/mach-s3c64xx/mach-smartq.c | 4 +-
> arch/arm/mach-s3c64xx/mach-smdk6410.c | 5 +-
> arch/arm/mach-s5p64x0/Kconfig | 4 +-
> arch/arm/mach-s5p64x0/clock-s5p6440.c | 2 -
> arch/arm/mach-s5p64x0/clock-s5p6450.c | 2 -
> arch/arm/mach-s5p64x0/common.c | 27 +
> arch/arm/mach-s5p64x0/include/mach/irqs.h | 2 -
> arch/arm/mach-s5p64x0/include/mach/map.h | 1 +
> arch/arm/mach-s5p64x0/mach-smdk6440.c | 5 +-
> arch/arm/mach-s5p64x0/mach-smdk6450.c | 5 +-
> arch/arm/mach-s5p64x0/pm.c | 3 -
> arch/arm/mach-s5pc100/Kconfig | 2 +-
> arch/arm/mach-s5pc100/clock.c | 2 -
> arch/arm/mach-s5pc100/common.c | 28 +
> arch/arm/mach-s5pc100/include/mach/irqs.h | 2 -
> arch/arm/mach-s5pc100/include/mach/map.h | 1 +
> arch/arm/mach-s5pc100/mach-smdkc100.c | 5 +-
> arch/arm/mach-s5pv210/Kconfig | 2 +-
> arch/arm/mach-s5pv210/clock.c | 1 -
> arch/arm/mach-s5pv210/common.c | 28 +
> arch/arm/mach-s5pv210/include/mach/irqs.h | 2 -
> arch/arm/mach-s5pv210/include/mach/map.h | 1 +
> arch/arm/mach-s5pv210/mach-smdkv210.c | 5 +-
> arch/arm/mach-s5pv210/pm.c | 10 -
> arch/arm/plat-samsung/Kconfig | 14 -
> arch/arm/plat-samsung/Makefile | 3 -
> arch/arm/plat-samsung/dev-backlight.c | 61 +-
> arch/arm/plat-samsung/devs.c | 42 +-
> arch/arm/plat-samsung/include/plat/clock.h | 4 -
> arch/arm/plat-samsung/include/plat/devs.h | 1 +
> arch/arm/plat-samsung/include/plat/irq-vic-timer.h | 13 -
> arch/arm/plat-samsung/include/plat/irqs.h | 9 -
> arch/arm/plat-samsung/include/plat/pwm-clock.h | 81 ---
> arch/arm/plat-samsung/include/plat/pwm-core.h | 24 +
> arch/arm/plat-samsung/include/plat/regs-timer.h | 124 ----
> arch/arm/plat-samsung/include/plat/samsung-time.h | 23 -
> arch/arm/plat-samsung/irq-vic-timer.c | 98 ---
> arch/arm/plat-samsung/pwm-clock.c | 474 --------------
> arch/arm/plat-samsung/s5p-irq.c | 4 -
> arch/arm/plat-samsung/samsung-time.c | 394 ------------
> drivers/clocksource/samsung_pwm_timer.c | 84 +--
> drivers/pwm/pwm-samsung.c | 694
> ++++++++++++++------- 60 files changed, 766 insertions(+), 1644
> deletions(-)
> delete mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h
> delete mode 100644 arch/arm/plat-samsung/include/plat/pwm-clock.h
> create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h
> delete mode 100644 arch/arm/plat-samsung/include/plat/regs-timer.h
> delete mode 100644 arch/arm/plat-samsung/irq-vic-timer.c
> delete mode 100644 arch/arm/plat-samsung/pwm-clock.c
> delete mode 100644 arch/arm/plat-samsung/samsung-time.c
^ permalink raw reply [flat|nested] 45+ messages in thread* [PATCH v2 00/18] Final Samsung PWM support cleanup
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (18 preceding siblings ...)
2013-06-20 23:05 ` [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
@ 2013-06-21 14:04 ` Arnd Bergmann
2013-06-22 13:10 ` Tomasz Figa
2013-06-22 18:01 ` Heiko Stübner
20 siblings, 1 reply; 45+ messages in thread
From: Arnd Bergmann @ 2013-06-21 14:04 UTC (permalink / raw)
To: linux-arm-kernel
On Friday 21 June 2013, Tomasz Figa wrote:
> Since we now have a proper Samsung PWM clocksource driver in place,
> we can proceed with further cleanup of PWM timers support on Samsung SoCs.
>
> This series attempts to achieve this goal by:
> 1) moving remaining Samsung platforms to the new clocksource driver
> 2) removing old clocksource driver
> 3) adding new multiplatform- and DT-aware PWM driver
> 4) moving all Samsung platforms to use the new PWM driver
> 5) removing old PWM driver
> 6) removing all PWM-related code that is not used anymore
>
> Cleaning up the PWM driver is a bit tricky, because the design of current
> driver makes it completely unsuitable for DT and multiplatform and would
> require a heavy rework to make it usable, breaking any existing Samsung PWM
> users by the way. To avoid any breakage I decided to keep the old driver,
> add new one, move all platforms to it and then remove the old one.
>
> See particular patches for more detailed descriptions.
>
> On S3C6410-based Tiny6410 (Mini6410-compatible), after enabling pwm-beeper
> and Exynos4210-based Origen board (with PWM0 attached to a scope):
>
> Tested-by: Tomasz Figa <tomasz.figa@gmail.com>
>
Looks good to me,
Acked-by: Arnd Bergmann <arnd@arndb.de>
Two small comments:
* always use 'git format-patch -M' to detect renames (patch 10)
* for new code, don't use __raw_readl and similar functions but
use readl_relaxed or plain readl.
Arnd
^ permalink raw reply [flat|nested] 45+ messages in thread* [PATCH v2 00/18] Final Samsung PWM support cleanup
2013-06-21 14:04 ` Arnd Bergmann
@ 2013-06-22 13:10 ` Tomasz Figa
0 siblings, 0 replies; 45+ messages in thread
From: Tomasz Figa @ 2013-06-22 13:10 UTC (permalink / raw)
To: linux-arm-kernel
On Friday 21 of June 2013 16:04:38 Arnd Bergmann wrote:
> On Friday 21 June 2013, Tomasz Figa wrote:
> > Since we now have a proper Samsung PWM clocksource driver in place,
> > we can proceed with further cleanup of PWM timers support on Samsung
> > SoCs.>
> > This series attempts to achieve this goal by:
> > 1) moving remaining Samsung platforms to the new clocksource driver
> > 2) removing old clocksource driver
> > 3) adding new multiplatform- and DT-aware PWM driver
> > 4) moving all Samsung platforms to use the new PWM driver
> > 5) removing old PWM driver
> > 6) removing all PWM-related code that is not used anymore
> >
> > Cleaning up the PWM driver is a bit tricky, because the design of
> > current driver makes it completely unsuitable for DT and
> > multiplatform and would require a heavy rework to make it usable,
> > breaking any existing Samsung PWM users by the way. To avoid any
> > breakage I decided to keep the old driver, add new one, move all
> > platforms to it and then remove the old one.
> >
> > See particular patches for more detailed descriptions.
> >
> > On S3C6410-based Tiny6410 (Mini6410-compatible), after enabling
> > pwm-beeper and Exynos4210-based Origen board (with PWM0 attached to a
> > scope):
> >
> > Tested-by: Tomasz Figa <tomasz.figa@gmail.com>
>
> Looks good to me,
>
> Acked-by: Arnd Bergmann <arnd@arndb.de>
Thanks.
> Two small comments:
>
> * always use 'git format-patch -M' to detect renames (patch 10)
>
> * for new code, don't use __raw_readl and similar functions but
> use readl_relaxed or plain readl.
Just posted v3 of patches 10 and 11 addressing these issues.
Best regards,
Tomasz
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v2 00/18] Final Samsung PWM support cleanup
2013-06-20 22:12 [PATCH v2 00/18] Final Samsung PWM support cleanup Tomasz Figa
` (19 preceding siblings ...)
2013-06-21 14:04 ` Arnd Bergmann
@ 2013-06-22 18:01 ` Heiko Stübner
2013-06-22 18:04 ` Tomasz Figa
2013-06-22 19:34 ` Sylwester Nawrocki
20 siblings, 2 replies; 45+ messages in thread
From: Heiko Stübner @ 2013-06-22 18:01 UTC (permalink / raw)
To: linux-arm-kernel
Am Freitag, 21. Juni 2013, 00:12:45 schrieb Tomasz Figa:
> Since we now have a proper Samsung PWM clocksource driver in place,
> we can proceed with further cleanup of PWM timers support on Samsung SoCs.
>
> This series attempts to achieve this goal by:
> 1) moving remaining Samsung platforms to the new clocksource driver
> 2) removing old clocksource driver
> 3) adding new multiplatform- and DT-aware PWM driver
> 4) moving all Samsung platforms to use the new PWM driver
> 5) removing old PWM driver
> 6) removing all PWM-related code that is not used anymore
>
> Cleaning up the PWM driver is a bit tricky, because the design of current
> driver makes it completely unsuitable for DT and multiplatform and would
> require a heavy rework to make it usable, breaking any existing Samsung PWM
> users by the way. To avoid any breakage I decided to keep the old driver,
> add new one, move all platforms to it and then remove the old one.
>
> See particular patches for more detailed descriptions.
>
> On S3C6410-based Tiny6410 (Mini6410-compatible), after enabling pwm-beeper
> and Exynos4210-based Origen board (with PWM0 attached to a scope):
>
> Tested-by: Tomasz Figa <tomasz.figa@gmail.com>
On a s3c2416 based machine (with the additional two v3 patches)
Tested-by: Heiko Stuebner <heiko@sntech.de>
and again thanks for working on this :-)
> Changes since v1:
> - made sure that suspend/resume is handled correctly in both
> clocksource and PWM drivers,
> - fixed incorrect definition of AUTORELOAD bit for channel 4,
> - fixed order of registering PWM device and calling samsung_bl_set(),
> which assumes that PWM device has been already registered,
> - corrected commit messages of several patches,
> - addressed all the valid comments from reviewers, including cleanup
> of most code originally copied from previous PWM driver,
> - rebased on top of current Kgene's for-next,
> - tested on Exynos4210, verifying correct PWM output with a scope.
>
> Needs testing on other platforms as I could only compile test for them.
> Tomasz Figa (18):
> ARM: SAMSUNG: Unify base address definitions of timer block
> ARM: SAMSUNG: Add new PWM platform device
> ARM: SAMSUNG: Set PWM platform data
> clocksource: samsung_pwm_timer: Cache clocksource register address
> clocksource: samsung_pwm_timer: Do not use clocksource_mmio
> clocksource: samsung_pwm_timer: Handle suspend/resume correctly
> ARM: SAMSUNG: Move all platforms to new clocksource driver
> ARM: SAMSUNG: Remove old samsung-time driver
> ARM: SAMSUNG: Remove unused PWM timer IRQ chip code
> pwm: samsung: Rename to pwm-samsung-legacy
> pwm: Add new pwm-samsung driver
> ARM: SAMSUNG: Rework private data handling in dev-backlight
> ARM: SAMSUNG: Modify board files to use new PWM platform device
> pwm: Remove superseded pwm-samsung-legacy driver
> ARM: SAMSUNG: Remove old PWM timer platform devices
> ARM: SAMSUNG: Remove pwm-clock infrastructure
> ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header
> ARM: SAMSUNG: Remove plat/regs-timer.h header
>
> arch/arm/Kconfig | 1 -
> arch/arm/mach-s3c24xx/Kconfig | 12 +-
> arch/arm/mach-s3c24xx/clock-s3c2410.c | 1 -
> arch/arm/mach-s3c24xx/clock-s3c2412.c | 1 -
> arch/arm/mach-s3c24xx/clock-s3c2416.c | 2 -
> arch/arm/mach-s3c24xx/clock-s3c2443.c | 2 -
> arch/arm/mach-s3c24xx/common.c | 27 +
> arch/arm/mach-s3c24xx/include/mach/map.h | 2 +
> arch/arm/mach-s3c24xx/mach-h1940.c | 4 +-
> arch/arm/mach-s3c24xx/mach-rx1950.c | 5 +-
> arch/arm/mach-s3c64xx/Kconfig | 4 +-
> arch/arm/mach-s3c64xx/clock.c | 2 -
> arch/arm/mach-s3c64xx/common.c | 32 +-
> arch/arm/mach-s3c64xx/include/mach/irqs.h | 8 -
> arch/arm/mach-s3c64xx/include/mach/map.h | 1 +
> arch/arm/mach-s3c64xx/irq-pm.c | 2 -
> arch/arm/mach-s3c64xx/mach-crag6410.c | 4 +-
> arch/arm/mach-s3c64xx/mach-hmt.c | 4 +-
> arch/arm/mach-s3c64xx/mach-smartq.c | 4 +-
> arch/arm/mach-s3c64xx/mach-smdk6410.c | 5 +-
> arch/arm/mach-s5p64x0/Kconfig | 4 +-
> arch/arm/mach-s5p64x0/clock-s5p6440.c | 2 -
> arch/arm/mach-s5p64x0/clock-s5p6450.c | 2 -
> arch/arm/mach-s5p64x0/common.c | 27 +
> arch/arm/mach-s5p64x0/include/mach/irqs.h | 2 -
> arch/arm/mach-s5p64x0/include/mach/map.h | 1 +
> arch/arm/mach-s5p64x0/mach-smdk6440.c | 5 +-
> arch/arm/mach-s5p64x0/mach-smdk6450.c | 5 +-
> arch/arm/mach-s5p64x0/pm.c | 3 -
> arch/arm/mach-s5pc100/Kconfig | 2 +-
> arch/arm/mach-s5pc100/clock.c | 2 -
> arch/arm/mach-s5pc100/common.c | 28 +
> arch/arm/mach-s5pc100/include/mach/irqs.h | 2 -
> arch/arm/mach-s5pc100/include/mach/map.h | 1 +
> arch/arm/mach-s5pc100/mach-smdkc100.c | 5 +-
> arch/arm/mach-s5pv210/Kconfig | 2 +-
> arch/arm/mach-s5pv210/clock.c | 1 -
> arch/arm/mach-s5pv210/common.c | 28 +
> arch/arm/mach-s5pv210/include/mach/irqs.h | 2 -
> arch/arm/mach-s5pv210/include/mach/map.h | 1 +
> arch/arm/mach-s5pv210/mach-smdkv210.c | 5 +-
> arch/arm/mach-s5pv210/pm.c | 10 -
> arch/arm/plat-samsung/Kconfig | 14 -
> arch/arm/plat-samsung/Makefile | 3 -
> arch/arm/plat-samsung/dev-backlight.c | 61 +-
> arch/arm/plat-samsung/devs.c | 42 +-
> arch/arm/plat-samsung/include/plat/clock.h | 4 -
> arch/arm/plat-samsung/include/plat/devs.h | 1 +
> arch/arm/plat-samsung/include/plat/irq-vic-timer.h | 13 -
> arch/arm/plat-samsung/include/plat/irqs.h | 9 -
> arch/arm/plat-samsung/include/plat/pwm-clock.h | 81 ---
> arch/arm/plat-samsung/include/plat/pwm-core.h | 24 +
> arch/arm/plat-samsung/include/plat/regs-timer.h | 124 ----
> arch/arm/plat-samsung/include/plat/samsung-time.h | 23 -
> arch/arm/plat-samsung/irq-vic-timer.c | 98 ---
> arch/arm/plat-samsung/pwm-clock.c | 474 --------------
> arch/arm/plat-samsung/s5p-irq.c | 4 -
> arch/arm/plat-samsung/samsung-time.c | 394 ------------
> drivers/clocksource/samsung_pwm_timer.c | 84 +--
> drivers/pwm/pwm-samsung.c | 694
> ++++++++++++++------- 60 files changed, 766 insertions(+), 1644
> deletions(-)
> delete mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h
> delete mode 100644 arch/arm/plat-samsung/include/plat/pwm-clock.h
> create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h
> delete mode 100644 arch/arm/plat-samsung/include/plat/regs-timer.h
> delete mode 100644 arch/arm/plat-samsung/irq-vic-timer.c
> delete mode 100644 arch/arm/plat-samsung/pwm-clock.c
> delete mode 100644 arch/arm/plat-samsung/samsung-time.c
^ permalink raw reply [flat|nested] 45+ messages in thread* [PATCH v2 00/18] Final Samsung PWM support cleanup
2013-06-22 18:01 ` Heiko Stübner
@ 2013-06-22 18:04 ` Tomasz Figa
2013-06-24 0:14 ` Kukjin Kim
2013-06-22 19:34 ` Sylwester Nawrocki
1 sibling, 1 reply; 45+ messages in thread
From: Tomasz Figa @ 2013-06-22 18:04 UTC (permalink / raw)
To: linux-arm-kernel
Hi Heiko,
On Saturday 22 of June 2013 20:01:49 Heiko St?bner wrote:
> Am Freitag, 21. Juni 2013, 00:12:45 schrieb Tomasz Figa:
> > Since we now have a proper Samsung PWM clocksource driver in place,
> > we can proceed with further cleanup of PWM timers support on Samsung
> > SoCs.>
> > This series attempts to achieve this goal by:
> > 1) moving remaining Samsung platforms to the new clocksource driver
> > 2) removing old clocksource driver
> > 3) adding new multiplatform- and DT-aware PWM driver
> > 4) moving all Samsung platforms to use the new PWM driver
> > 5) removing old PWM driver
> > 6) removing all PWM-related code that is not used anymore
> >
> > Cleaning up the PWM driver is a bit tricky, because the design of
> > current driver makes it completely unsuitable for DT and
> > multiplatform and would require a heavy rework to make it usable,
> > breaking any existing Samsung PWM users by the way. To avoid any
> > breakage I decided to keep the old driver, add new one, move all
> > platforms to it and then remove the old one.
> >
> > See particular patches for more detailed descriptions.
> >
> > On S3C6410-based Tiny6410 (Mini6410-compatible), after enabling
> > pwm-beeper and Exynos4210-based Origen board (with PWM0 attached to a
> > scope):
> >
> > Tested-by: Tomasz Figa <tomasz.figa@gmail.com>
>
> On a s3c2416 based machine (with the additional two v3 patches)
>
> Tested-by: Heiko Stuebner <heiko@sntech.de>
>
>
> and again thanks for working on this :-)
Thanks for testing!
I hope we can get this merged ASAP, as this is an important prerequisite
for further work on S3C24xx and S3C64xx...
Best regards,
Tomasz
> > Changes since v1:
> > - made sure that suspend/resume is handled correctly in both
> >
> > clocksource and PWM drivers,
> >
> > - fixed incorrect definition of AUTORELOAD bit for channel 4,
> > - fixed order of registering PWM device and calling samsung_bl_set(),
> >
> > which assumes that PWM device has been already registered,
> >
> > - corrected commit messages of several patches,
> > - addressed all the valid comments from reviewers, including cleanup
> >
> > of most code originally copied from previous PWM driver,
> >
> > - rebased on top of current Kgene's for-next,
> > - tested on Exynos4210, verifying correct PWM output with a scope.
> >
> > Needs testing on other platforms as I could only compile test for
> > them.
> >
> > Tomasz Figa (18):
> > ARM: SAMSUNG: Unify base address definitions of timer block
> > ARM: SAMSUNG: Add new PWM platform device
> > ARM: SAMSUNG: Set PWM platform data
> > clocksource: samsung_pwm_timer: Cache clocksource register address
> > clocksource: samsung_pwm_timer: Do not use clocksource_mmio
> > clocksource: samsung_pwm_timer: Handle suspend/resume correctly
> > ARM: SAMSUNG: Move all platforms to new clocksource driver
> > ARM: SAMSUNG: Remove old samsung-time driver
> > ARM: SAMSUNG: Remove unused PWM timer IRQ chip code
> > pwm: samsung: Rename to pwm-samsung-legacy
> > pwm: Add new pwm-samsung driver
> > ARM: SAMSUNG: Rework private data handling in dev-backlight
> > ARM: SAMSUNG: Modify board files to use new PWM platform device
> > pwm: Remove superseded pwm-samsung-legacy driver
> > ARM: SAMSUNG: Remove old PWM timer platform devices
> > ARM: SAMSUNG: Remove pwm-clock infrastructure
> > ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header
> > ARM: SAMSUNG: Remove plat/regs-timer.h header
> >
> > arch/arm/Kconfig | 1 -
> > arch/arm/mach-s3c24xx/Kconfig | 12 +-
> > arch/arm/mach-s3c24xx/clock-s3c2410.c | 1 -
> > arch/arm/mach-s3c24xx/clock-s3c2412.c | 1 -
> > arch/arm/mach-s3c24xx/clock-s3c2416.c | 2 -
> > arch/arm/mach-s3c24xx/clock-s3c2443.c | 2 -
> > arch/arm/mach-s3c24xx/common.c | 27 +
> > arch/arm/mach-s3c24xx/include/mach/map.h | 2 +
> > arch/arm/mach-s3c24xx/mach-h1940.c | 4 +-
> > arch/arm/mach-s3c24xx/mach-rx1950.c | 5 +-
> > arch/arm/mach-s3c64xx/Kconfig | 4 +-
> > arch/arm/mach-s3c64xx/clock.c | 2 -
> > arch/arm/mach-s3c64xx/common.c | 32 +-
> > arch/arm/mach-s3c64xx/include/mach/irqs.h | 8 -
> > arch/arm/mach-s3c64xx/include/mach/map.h | 1 +
> > arch/arm/mach-s3c64xx/irq-pm.c | 2 -
> > arch/arm/mach-s3c64xx/mach-crag6410.c | 4 +-
> > arch/arm/mach-s3c64xx/mach-hmt.c | 4 +-
> > arch/arm/mach-s3c64xx/mach-smartq.c | 4 +-
> > arch/arm/mach-s3c64xx/mach-smdk6410.c | 5 +-
> > arch/arm/mach-s5p64x0/Kconfig | 4 +-
> > arch/arm/mach-s5p64x0/clock-s5p6440.c | 2 -
> > arch/arm/mach-s5p64x0/clock-s5p6450.c | 2 -
> > arch/arm/mach-s5p64x0/common.c | 27 +
> > arch/arm/mach-s5p64x0/include/mach/irqs.h | 2 -
> > arch/arm/mach-s5p64x0/include/mach/map.h | 1 +
> > arch/arm/mach-s5p64x0/mach-smdk6440.c | 5 +-
> > arch/arm/mach-s5p64x0/mach-smdk6450.c | 5 +-
> > arch/arm/mach-s5p64x0/pm.c | 3 -
> > arch/arm/mach-s5pc100/Kconfig | 2 +-
> > arch/arm/mach-s5pc100/clock.c | 2 -
> > arch/arm/mach-s5pc100/common.c | 28 +
> > arch/arm/mach-s5pc100/include/mach/irqs.h | 2 -
> > arch/arm/mach-s5pc100/include/mach/map.h | 1 +
> > arch/arm/mach-s5pc100/mach-smdkc100.c | 5 +-
> > arch/arm/mach-s5pv210/Kconfig | 2 +-
> > arch/arm/mach-s5pv210/clock.c | 1 -
> > arch/arm/mach-s5pv210/common.c | 28 +
> > arch/arm/mach-s5pv210/include/mach/irqs.h | 2 -
> > arch/arm/mach-s5pv210/include/mach/map.h | 1 +
> > arch/arm/mach-s5pv210/mach-smdkv210.c | 5 +-
> > arch/arm/mach-s5pv210/pm.c | 10 -
> > arch/arm/plat-samsung/Kconfig | 14 -
> > arch/arm/plat-samsung/Makefile | 3 -
> > arch/arm/plat-samsung/dev-backlight.c | 61 +-
> > arch/arm/plat-samsung/devs.c | 42 +-
> > arch/arm/plat-samsung/include/plat/clock.h | 4 -
> > arch/arm/plat-samsung/include/plat/devs.h | 1 +
> > arch/arm/plat-samsung/include/plat/irq-vic-timer.h | 13 -
> > arch/arm/plat-samsung/include/plat/irqs.h | 9 -
> > arch/arm/plat-samsung/include/plat/pwm-clock.h | 81 ---
> > arch/arm/plat-samsung/include/plat/pwm-core.h | 24 +
> > arch/arm/plat-samsung/include/plat/regs-timer.h | 124 ----
> > arch/arm/plat-samsung/include/plat/samsung-time.h | 23 -
> > arch/arm/plat-samsung/irq-vic-timer.c | 98 ---
> > arch/arm/plat-samsung/pwm-clock.c | 474
> > --------------
> > arch/arm/plat-samsung/s5p-irq.c | 4 -
> > arch/arm/plat-samsung/samsung-time.c | 394 ------------
> > drivers/clocksource/samsung_pwm_timer.c | 84 +--
> > drivers/pwm/pwm-samsung.c | 694
> >
> > ++++++++++++++------- 60 files changed, 766 insertions(+), 1644
> > deletions(-)
> >
> > delete mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h
> > delete mode 100644 arch/arm/plat-samsung/include/plat/pwm-clock.h
> > create mode 100644 arch/arm/plat-samsung/include/plat/pwm-core.h
> > delete mode 100644 arch/arm/plat-samsung/include/plat/regs-timer.h
> > delete mode 100644 arch/arm/plat-samsung/irq-vic-timer.c
> > delete mode 100644 arch/arm/plat-samsung/pwm-clock.c
> > delete mode 100644 arch/arm/plat-samsung/samsung-time.c
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v2 00/18] Final Samsung PWM support cleanup
2013-06-22 18:04 ` Tomasz Figa
@ 2013-06-24 0:14 ` Kukjin Kim
0 siblings, 0 replies; 45+ messages in thread
From: Kukjin Kim @ 2013-06-24 0:14 UTC (permalink / raw)
To: linux-arm-kernel
Tomasz Figa wrote:
>
> Hi Heiko,
>
> On Saturday 22 of June 2013 20:01:49 Heiko St?bner wrote:
> > Am Freitag, 21. Juni 2013, 00:12:45 schrieb Tomasz Figa:
> > > Since we now have a proper Samsung PWM clocksource driver in place,
> > > we can proceed with further cleanup of PWM timers support on Samsung
> > > SoCs.>
> > > This series attempts to achieve this goal by:
> > > 1) moving remaining Samsung platforms to the new clocksource driver
> > > 2) removing old clocksource driver
> > > 3) adding new multiplatform- and DT-aware PWM driver
> > > 4) moving all Samsung platforms to use the new PWM driver
> > > 5) removing old PWM driver
> > > 6) removing all PWM-related code that is not used anymore
> > >
> > > Cleaning up the PWM driver is a bit tricky, because the design of
> > > current driver makes it completely unsuitable for DT and
> > > multiplatform and would require a heavy rework to make it usable,
> > > breaking any existing Samsung PWM users by the way. To avoid any
> > > breakage I decided to keep the old driver, add new one, move all
> > > platforms to it and then remove the old one.
> > >
> > > See particular patches for more detailed descriptions.
> > >
> > > On S3C6410-based Tiny6410 (Mini6410-compatible), after enabling
> > > pwm-beeper and Exynos4210-based Origen board (with PWM0 attached to a
> > > scope):
> > >
> > > Tested-by: Tomasz Figa <tomasz.figa@gmail.com>
> >
Thanks.
> > On a s3c2416 based machine (with the additional two v3 patches)
> >
> > Tested-by: Heiko Stuebner <heiko@sntech.de>
> >
Thanks.
> >
> > and again thanks for working on this :-)
>
> Thanks for testing!
>
> I hope we can get this merged ASAP, as this is an important prerequisite
> for further work on S3C24xx and S3C64xx...
>
OK, let me take this series into 4th pull-request will be sent to arm-soc
tonight in my time. Thanks for your guys' effort.
- Kukjin
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH v2 00/18] Final Samsung PWM support cleanup
2013-06-22 18:01 ` Heiko Stübner
2013-06-22 18:04 ` Tomasz Figa
@ 2013-06-22 19:34 ` Sylwester Nawrocki
1 sibling, 0 replies; 45+ messages in thread
From: Sylwester Nawrocki @ 2013-06-22 19:34 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
W dniu 2013-06-22 20:01, Heiko St?bner pisze:
> Am Freitag, 21. Juni 2013, 00:12:45 schrieb Tomasz Figa:
>> Since we now have a proper Samsung PWM clocksource driver in place,
>> we can proceed with further cleanup of PWM timers support on Samsung SoCs.
>>
>> This series attempts to achieve this goal by:
>> 1) moving remaining Samsung platforms to the new clocksource driver
>> 2) removing old clocksource driver
>> 3) adding new multiplatform- and DT-aware PWM driver
>> 4) moving all Samsung platforms to use the new PWM driver
>> 5) removing old PWM driver
>> 6) removing all PWM-related code that is not used anymore
>>
>> Cleaning up the PWM driver is a bit tricky, because the design of current
>> driver makes it completely unsuitable for DT and multiplatform and would
>> require a heavy rework to make it usable, breaking any existing Samsung PWM
>> users by the way. To avoid any breakage I decided to keep the old driver,
>> add new one, move all platforms to it and then remove the old one.
>>
>> See particular patches for more detailed descriptions.
>>
>> On S3C6410-based Tiny6410 (Mini6410-compatible), after enabling pwm-beeper
>> and Exynos4210-based Origen board (with PWM0 attached to a scope):
>>
>> Tested-by: Tomasz Figa<tomasz.figa@gmail.com>
>
> On a s3c2416 based machine (with the additional two v3 patches)
>
> Tested-by: Heiko Stuebner<heiko@sntech.de>
I have tested this series on Mini2440 board (all v2 patches).
Only boot testing for now, however I'm going to inspect the PWM
output signal and will report back if there are any issues.
I think you could add my
Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
I had to revert this patch (introduced between v3.10-rc4 and v3.10-rc5)
commit 60e93575476f90a72146b51283f514da655410a7
Author: Chander Kashyap <chander.kashyap@linaro.org>
Date: Tue May 28 18:32:07 2013 +0530
serial: samsung: enable clock before clearing pending interrupts
during init
Ensure that the uart controller clock is enabled prior to writing
to the
interrupt mask and pending registers in the s3c24xx_serial_init_port
function.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
to make serial console working again on Mini2440, but this is a
different story.
Thanks,
Sylwester
^ permalink raw reply [flat|nested] 45+ messages in thread