From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BBE41C48297 for ; Wed, 7 Feb 2024 00:36:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=I8O3n41uLoHcD0WtRbHA4ZWD4NMGEz/vZ+XZ+GIqZn4=; b=TSSOmncZyBirMP eRYAnJmj0jMWhPn0qc19XR+yr+z5/ckFdpAT10huSAtfUYlI3gdQGQAfWDqarCvMtuQIUrgSQfWYk fIP7S1GUywx7162nB4s68Tg3+I+43L8NsKmZOZJtx2RQw5fODl6J+TlD/rLY4nKWPG3aHRc7Xpbgn rmaYRXiBFDLTgIkUmZo0Pz/0Ucs+a4OFbAoki5M1QopKtobO+3BRlO+qgmtskORf8TbVfeKM2X8c+ 8T1BerReLcc/FhGZFOiY1AHzIZWOPQ7xTXUkpT30eqtjncp+sRQxeKHpx8ktU0IK1VG+gIe9ynzmQ p+Ur/iylWawA5UddRb2g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rXVvI-00000009HaL-0KZH; Wed, 07 Feb 2024 00:36:20 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rXVvF-00000009HZ5-2gqk for linux-arm-kernel@lists.infradead.org; Wed, 07 Feb 2024 00:36:19 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 64E971FB; Tue, 6 Feb 2024 16:36:55 -0800 (PST) Received: from [192.168.42.178] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 221223F5A1; Tue, 6 Feb 2024 16:36:10 -0800 (PST) Message-ID: <2108caa3-1725-4df5-ad0e-bded3288ca88@arm.com> Date: Wed, 7 Feb 2024 00:36:09 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] arm64: dts: allwinner: h616: Add Sipeed Longan SoM 3H and Pi 3H board support Content-Language: en-US To: Jisheng Zhang , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org References: <20240203122502.1259-1-jszhang@kernel.org> <20240203122502.1259-3-jszhang@kernel.org> From: Andre Przywara In-Reply-To: <20240203122502.1259-3-jszhang@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240206_163617_816640_07B7456C X-CRM114-Status: GOOD ( 27.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, On 03/02/2024 13:25, Jisheng Zhang wrote: > The Sipeed Longan SoM 3H is a system on module based on the Allwinner > H618 SoC. The SoM features: > > - Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU > - 2/4 GiB LPDDR4 DRAM SoMs > - AXP313a PMIC > - eMMC > > The Sipeed Longan PI 3H is a development board based on the above SoM. > The board features: > - Longan SoM 3H > - Raspberry-Pi-1 compatible GPIO header > - 2 USB 2.0 host port > - 1 USB 2.0 type C port (power supply + OTG) > - MicroSD slot > - 1Gbps Ethernet port (via RTL8211 PHY) > - HDMI port > - WiFi/BT chip > > Add the devicetree file describing the currently supported features, > namely PMIC, LEDs, UART, SD card, eMMC, USB and Ethernet. many thanks for the changes, that looks almost perfect now. Two small questions below: > > Signed-off-by: Jisheng Zhang > --- > arch/arm64/boot/dts/allwinner/Makefile | 1 + > .../sun50i-h618-longan-module-3h.dtsi | 77 ++++++++++ > .../dts/allwinner/sun50i-h618-longanpi-3h.dts | 143 ++++++++++++++++++ > 3 files changed, 221 insertions(+) > create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi > create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts > > diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile > index 91d505b385de..4b9173a16efe 100644 > --- a/arch/arm64/boot/dts/allwinner/Makefile > +++ b/arch/arm64/boot/dts/allwinner/Makefile > @@ -42,5 +42,6 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-manta.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-pi.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb > +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-longanpi-3h.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-transpeed-8k618-t.dtb > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi > new file mode 100644 > index 000000000000..5f0f48cf4f01 > --- /dev/null > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi > @@ -0,0 +1,77 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (C) Jisheng Zhang > + */ > + > +#include "sun50i-h616.dtsi" > + > +&mmc2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&mmc2_pins>; > + vmmc-supply = <®_dldo1>; > + vqmmc-supply = <®_aldo1>; > + bus-width = <8>; > + non-removable; > + cap-mmc-hw-reset; > + mmc-ddr-1_8v; > + mmc-hs200-1_8v; > + status = "okay"; > +}; > + > +&r_i2c { > + status = "okay"; > + > + axp313: pmic@36 { > + compatible = "x-powers,axp313a"; > + reg = <0x36>; > + #interrupt-cells = <1>; > + interrupt-controller; > + interrupt-parent = <&pio>; > + interrupts = <3 11 IRQ_TYPE_LEVEL_LOW>; /* PD11 */ So looking at the SoM schematic I found, the AXP IRQ pin is only connected to the SoM connector, but nowhere else. And I don't see PD11 listed on the SoM schematic at all? So can you please double check that? To make sure: it's fine to not list the interrupt (and interrupt-parent), we support this for the AXP313a, and other boards omit it as well already. > + > + regulators { > + reg_aldo1: aldo1 { > + regulator-always-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcc-1v8-pll"; > + }; > + > + reg_dldo1: dldo1 { > + regulator-always-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc-3v3-io"; > + }; > + > + reg_dcdc1: dcdc1 { > + regulator-always-on; > + regulator-min-microvolt = <810000>; > + regulator-max-microvolt = <990000>; > + regulator-name = "vdd-gpu-sys"; > + }; > + > + reg_dcdc2: dcdc2 { > + regulator-always-on; > + regulator-min-microvolt = <810000>; > + regulator-max-microvolt = <1100000>; > + regulator-name = "vdd-cpu"; > + }; > + > + reg_dcdc3: dcdc3 { > + regulator-always-on; > + regulator-min-microvolt = <1100000>; > + regulator-max-microvolt = <1100000>; > + regulator-name = "vdd-dram"; > + }; > + }; > + }; > +}; > + > +&pio { > + vcc-pc-supply = <®_dldo1>; > + vcc-pf-supply = <®_dldo1>; > + vcc-pg-supply = <®_aldo1>; > + vcc-ph-supply = <®_dldo1>; > + vcc-pi-supply = <®_dldo1>; > +}; > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts > new file mode 100644 > index 000000000000..08d3ad7114fb > --- /dev/null > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-longanpi-3h.dts > @@ -0,0 +1,143 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (C) Jisheng Zhang > + */ > + > +/dts-v1/; > + > +#include "sun50i-h618-longan-module-3h.dtsi" > + > +#include > +#include > +#include > + > +/ { > + model = "Sipeed Longan Pi 3H"; > + compatible = "sipeed,longan-pi-3h", "sipeed,longan-module-3h", "allwinner,sun50i-h618"; > + > + aliases { > + ethernet0 = &emac0; > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + led-0 { > + color = ; > + function = LED_FUNCTION_INDICATOR; > + function-enumerator = <0>; > + gpios = <&pio 6 2 GPIO_ACTIVE_LOW>; /* PG2 */ > + }; > + > + led-1 { > + color = ; > + function = LED_FUNCTION_INDICATOR; > + function-enumerator = <1>; > + gpios = <&pio 6 4 GPIO_ACTIVE_LOW>; /* PG4 */ > + }; > + }; > + > + reg_vcc5v: regulator-vcc5v { > + /* board wide 5V supply directly from the USB-C socket */ > + compatible = "regulator-fixed"; > + regulator-name = "vcc-5v"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-always-on; > + }; > + > + reg_vcc3v3: regulator-vcc3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "vcc-3v3"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-always-on; Only if you respin: can you please add "vin-supply = <®_vcc5v>;" here? That would avoid one dummy regulator message, I think. Otherwise looks good, all the things I listed on v1 were fixed. Thanks! Andre > + }; > +}; > + > +&axp313 { > + vin1-supply = <®_vcc5v>; > + vin2-supply = <®_vcc5v>; > + vin3-supply = <®_vcc5v>; > +}; > + > +&ehci1 { > + status = "okay"; > +}; > + > +&ohci1 { > + status = "okay"; > +}; > + > +&ehci2 { > + status = "okay"; > +}; > + > +&ohci2 { > + status = "okay"; > +}; > + > +/* WiFi & BT combo module is connected to this Host */ > +&ehci3 { > + status = "okay"; > +}; > + > +&ohci3 { > + status = "okay"; > +}; > + > +&emac0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&ext_rgmii_pins>; > + phy-mode = "rgmii"; > + phy-handle = <&ext_rgmii_phy>; > + allwinner,rx-delay-ps = <3100>; > + allwinner,tx-delay-ps = <700>; > + phy-supply = <®_vcc3v3>; > + status = "okay"; > +}; > + > +&mdio0 { > + ext_rgmii_phy: ethernet-phy@1 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <1>; > + }; > +}; > + > +&mmc0 { > + bus-width = <4>; > + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ > + vmmc-supply = <®_vcc3v3>; > + status = "okay"; > +}; > + > +&uart0 { > + status = "okay"; > +}; > + > +&usbotg { > + /* > + * PHY0 pins are connected to a USB-C socket, but a role switch > + * is not implemented: both CC pins are pulled to GND. > + * The VBUS pins power the device, so a fixed peripheral mode > + * is the best choice. > + * The board can be powered via GPIOs, in this case port0 *can* > + * act as a host (with a cable/adapter ignoring CC), as VBUS is > + * then provided by the GPIOs. Any user of this setup would > + * need to adjust the DT accordingly: dr_mode set to "host", > + * enabling OHCI0 and EHCI0. > + */ > + dr_mode = "peripheral"; > + status = "okay"; > +}; > + > +&usbphy { > + usb1_vbus-supply = <®_vcc5v>; > + usb2_vbus-supply = <®_vcc5v>; > + status = "okay"; > +}; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel