From: Heiko Stuebner <heiko@sntech.de>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: tom@vamrs.com, linux-kernel@vger.kernel.org, dev@vamrs.com,
linux-rockchip@lists.infradead.org, ezequiel@collabora.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/2] arm64: dts: rockchip: Enable SPI1 on Ficus
Date: Tue, 07 May 2019 13:22:03 +0200 [thread overview]
Message-ID: <2127870.SxaTtWf5LP@phil> (raw)
In-Reply-To: <20190506120458.25842-2-manivannan.sadhasivam@linaro.org>
Am Montag, 6. Mai 2019, 14:04:58 CEST schrieb Manivannan Sadhasivam:
> Enable SPI1 exposed on both Low and High speed expansion connectors
> of Ficus. SPI1 has 3 different chip selects wired as below:
>
> CS0 - Serial Flash (unpopulated)
> CS1 - Low Speed expansion
> CS2 - High Speed expansion
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
> index 027d428917b8..9baa378fc770 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
> @@ -146,6 +146,12 @@
> };
> };
>
> +&spi1 {
> + /* On both Low speed and High speed expansion */
> + cs-gpios = <0>, <&gpio4 6 0>, <&gpio4 7 0>;
cs0 should still be part of the cs-gpios though (gpio1 RK_PB2).
The flash is part of the schematics, so there might be board with
it pre-populated or people might put a flash chip on it.
Also please use the constants for pin specification (RK_PA6, RK_PA7 above)
Heiko
> + status = "okay";
> +};
> +
> &usbdrd_dwc3_0 {
> dr_mode = "host";
> };
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-05-07 11:22 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-06 12:04 [PATCH 1/2] arm64: dts: rockchip: Enable SPI0 and SPI4 on Rock960 Manivannan Sadhasivam
2019-05-06 12:04 ` [PATCH 2/2] arm64: dts: rockchip: Enable SPI1 on Ficus Manivannan Sadhasivam
2019-05-07 11:22 ` Heiko Stuebner [this message]
2019-05-07 11:36 ` Manivannan Sadhasivam
2019-05-07 11:59 ` Heiko Stuebner
2019-05-07 11:17 ` [PATCH 1/2] arm64: dts: rockchip: Enable SPI0 and SPI4 on Rock960 Heiko Stuebner
2019-05-07 11:33 ` Manivannan Sadhasivam
2019-05-07 11:34 ` Heiko Stuebner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2127870.SxaTtWf5LP@phil \
--to=heiko@sntech.de \
--cc=dev@vamrs.com \
--cc=ezequiel@collabora.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=manivannan.sadhasivam@linaro.org \
--cc=tom@vamrs.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox