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charset="iso-8859-1" X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250228_020652_637067_5F85566B X-CRM114-Status: GOOD ( 24.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Marek, Am Donnerstag, 27. Februar 2025, 17:58:04 CET schrieb Marek Vasut: > The instance of the GPU populated in Freescale i.MX95 does require > release from reset by writing into a single GPUMIX block controller > GPURESET register bit 0. Implement support for one optional reset. >=20 > Signed-off-by: Marek Vasut > --- > Cc: Boris Brezillon > Cc: Conor Dooley > Cc: David Airlie > Cc: Fabio Estevam > Cc: Krzysztof Kozlowski > Cc: Liviu Dudau > Cc: Maarten Lankhorst > Cc: Maxime Ripard > Cc: Pengutronix Kernel Team > Cc: Philipp Zabel > Cc: Rob Herring > Cc: Sascha Hauer > Cc: Sebastian Reichel > Cc: Shawn Guo > Cc: Simona Vetter > Cc: Steven Price > Cc: Thomas Zimmermann > Cc: devicetree@vger.kernel.org > Cc: dri-devel@lists.freedesktop.org > Cc: imx@lists.linux.dev > Cc: linux-arm-kernel@lists.infradead.org > --- > drivers/gpu/drm/panthor/Kconfig | 1 + > drivers/gpu/drm/panthor/panthor_device.c | 23 +++++++++++++++++++++++ > drivers/gpu/drm/panthor/panthor_device.h | 3 +++ > 3 files changed, 27 insertions(+) >=20 > diff --git a/drivers/gpu/drm/panthor/Kconfig b/drivers/gpu/drm/panthor/Kc= onfig > index 55b40ad07f3b0..ab62bd6a0750f 100644 > --- a/drivers/gpu/drm/panthor/Kconfig > +++ b/drivers/gpu/drm/panthor/Kconfig > @@ -14,6 +14,7 @@ config DRM_PANTHOR > select IOMMU_IO_PGTABLE_LPAE > select IOMMU_SUPPORT > select PM_DEVFREQ > + select RESET_SIMPLE if SOC_IMX9 > help > DRM driver for ARM Mali CSF-based GPUs. > =20 > diff --git a/drivers/gpu/drm/panthor/panthor_device.c b/drivers/gpu/drm/p= anthor/panthor_device.c > index a9da1d1eeb707..51ee9cae94504 100644 > --- a/drivers/gpu/drm/panthor/panthor_device.c > +++ b/drivers/gpu/drm/panthor/panthor_device.c > @@ -64,6 +64,17 @@ static int panthor_clk_init(struct panthor_device *ptd= ev) > return 0; > } > =20 > +static int panthor_reset_init(struct panthor_device *ptdev) > +{ > + ptdev->resets =3D devm_reset_control_get_optional_exclusive_deasserted(= ptdev->base.dev, NULL); If the description as a write-once register is true, wouldn't this already write to it? > + if (IS_ERR(ptdev->resets)) > + return dev_err_probe(ptdev->base.dev, > + PTR_ERR(ptdev->resets), > + "get reset failed"); > + > + return 0; > +} > + > void panthor_device_unplug(struct panthor_device *ptdev) > { > /* This function can be called from two different path: the reset work > @@ -217,6 +228,10 @@ int panthor_device_init(struct panthor_device *ptdev) > if (ret) > return ret; > =20 > + ret =3D panthor_reset_init(ptdev); > + if (ret) > + return ret; > + > ret =3D panthor_devfreq_init(ptdev); > if (ret) > return ret; > @@ -470,6 +485,10 @@ int panthor_device_resume(struct device *dev) > if (ret) > goto err_disable_stacks_clk; > =20 > + ret =3D reset_control_deassert(ptdev->resets); > + if (ret) > + goto err_disable_coregroup_clk; > + This wouldn't work at all on a write-once register, no? Same for resume. Best regards Alexander > panthor_devfreq_resume(ptdev); > =20 > if (panthor_device_is_initialized(ptdev) && > @@ -512,6 +531,9 @@ int panthor_device_resume(struct device *dev) > =20 > err_suspend_devfreq: > panthor_devfreq_suspend(ptdev); > + reset_control_assert(ptdev->resets); > + > +err_disable_coregroup_clk: > clk_disable_unprepare(ptdev->clks.coregroup); > =20 > err_disable_stacks_clk: > @@ -563,6 +585,7 @@ int panthor_device_suspend(struct device *dev) > =20 > panthor_devfreq_suspend(ptdev); > =20 > + reset_control_assert(ptdev->resets); > clk_disable_unprepare(ptdev->clks.coregroup); > clk_disable_unprepare(ptdev->clks.stacks); > clk_disable_unprepare(ptdev->clks.core); > diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/p= anthor/panthor_device.h > index da6574021664b..fea3a05778e2e 100644 > --- a/drivers/gpu/drm/panthor/panthor_device.h > +++ b/drivers/gpu/drm/panthor/panthor_device.h > @@ -111,6 +111,9 @@ struct panthor_device { > struct clk *coregroup; > } clks; > =20 > + /** @resets: GPU reset. */ > + struct reset_control *resets; Your commit message says "one optional reset", so I would name this just reset. > + > /** @coherent: True if the CPU/GPU are memory coherent. */ > bool coherent; > =20 >=20 =2D-=20 TQ-Systems GmbH | M=FChlstra=DFe 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht M=FCnchen, HRB 105018 Gesch=E4ftsf=FChrer: Detlef Schneider, R=FCdiger Stahl, Stefan Schneider http://www.tq-group.com/