From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C2BF9C433EF for ; Thu, 23 Jun 2022 06:03:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:CC:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=dRzG5iewyOklhCKn8hYVI6N8nZR/fBnZYKijLstLyPk=; b=37QZf2U1T55p6H 1J4veDxZzYVUwdjnZ1bIK4P4QtE0OY7Ammr3wi60Y1xPEvlBUsrEJLc+m39uACqjH3GvQll5kPy2+ IWIoW4UpBInJcuBG5KgUG/nuloQG+IIJvqUz0AaaYq4+uzNfor879wuBSUB7RoY3XTYu8ZBgwkqQD 852mLWQ5mQm2ymBbrXJTkTmWkT3HmsUnVLCb43w3F06PCw4ALRgwzvVDXSfG8Tj31z9gH07sAD++E z5jNmd3cvWDAdXDYpNW3DMjoCHYGj+GgvvWOt7z7X1uvyvYTZLQpOGGftYS8YgfjIe+0LakGe0qjZ Ub+M5mH434i6YZ+zEWTw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o4FvE-00DZQt-NN; Thu, 23 Jun 2022 06:02:32 +0000 Received: from alexa-out.qualcomm.com ([129.46.98.28]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o4FvC-00DZPM-0w for linux-arm-kernel@lists.infradead.org; Thu, 23 Jun 2022 06:02:31 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1655964150; x=1687500150; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=kQy3/S0oY9NNHYhqGTErgRO6snEJoyWavRF1Xgt/bO4=; b=b71LheIj3C0mNzAcim5eIKPh+Yrb5DiglWyy4OoO3KoLUPIwN68ogCQv QJ/zXXQkSsJ6f862aYlnbPQaKqecRqlVe3rP6yDit2/N6F4DMKHoMMObJ R5yk8PIzA6+oUdyR80TFzXca1hbT3VItDFEm9tGEVGnqsB9vqqYyT9MFH I=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 22 Jun 2022 23:02:27 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 23:02:26 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 22 Jun 2022 23:02:26 -0700 Received: from [10.50.26.56] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 22 Jun 2022 23:02:22 -0700 Message-ID: <21d5fc44-4870-02bb-70b4-d9e1188c9cc1@quicinc.com> Date: Thu, 23 Jun 2022 11:32:18 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Subject: Re: [PATCHv2] iommu/arm-smmu-qcom: Add debug support for TLB sync timeouts Content-Language: en-US To: Will Deacon , Robin Murphy , "Joerg Roedel" CC: , , , , , Rob Clark , Bjorn Andersson References: <20220526041403.9984-1-quic_saipraka@quicinc.com> From: Sai Prakash Ranjan In-Reply-To: <20220526041403.9984-1-quic_saipraka@quicinc.com> X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220622_230230_152388_67885765 X-CRM114-Status: GOOD ( 11.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 5/26/2022 9:44 AM, Sai Prakash Ranjan wrote: > TLB sync timeouts can be due to various reasons such as TBU power down > or pending TCU/TBU invalidation/sync and so on. Debugging these often > require dumping of some implementation defined registers to know the > status of TBU/TCU operations and some of these registers are not > accessible in non-secure world such as from kernel and requires SMC > calls to read them in the secure world. So, add this debug support > to dump implementation defined registers for TLB sync timeout issues. > > Signed-off-by: Sai Prakash Ranjan > --- > > Changes in v2: > * Use scm call consistently so that it works on older chipsets where > some of these regs are secure registers. > * Add device specific data to get the implementation defined register > offsets. > > --- > drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 161 ++++++++++++++++++--- > drivers/iommu/arm/arm-smmu/arm-smmu.c | 2 + > drivers/iommu/arm/arm-smmu/arm-smmu.h | 1 + > 3 files changed, 146 insertions(+), 18 deletions(-) Any comments on this patch? Thanks, Sai _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel