From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A99DC282CD for ; Mon, 3 Mar 2025 14:21:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:MIME-Version:Date:Message-ID:From:References:To: Subject:CC:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=P7gGiZwjzyL+/+VA6we4MZXQRYxqsjECLv81vWaVcmo=; b=zHnh5Y0zfk8VAq/SQtbvlU8lm5 fA4j+05VMd7DHaeWu3/tRdho+C97TNbZAK2XcO5wLicgG52tooQ0syLvD9mxDxifSrHmilqLd7jSw 26zqLBNPtiKI2zypRnEDKsKcsBqHONn/Rcyiw/LQUjkEwQvID7qHPdm3XqdodrNCY9ul+lxZ8iyLX iVtfEOJkZUwx09ozMsGUB4Fpebmm7dmh0ikRkgTuZUXscye4BFyhWbwqAGIi0FTHVhewis7BELW6l ox3I2G+3ivIxfEdi/li5RIxH3VoemVmJvcBujyVd8pkrNCxo0TmWX8ZbbY8UT03zoMPTCW28EvJjB tE/jqiYA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tp6fY-0000000151I-0zJX; Mon, 03 Mar 2025 14:21:20 +0000 Received: from szxga05-in.huawei.com ([45.249.212.191]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tp6Nz-000000010wz-2gdv for linux-arm-kernel@lists.infradead.org; Mon, 03 Mar 2025 14:03:13 +0000 Received: from mail.maildlp.com (unknown [172.19.88.163]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4Z60lz518fz1ltYp; Mon, 3 Mar 2025 21:58:55 +0800 (CST) Received: from kwepemd200014.china.huawei.com (unknown [7.221.188.8]) by mail.maildlp.com (Postfix) with ESMTPS id C0B1318001B; Mon, 3 Mar 2025 22:03:05 +0800 (CST) Received: from [10.67.121.177] (10.67.121.177) by kwepemd200014.china.huawei.com (7.221.188.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.34; Mon, 3 Mar 2025 22:03:04 +0800 CC: , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v11 2/4] arch_topology: Support SMT control for OF based system To: Dietmar Eggemann , , References: <20250218141018.18082-1-yangyicong@huawei.com> <20250218141018.18082-3-yangyicong@huawei.com> <8a9aedef-08d7-445f-9b67-85e74ec6bd50@arm.com> From: Yicong Yang Message-ID: <21e74021-fb68-0003-f0f4-7f54dd674b9d@huawei.com> Date: Mon, 3 Mar 2025 22:03:04 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.5.1 MIME-Version: 1.0 In-Reply-To: <8a9aedef-08d7-445f-9b67-85e74ec6bd50@arm.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.67.121.177] X-ClientProxiedBy: dggems706-chm.china.huawei.com (10.3.19.183) To kwepemd200014.china.huawei.com (7.221.188.8) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250303_060312_076752_A11C6031 X-CRM114-Status: GOOD ( 30.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2025/2/28 19:11, Dietmar Eggemann wrote: > On 18/02/2025 15:10, Yicong Yang wrote: >> From: Yicong Yang >> >> On building the topology from the devicetree, we've already >> gotten the SMT thread number of each core. Update the largest >> SMT thread number and enable the SMT control by the end of >> topology parsing. >> >> The core's SMT control provides two interface to the users [1]: >> 1) enable/disable SMT by writing on/off >> 2) enable/disable SMT by writing thread number 1/max_thread_number > > 1/max_thread_number stands for '1 or max_thread_number', right ? > > Aren't the two interfaces: > > (a) /sys/devices/system/cpu/smt/active > (b) /sys/devices/system/cpu/smt/control > > and you write 1) or 2) (or 'forceoff') into (b)? yes you're correct. "active" is a RO file for status only so not for this interface. Let me explicitly mention the /sys/devices/system/cpu/smt/control here in the commit. > >> If a system have more than one SMT thread number the 2) may > > s/have/has > >> not handle it well, since there're multiple thread numbers in the > > multiple thread numbers other than 1, right? according to the pr_warn_once() we implemented below it also includes the case where the system have one type of SMT cores and non-SMT cores (the thread number is 1): - 1 thread - X (!= 1) threads Discussion made in [1] and I thought we have agreement (hope I understood correctly) that all the asymmetric cases need to notify. Do you and Sudeep think we should not warn in such case? [1] https://lore.kernel.org/linux-arm-kernel/10082e64-b00a-a30b-b9c5-1401a54f6717@huawei.com/ > >> system and 2) only accept 1/max_thread_number. So issue a warning >> to notify the users if such system detected. > > This paragraph seems to be about heterogeneous systems. Maybe mention this? > > Heterogeneous system with SMT only on a subset of cores (like Intel > Hybrid): This one works (N threads per core with N=1 and N=2) just fine. > > But on Arm64 (default) we would still see: > > [0.075782] Heterogeneous SMT topology is partly supported by SMT control > more clearer, will add it. Thanks. >> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/ABI/testing/sysfs-devices-system-cpu#n542 >> >> Signed-off-by: Yicong Yang >> --- >> drivers/base/arch_topology.c | 27 +++++++++++++++++++++++++++ >> 1 file changed, 27 insertions(+) >> >> diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c >> index 3ebe77566788..23f425a9d77a 100644 >> --- a/drivers/base/arch_topology.c >> +++ b/drivers/base/arch_topology.c >> @@ -11,6 +11,7 @@ >> #include >> #include >> #include >> +#include >> #include >> #include >> #include >> @@ -506,6 +507,10 @@ core_initcall(free_raw_capacity); >> #endif >> >> #if defined(CONFIG_ARM64) || defined(CONFIG_RISCV) >> + >> +/* Maximum SMT thread number detected used to enable the SMT control */ > > maybe shorter ? > > /* used to enable SMT control */ > sure. >> +static unsigned int max_smt_thread_num; >> + >> /* >> * This function returns the logic cpu number of the node. >> * There are basically three kinds of return values: >> @@ -565,6 +570,16 @@ static int __init parse_core(struct device_node *core, int package_id, >> i++; >> } while (1); >> >> + /* >> + * If max_smt_thread_num has been initialized and doesn't match >> + * the thread number of this entry, then the system has >> + * heterogeneous SMT topology. >> + */ >> + if (max_smt_thread_num && max_smt_thread_num != i) >> + pr_warn_once("Heterogeneous SMT topology is partly supported by SMT control\n"); >> + >> + max_smt_thread_num = max_t(unsigned int, max_smt_thread_num, i); >> + >> cpu = get_cpu_for_node(core); >> if (cpu >= 0) { >> if (!leaf) { >> @@ -677,6 +692,18 @@ static int __init parse_socket(struct device_node *socket) >> if (!has_socket) >> ret = parse_cluster(socket, 0, -1, 0); >> >> + /* >> + * Notify the CPU framework of the SMT support. Initialize the >> + * max_smt_thread_num to 1 if no SMT support detected or failed >> + * to parse the topology. A thread number of 1 can be handled by >> + * the framework so we don't need to check max_smt_thread_num to >> + * see we support SMT or not. > > Not sure whether the last sentence is needed here? > We always need to call cpu_smt_set_num_threads() to notify the framework of the thread number even if SMT is not supported. In which case the thread number is 1 but the framework can handle this well. I worry readers may get confused for notifying a thread number of 1 so add this comment this. Will get rid of this if thought redundant. Thanks.