Re: [PATCH v2 04/10] arm64: dts: imx8mn: Add access-controller references

[Alexander Stein <alexander.stein@ew.tq-group.com>]

Am Montag, 10. Februar 2025, 03:36:48 CET schrieb Peng Fan:
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> > Subject: Re: [PATCH v2 04/10] arm64: dts: imx8mn: Add access-
> > controller references
> > 
> > Hi Peng,
> > 
> > Am Freitag, 7. Februar 2025, 13:02:13 CET schrieb Peng Fan:
> > > On Fri, Feb 07, 2025 at 09:36:09AM +0100, Alexander Stein wrote:
> > > >Mark ocotp as a access-controller and add references on peripherals
> > > >which can be disabled (fused).
> > >
> > > I am not sure whether gpcv2 changes should be included in this
> > > patchset or not. Just add access-controller for fused IP will not work.
> > 
> > Well, I was able to successfully boot a i.MX8M Nano DualLite.
> > 
> > > i.MX8M BLK-CTRL/GPC will hang if the related power domain is still
> > > touched by kernel. The pgc can't power up/down because clock is
> > gated.
> > 
> > Well, with GPU node disabled, no one should enable the power domain.
> > But to be on the safe side I would also add access-controllers to the
> > corresponding power domains as well.
> > 
> > > This comment also apply to i.MX8MM/P.
> > 
> > Sure. Do you have any information what is actually disabled by those
> > fused?
> > It seems it's the IP and their power domains. Anything else?
> 
> In NXP downstream there is a patch for  drivers/pmdomain/imx/imx8m-blk-ctrl.c
> 
> soc: imx8m-blk-ctrl: Support fused modules
>     
>     For fused module, its pgc can't power up/down and clock is gated.
>     Because imx8m-blk-ctrl driver will pm_runtime_get_sync/pm_runtime_put
>     all power domains during suspend/resume. So we have to remove the
>     pgc and clock of fused module from blk-ctrl DTS node.
>     Update the driver to support such case.
> 
> But this patch also needs U-Boot to update device tree nodes,
> I recalled that U-Boot will remove gpc nodes, but not update blk-ctrl nodes.

Does it work, if we add the access-controller as well for pgc_gpu3d
on imx8mp? There is nothing in blk-ctrl AFAICS. But for VPU there is.
Which clock needs to be removed there in case g1 is disabled?

Best regards,
Alexander
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