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From: Stefan.Bruens@rwth-aachen.de (Brüns, Stefan)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 02/10] dmaengine: sun6i: Correct burst length field offsets for H3
Date: Mon, 4 Sep 2017 14:47:24 +0000	[thread overview]
Message-ID: <2223782.bf3lvqWUP7@sbruens-linux> (raw)
In-Reply-To: <20170904075924.jufrqijrtxcqvztd@flea>

On Montag, 4. September 2017 09:59:24 CEST Maxime Ripard wrote:
> On Mon, Sep 04, 2017 at 12:40:53AM +0200, Stefan Br?ns wrote:
> > For the H3, the burst lengths field offsets in the channel configuration
> > register differs from earlier SoC generations.
> > 
> > Using the A31 register macros actually configured the H3 controller
> > do to bursts of length 1 always, which although working leads to higher
> > bus utilisation.
> > 
> > Signed-off-by: Stefan Br?ns <stefan.bruens@rwth-aachen.de>
> > ---
> > 
> >  drivers/dma/sun6i-dma.c | 28 +++++++++++++++++++++-------
> >  1 file changed, 21 insertions(+), 7 deletions(-)
> > 
> > diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> > index 1d9b3be30d22..f1a139f0102f 100644
> > --- a/drivers/dma/sun6i-dma.c
> > +++ b/drivers/dma/sun6i-dma.c
> > @@ -68,13 +68,15 @@
> > 
> >  #define DMA_CHAN_CFG_SRC_DRQ(x)		((x) & 0x1f)
> >  #define DMA_CHAN_CFG_SRC_IO_MODE	BIT(5)
> >  #define DMA_CHAN_CFG_SRC_LINEAR_MODE	(0 << 5)
> > 
> > -#define DMA_CHAN_CFG_SRC_BURST(x)	(((x) & 0x3) << 7)
> > +#define DMA_CHAN_CFG_SRC_BURST_A31(x)	(((x) & 0x3) << 7)
> > +#define DMA_CHAN_CFG_SRC_BURST_H3(x)	(((x) & 0x3) << 6)
> > 
> >  #define DMA_CHAN_CFG_SRC_WIDTH(x)	(((x) & 0x3) << 9)
> >  
> >  #define DMA_CHAN_CFG_DST_DRQ(x)		(DMA_CHAN_CFG_SRC_DRQ(x) << 16)
> >  #define DMA_CHAN_CFG_DST_IO_MODE	(DMA_CHAN_CFG_SRC_IO_MODE << 16)
> >  #define DMA_CHAN_CFG_DST_LINEAR_MODE	(DMA_CHAN_CFG_SRC_LINEAR_MODE << 16)
> > 
> > -#define DMA_CHAN_CFG_DST_BURST(x)	(DMA_CHAN_CFG_SRC_BURST(x) << 16)
> > +#define DMA_CHAN_CFG_DST_BURST_A31(x)	(DMA_CHAN_CFG_SRC_BURST_A31(x) <<
> > 16) +#define DMA_CHAN_CFG_DST_BURST_H3(x)	(DMA_CHAN_CFG_SRC_BURST_H3(x)
> > << 16)> 
> >  #define DMA_CHAN_CFG_DST_WIDTH(x)	(DMA_CHAN_CFG_SRC_WIDTH(x) << 16)
> >  
> >  #define DMA_CHAN_CUR_SRC	0x10
> > 
> > @@ -554,11 +556,17 @@ static int set_config(struct sun6i_dma_dev *sdev,
> > 
> >  	if (dst_width < 0)
> >  	
> >  		return dst_width;
> > 
> > -	*p_cfg = DMA_CHAN_CFG_SRC_BURST(src_burst) |
> > -		DMA_CHAN_CFG_SRC_WIDTH(src_width) |
> > -		DMA_CHAN_CFG_DST_BURST(dst_burst) |
> > +	*p_cfg = DMA_CHAN_CFG_SRC_WIDTH(src_width) |
> > 
> >  		DMA_CHAN_CFG_DST_WIDTH(dst_width);
> > 
> > +	if (sdev->cfg->dmac_variant == DMAC_VARIANT_H3) {
> > +		*p_cfg |= DMA_CHAN_CFG_SRC_BURST_H3(src_burst) |
> > +			  DMA_CHAN_CFG_DST_BURST_H3(dst_burst);
> > +	} else {
> > +		*p_cfg |= DMA_CHAN_CFG_SRC_BURST_A31(src_burst) |
> > +			  DMA_CHAN_CFG_DST_BURST_A31(dst_burst);
> > +	}
> > +
> 
> I guess we have two options to support that properly. We could either
> have a different function that would generate that register value
> based on the parameters we have, or duplicate the set_config function
> entirely, with function pointer stored in the configuration.
> 
> I think I prefer the former, as it reduces the code duplication.

Duplicating "set_config" would also mean duplicating sun6i_dma_prep_dma_memcpy 
- there are two hunks which change setting of the burst length register value.

A function pointer in the config would work.

Kind regards,

Stefan

  reply	other threads:[~2017-09-04 14:47 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-03 22:40 [PATCH 00/10] dmaengine: sun6i: Fixes for H3/A83T, enable A64 Stefan Brüns
2017-09-03 22:40 ` [PATCH 01/10] dmaengine: sun6i: Correct setting of clock autogating register for A83T/H3 Stefan Brüns
2017-09-03 23:23   ` André Przywara
2017-09-04  7:06     ` Maxime Ripard
2017-09-03 22:40 ` [PATCH 02/10] dmaengine: sun6i: Correct burst length field offsets for H3 Stefan Brüns
2017-09-04  7:59   ` Maxime Ripard
2017-09-04 14:47     ` Brüns, Stefan [this message]
2017-09-03 22:40 ` [PATCH 03/10] dmaengine: sun6i: Restructure code to allow extension for new SoCs Stefan Brüns
2017-09-03 22:40 ` [PATCH 04/10] dmaengine: sun6i: Enable additional burst lengths/widths on H3 Stefan Brüns
2017-09-04  8:00   ` Maxime Ripard
2017-09-03 22:40 ` [PATCH 05/10] dmaengine: sun6i: Move number of pchans/vchans/request to device struct Stefan Brüns
2017-09-04  7:43   ` Maxime Ripard
2017-09-04 14:30     ` Brüns, Stefan
2017-09-08 14:37       ` Maxime Ripard
2017-09-03 22:40 ` [PATCH 06/10] arm64: allwinner: a64: Add devicetree binding for DMA controller Stefan Brüns
2017-09-12 16:52   ` Rob Herring
2017-09-03 22:40 ` [PATCH 07/10] dmaengine: sun6i: Retrieve channel count/max request from devicetree Stefan Brüns
2017-09-03 23:44   ` André Przywara
2017-09-04  0:12     ` Stefan Bruens
2017-09-03 22:40 ` [PATCH 08/10] dmaengine: sun6i: Add support for Allwinner A64 and compatibles Stefan Brüns
2017-09-03 23:37   ` André Przywara
2017-09-04  0:13     ` Stefan Bruens
2017-09-03 22:41 ` [PATCH 09/10] arm64: allwinner: a64: Add device node for DMA controller Stefan Brüns

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