From: Jie Gan <jie.gan@oss.qualcomm.com>
To: Leo Yan <leo.yan@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@arm.com>,
James Clark <james.clark@linaro.org>,
Yeoreum Yun <yeoreum.yun@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Will Deacon <will@kernel.org>, Yabin Cui <yabinc@google.com>,
Keita Morisaki <keyz@google.com>,
Yuanfang Zhang <quic_yuanfang@quicinc.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Tamas Petz <tamas.petz@arm.com>,
Thomas Gleixner <tglx@kernel.org>,
Peter Zijlstra <peterz@infradead.org>
Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v10 16/20] coresight: Add PM callbacks for sink device
Date: Mon, 13 Apr 2026 13:45:50 +0800 [thread overview]
Message-ID: <227b77b9-5232-4cff-b26a-458477e9eb32@oss.qualcomm.com> (raw)
In-Reply-To: <20260405-arm_coresight_path_power_management_improvement-v10-16-13e94754a8be@arm.com>
On 4/5/2026 11:02 PM, Leo Yan wrote:
> Unlike system level sinks, per-CPU sinks may lose power during CPU idle
> states. Currently, this applies specifically to TRBE. This commit
> invokes save and restore callbacks for the sink in the CPU PM notifier.
>
> If the sink provides PM callbacks but the source does not, this is
> unsafe because the sink cannot be disabled safely unless the source
> can also be controlled, so veto low power entry to avoid lockups.
>
> Tested-by: James Clark <james.clark@linaro.org>
> Reviewed-by: Yeoreum Yun <yeoreum.yun@arm.com>
> Reviewed-by: James Clark <james.clark@linaro.org>
> Signed-off-by: Leo Yan <leo.yan@arm.com>
> ---
> drivers/hwtracing/coresight/coresight-core.c | 46 ++++++++++++++++++++++++++--
> 1 file changed, 43 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
> index c1e8debc76aba7eb5ecf7efe2a3b9b8b3e11b10c..a918bf6398a932de30fe9b4947020cc4c1cfb2f7 100644
> --- a/drivers/hwtracing/coresight/coresight-core.c
> +++ b/drivers/hwtracing/coresight/coresight-core.c
> @@ -1736,14 +1736,15 @@ static void coresight_release_device_list(void)
> /* Return: 1 if PM is required, 0 if skip, <0 on error */
> static int coresight_pm_check(struct coresight_path *path)
> {
> - struct coresight_device *source;
> - bool source_has_cb;
> + struct coresight_device *source, *sink;
> + bool source_has_cb, sink_has_cb;
>
> if (!path)
> return 0;
>
> source = coresight_get_source(path);
> - if (!source)
> + sink = coresight_get_sink(path);
> + if (!source || !sink)
> return 0;
>
> /* Don't save and restore if the source is inactive */
> @@ -1759,16 +1760,36 @@ static int coresight_pm_check(struct coresight_path *path)
> if (source_has_cb)
> return 1;
>
> + sink_has_cb = coresight_ops(sink)->pm_save_disable &&
> + coresight_ops(sink)->pm_restore_enable;
> + /*
> + * It is not permitted that the source has no callbacks while the sink
> + * does, as the sink cannot be disabled without disabling the source,
> + * which may lead to lockups. Alternatively, the ETM driver should
> + * enable self-hosted PM mode at probe (see etm4_probe()).
> + */
> + if (sink_has_cb) {
> + pr_warn_once("coresight PM failed: source has no PM callbacks; "
> + "cannot safely control sink\n");
> + return -EINVAL;
> + }
> +
> return 0;
> }
>
> static int coresight_pm_device_save(struct coresight_device *csdev)
> {
> + if (!csdev || !coresight_ops(csdev)->pm_save_disable)
> + return 0;
> +
> return coresight_ops(csdev)->pm_save_disable(csdev);
> }
>
> static void coresight_pm_device_restore(struct coresight_device *csdev)
> {
> + if (!csdev || !coresight_ops(csdev)->pm_restore_enable)
> + return;
> +
> coresight_ops(csdev)->pm_restore_enable(csdev);
> }
>
> @@ -1787,15 +1808,32 @@ static int coresight_pm_save(struct coresight_path *path)
> to = list_prev_entry(coresight_path_last_node(path), link);
> coresight_disable_path_from_to(path, from, to);
>
> + ret = coresight_pm_device_save(coresight_get_sink(path));
> + if (ret)
> + goto sink_failed;
> +
> return 0;
> +
> +sink_failed:
> + if (!coresight_enable_path_from_to(path, coresight_get_mode(source),
> + from, to))
> + coresight_pm_device_restore(source);
I have go through the history messages. I have a question about this
point here:
how can we handle the scenario if coresight_enable_path_from_to failed?
It means we are never calling coresight_pm_device_restore for the ETM
and leaving the ETM with OS lock state until CPU reset?
Consider we are calling etm4_disable_hw with OS lock:
etm4_disable_hw -> etm4_disable_trace_unit -> etm4x_wait_status (may
timeout here?)
Thanks,
Jie
> +
> + pr_err("Failed in coresight PM save on CPU%d: %d\n",
> + smp_processor_id(), ret);
> + this_cpu_write(percpu_pm_failed, true);
> + return ret;
> }
>
> static void coresight_pm_restore(struct coresight_path *path)
> {
> struct coresight_device *source = coresight_get_source(path);
> + struct coresight_device *sink = coresight_get_sink(path);
> struct coresight_node *from, *to;
> int ret;
>
> + coresight_pm_device_restore(sink);
> +
> from = coresight_path_first_node(path);
> /* Up to the node before sink to avoid latency */
> to = list_prev_entry(coresight_path_last_node(path), link);
> @@ -1808,6 +1846,8 @@ static void coresight_pm_restore(struct coresight_path *path)
> return;
>
> path_failed:
> + coresight_pm_device_save(sink);
> +
> pr_err("Failed in coresight PM restore on CPU%d: %d\n",
> smp_processor_id(), ret);
>
>
next prev parent reply other threads:[~2026-04-13 5:46 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-05 15:02 [PATCH v10 00/20] CoreSight: Refactor power management for CoreSight path Leo Yan
2026-04-05 15:02 ` [PATCH v10 01/20] coresight: Extract device init into coresight_init_device() Leo Yan
2026-04-05 15:02 ` [PATCH v10 02/20] coresight: Populate CPU ID into coresight_device Leo Yan
2026-04-05 15:02 ` [PATCH v10 03/20] coresight: Remove .cpu_id() callback from source ops Leo Yan
2026-04-05 15:02 ` [PATCH v10 04/20] coresight: Take hotplug lock in enable_source_store() for Sysfs mode Leo Yan
2026-04-05 15:02 ` [PATCH v10 05/20] coresight: etm4x: Set per-CPU path on local CPU Leo Yan
2026-04-05 15:02 ` [PATCH v10 06/20] coresight: etm3x: " Leo Yan
2026-04-05 15:02 ` [PATCH v10 07/20] coresight: Register CPU PM notifier in core layer Leo Yan
2026-04-05 15:02 ` [PATCH v10 08/20] coresight: etm4x: Hook CPU PM callbacks Leo Yan
2026-04-05 15:02 ` [PATCH v10 09/20] coresight: etm4x: Remove redundant checks in PM save and restore Leo Yan
2026-04-05 15:02 ` [PATCH v10 10/20] coresight: syscfg: Use IRQ-safe spinlock to protect active variables Leo Yan
2026-04-05 15:02 ` [PATCH v10 11/20] coresight: Move source helper disabling to coresight_disable_path() Leo Yan
2026-04-05 15:02 ` [PATCH v10 12/20] coresight: Control path with range Leo Yan
2026-04-05 15:02 ` [PATCH v10 13/20] coresight: Use helpers to fetch first and last nodes Leo Yan
2026-04-05 15:02 ` [PATCH v10 14/20] coresight: Introduce coresight_enable_source() helper Leo Yan
2026-04-05 15:02 ` [PATCH v10 15/20] coresight: Control path during CPU idle Leo Yan
2026-04-05 15:02 ` [PATCH v10 16/20] coresight: Add PM callbacks for sink device Leo Yan
2026-04-09 10:52 ` James Clark
2026-04-09 12:54 ` James Clark
2026-04-09 13:14 ` Suzuki K Poulose
2026-04-09 14:30 ` James Clark
2026-04-09 14:31 ` James Clark
2026-04-09 14:49 ` Leo Yan
2026-04-10 9:11 ` James Clark
2026-04-09 15:44 ` Leo Yan
2026-04-10 8:55 ` James Clark
2026-04-13 5:45 ` Jie Gan [this message]
2026-04-13 8:48 ` Leo Yan
2026-04-13 9:27 ` Jie Gan
2026-04-05 15:02 ` [PATCH v10 17/20] coresight: trbe: Save and restore state across CPU low power state Leo Yan
2026-04-09 10:52 ` James Clark
2026-04-09 15:54 ` Leo Yan
2026-04-10 8:45 ` James Clark
2026-04-05 15:02 ` [PATCH v10 18/20] coresight: sysfs: Increment refcount only for system tracers Leo Yan
2026-04-05 15:02 ` [PATCH v10 19/20] coresight: Move CPU hotplug callbacks to core layer Leo Yan
2026-04-05 15:02 ` [PATCH v10 20/20] coresight: sysfs: Validate CPU online status for per-CPU sources Leo Yan
2026-04-13 10:30 ` [PATCH v10 00/20] CoreSight: Refactor power management for CoreSight path Jie Gan
2026-04-13 16:31 ` Leo Yan
2026-04-14 3:30 ` Jie Gan
2026-04-14 6:09 ` Leo Yan
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