[PATCH 28/40] arm64: dts: rockchip: Add frl-enable-gpios to rk3588-tiger

Cristian Ciocaltea
2026-04-17T09:27:17Z

The board exposes the GPIO0_D3 line to control the voltage bias on the
HDMI0 data lines. It must be asserted when operating in HDMI 2.1 FRL
mode and deasserted for HDMI 1.4/2.0 TMDS mode.

Wire up the HDMI0 node to the GPIO line using the frl-enable-gpios
property to allow adjusting the bias when transitioning between TMDS and
FRL operating modes.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts | 3 ++-
arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi | 9 ++++++++-
2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts
index caa43d1abf17..8401f7bebe86 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts
@@ -173,7 +173,8 @@ &hdmi0 {
* connected on Haikou itself.
*/
pinctrl-names = "default";
- pinctrl-0 = <&hdmim0_tx0_hpd &hdmim1_tx0_scl &hdmim1_tx0_sda>;
+ pinctrl-0 = <&hdmim0_tx0_hpd &hdmim1_tx0_scl &hdmim1_tx0_sda
+ &hdmi0_frl_en>;
status = "okay";
};

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
index a0e97481afb7..ea0be7b6c935 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
@@ -150,7 +150,8 @@ &gpu {
&hdmi0 {
pinctrl-names = "default";
pinctrl-0 = <&hdmim1_tx0_cec &hdmim0_tx0_hpd &hdmim1_tx0_scl
- &hdmim1_tx0_sda>;
+ &hdmim1_tx0_sda &hdmi0_frl_en>;
+ frl-enable-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
};

&i2c1 {
@@ -349,6 +350,12 @@ eth_reset: eth-reset {
};
};

+ hdmi {
+ hdmi0_frl_en: hdmi0-frl-en {
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
leds {
module_led_pin: module-led-pin {
rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;

--
2.53.0