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Wed, 25 Sep 2024 00:50:29 -0700 (PDT) Received: from [192.168.50.4] ([82.78.167.115]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42e969feb45sm10046135e9.20.2024.09.25.00.50.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 25 Sep 2024 00:50:27 -0700 (PDT) Message-ID: <23531a70-cf50-4b32-a9fd-81e6cfcbcf9d@tuxon.dev> Date: Wed, 25 Sep 2024 10:50:24 +0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 04/16] soc: renesas: Add SYSC driver for Renesas RZ/G3S Content-Language: en-US To: Geert Uytterhoeven Cc: vkoul@kernel.org, kishon@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, p.zabel@pengutronix.de, geert+renesas@glider.be, magnus.damm@gmail.com, gregkh@linuxfoundation.org, mturquette@baylibre.com, sboyd@kernel.org, yoshihiro.shimoda.uh@renesas.com, biju.das.jz@bp.renesas.com, ulf.hansson@linaro.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Claudiu Beznea References: <20240822152801.602318-1-claudiu.beznea.uj@bp.renesas.com> <20240822152801.602318-5-claudiu.beznea.uj@bp.renesas.com> From: claudiu beznea In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240925_005031_430772_B0C2B3C0 X-CRM114-Status: GOOD ( 17.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Geert, On 24.09.2024 14:32, Geert Uytterhoeven wrote: > Hi Claudiu, > > On Thu, Aug 22, 2024 at 5:28 PM Claudiu wrote: >> From: Claudiu Beznea >> >> The RZ/G3S SYS Controller has 2 registers (one for PCIE one for USB) that >> need to be configured before/after powering off/on the PCI or USB >> ares. The bits in these registers control signals to PCIE and USB that >> need to be de-asserted/asserted after/before power on/off event. For this >> add SYSC controller driver that registers a reset controller driver on >> auxiliary bus which allows USB, PCIE drivers to control these signals. >> >> Signed-off-by: Claudiu Beznea > > Thanks for your patch! > >> --- /dev/null >> +++ b/drivers/reset/reset-rzg3s-sysc.c >> @@ -0,0 +1,140 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Renesas RZ/G3S SYSC reset driver >> + * >> + * Copyright (C) 2024 Renesas Electronics Corp. >> + */ >> + >> +#include > > Using the Auxiliary Bus requires selecting AUXILIARY_BUS. Thank you for pointing it. I'll adjust it in the next version, if it will be one. > Elsse you might run into build failures: > > aarch64-linux-gnu-ld: drivers/soc/renesas/rzg3s-sysc.o: in function > `rzg3s_sysc_probe': > rzg3s-sysc.c:(.text+0x21c): undefined reference to `auxiliary_device_init' > aarch64-linux-gnu-ld: rzg3s-sysc.c:(.text+0x264): undefined reference > to `__auxiliary_device_add' > aarch64-linux-gnu-ld: drivers/reset/reset-rzg3s-sysc.o: in function > `rzg3s_sysc_reset_driver_init': > reset-rzg3s-sysc.c:(.init.text+0x1c): undefined reference to > `__auxiliary_driver_register' > aarch64-linux-gnu-ld: drivers/reset/reset-rzg3s-sysc.o: in function > `rzg3s_sysc_reset_driver_exit': > reset-rzg3s-sysc.c:(.exit.text+0x10): undefined reference to > `auxiliary_driver_unregister' > > Gr{oetje,eeting}s, > > Geert >