Re: [PATCH v7 3/4] coresight: tpda: add logic to configure TPDA_SYNCR register

[Jie Gan <jie.gan@oss.qualcomm.com>]

On 12/23/2025 5:49 PM, Suzuki K Poulose wrote:
> On 23/12/2025 08:41, Jie Gan wrote:
>> From: Tao Zhang <tao.zhang@oss.qualcomm.com>
>>
>> The TPDA_SYNC counter tracks the number of bytes transferred from the
>> aggregator. When this count reaches the value programmed in the
>> TPDA_SYNCR register, an ASYNC request is triggered, allowing userspace
>> tools to accurately parse each valid packet.
>>
>> Signed-off-by: Tao Zhang <tao.zhang@oss.qualcomm.com>
>> Reviewed-by: James Clark <james.clark@linaro.org>
>> Co-developed-by: Jie Gan <jie.gan@oss.qualcomm.com>
>> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
>> ---
>>   .../ABI/testing/sysfs-bus-coresight-devices-tpda   | 18 +++++
>>   drivers/hwtracing/coresight/coresight-tpda.c       | 90 ++++++++++++ 
>> ++++++++++
>>   drivers/hwtracing/coresight/coresight-tpda.h       | 10 +++
>>   3 files changed, 118 insertions(+)
>>
>> diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices- 
>> tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
>> index c8bc7b19ab25..c989eea1ef59 100644
>> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
>> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
>> @@ -41,3 +41,21 @@ Contact:    Jinlong Mao 
>> <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qu
>>   Description:
>>           (RW) Set global (all ports) flush request bit. The bit 
>> remains set until a
>>           global flush request sequence completes.
>> +
>> +What:        /sys/bus/coresight/devices/<tpda-name>/syncr_mode
>> +Date:        December 2025
>> +KernelVersion:    6.19
>> +Contact:    Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang 
>> <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
>> +Description:
>> +        (RW) Set mode the of the syncr counter.
>> +        mode 0 - COUNT[11:0] value represents the approximate number 
>> of bytes moved between two ASYNC packet requests
>> +        mode 1 - the bits COUNT[11:7] are used as a power of 2. for 
>> example, we could insert an async packet every 8K
>> +                 data by writing a value 13 to the COUNT[11:7] field.
>> +
>> +What:        /sys/bus/coresight/devices/<tpda-name>/syncr_count
>> +Date:        December 2025
>> +KernelVersion:    6.19
>> +Contact:    Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang 
>> <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
>> +Description:
>> +        (RW) Set value the of the syncr counter.
>> +        Range: 0-4095
>> diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/ 
>> hwtracing/coresight/coresight-tpda.c
>> index d24a9098f1b1..8283e16ec400 100644
>> --- a/drivers/hwtracing/coresight/coresight-tpda.c
>> +++ b/drivers/hwtracing/coresight/coresight-tpda.c
>> @@ -163,6 +163,20 @@ static void tpda_enable_pre_port(struct 
>> tpda_drvdata *drvdata)
>>        */
>>       if (drvdata->trig_flag_ts)
>>           writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR);
>> +
>> +    /* Initialize with a value of 0 */
>> +    val = 0;
>> +    if (drvdata->syncr_mode)
>> +        val |= TPDA_SYNCR_MODE_CTRL_MASK;
>> +
>> +    if (drvdata->syncr_count > 0 &&
>> +        drvdata->syncr_count < TPDA_SYNCR_COUNT_MASK)
>> +        val |= drvdata->syncr_count;
>> +    else
>> +        /* Program the count to its MAX value by default */
>> +        val |= TPDA_SYNCR_COUNT_MASK;
>> +
>> +    writel_relaxed(val, drvdata->base + TPDA_SYNCR);
>>   }
>>   static int tpda_enable_port(struct tpda_drvdata *drvdata, int port)
>> @@ -385,8 +399,84 @@ static ssize_t global_flush_req_store(struct 
>> device *dev,
>>   }
>>   static DEVICE_ATTR_RW(global_flush_req);
>> +static ssize_t syncr_mode_show(struct device *dev,
>> +                   struct device_attribute *attr,
>> +                   char *buf)
>> +{
>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
>> +    unsigned long val, syncr_val;
>> +
>> +    if (!drvdata->csdev->refcnt)
>> +        return -EINVAL;
>> +
>> +    guard(spinlock)(&drvdata->spinlock);
>> +    syncr_val = readl_relaxed(drvdata->base + TPDA_SYNCR);
>> +    val = FIELD_GET(TPDA_SYNCR_MODE_CTRL_MASK, syncr_val);
>> +
>> +    return sysfs_emit(buf, "%lu\n", val);
>> +}
>> +
>> +static ssize_t syncr_mode_store(struct device *dev,
>> +                struct device_attribute *attr,
>> +                const char *buf,
>> +                size_t size)
>> +{
>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
>> +    unsigned long val;
>> +
>> +    if (kstrtoul(buf, 0, &val))
>> +        return -EINVAL;
>> +
>> +    guard(spinlock)(&drvdata->spinlock);
>> +    /* set the mode when first enabling the device */
>> +    drvdata->syncr_mode = !!val;
>> +
>> +    return size;
>> +}
>> +static DEVICE_ATTR_RW(syncr_mode);
>> +
>> +static ssize_t syncr_count_show(struct device *dev,
>> +                struct device_attribute *attr,
>> +                char *buf)
>> +{
>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
>> +    unsigned long val;
>> +
>> +    if (!drvdata->csdev->refcnt)
>> +        return -EINVAL;
>> +
>> +    guard(spinlock)(&drvdata->spinlock);
>> +    val = readl_relaxed(drvdata->base + TPDA_SYNCR);
>> +    val &= TPDA_SYNCR_COUNT_MASK;
>> +
>> +    return sysfs_emit(buf, "%lu\n", val);
>> +}
>> +
>> +static ssize_t syncr_count_store(struct device *dev,
>> +                 struct device_attribute *attr,
>> +                 const char *buf,
>> +                 size_t size)
>> +{
>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
>> +    unsigned long val;
>> +
>> +    if (kstrtoul(buf, 0, &val))
>> +        return -EINVAL;
>> +
>> +    if (val < 0 || val > TPDA_SYNCR_COUNT_MASK)
> 
> Checking "val < 0" for an unsigned type is invalid. Simply keep the 
> second part.
> 

Sure, sorry for the mistake. I forgot it’s an unsigned value here.

Will send a new version to fix it.

Thanks,
Jie

> Suzuki
> 
> 
>> +        return -EINVAL;
>> +
>> +    guard(spinlock)(&drvdata->spinlock);
>> +    drvdata->syncr_count = val;
>> +
>> +    return size;
>> +}
>> +static DEVICE_ATTR_RW(syncr_count);
>> +
>>   static struct attribute *tpda_attrs[] = {
>>       &dev_attr_global_flush_req.attr,
>> +    &dev_attr_syncr_mode.attr,
>> +    &dev_attr_syncr_count.attr,
>>       tpda_trig_sysfs_rw(freq_ts_enable, FREQTS),
>>       tpda_trig_sysfs_rw(trig_freq_enable, FRIE),
>>       tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE),
>> diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/ 
>> hwtracing/coresight/coresight-tpda.h
>> index 1cc9253293ec..56d35697303a 100644
>> --- a/drivers/hwtracing/coresight/coresight-tpda.h
>> +++ b/drivers/hwtracing/coresight/coresight-tpda.h
>> @@ -9,6 +9,7 @@
>>   #define TPDA_CR            (0x000)
>>   #define TPDA_Pn_CR(n)        (0x004 + (n * 4))
>>   #define TPDA_FPID_CR        (0x084)
>> +#define TPDA_SYNCR        (0x08C)
>>   /* Cross trigger global (all ports) flush request bit */
>>   #define TPDA_CR_FLREQ        BIT(0)
>> @@ -36,6 +37,11 @@
>>   /* Aggregator port DSB data set element size bit */
>>   #define TPDA_Pn_CR_DSBSIZE        BIT(8)
>> +/* TPDA_SYNCR count mask */
>> +#define TPDA_SYNCR_COUNT_MASK        GENMASK(11, 0)
>> +/* TPDA_SYNCR mode control bit */
>> +#define TPDA_SYNCR_MODE_CTRL_MASK    GENMASK(12, 12)
>> +
>>   #define TPDA_MAX_INPORTS    32
>>   /**
>> @@ -52,6 +58,8 @@
>>    * @trig_freq:    Enable/disable cross trigger FREQ packet request 
>> interface.
>>    * @freq_ts:    Enable/disable the timestamp for all FREQ packets.
>>    * @cmbchan_mode: Configure the CMB/MCMB channel mode.
>> + * @syncr_mode:    Setting the mode for counting packets.
>> + * @syncr_count: Setting the value of the count.
>>    */
>>   struct tpda_drvdata {
>>       void __iomem        *base;
>> @@ -66,6 +74,8 @@ struct tpda_drvdata {
>>       bool            trig_freq;
>>       bool            freq_ts;
>>       bool            cmbchan_mode;
>> +    bool            syncr_mode;
>> +    u32            syncr_count;
>>   };
>>   /* Enumerate members of global control register(cr) */
>>
>