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Fri, 13 Mar 2026 17:36:47 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface MIME-Version: 1.0 X-ThreadId: A224H4bSXjB- Date: Fri, 13 Mar 2026 22:36:02 +0100 From: "Arnd Bergmann" To: "Conor Dooley" , aspeedyh Cc: "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Joel Stanley" , "Andrew Jeffery" , "Ryan Chen" , "Philipp Zabel" , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, maciej.lawniczak@intel.com, "Mark Brown" Message-Id: <23909400-4e7f-49c9-a982-14036372af98@app.fastmail.com> In-Reply-To: <20260313-energy-casket-ca8adc1f1fd1@spud> References: <20260313-upstream_espi-v1-0-9504428e1f43@aspeedtech.com> <20260313-energy-casket-ca8adc1f1fd1@spud> Subject: Re: [PATCH 0/7] soc: aspeed: Add AST2600 eSPI controller support Content-Type: text/plain Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260313_143653_767368_E91E1A86 X-CRM114-Status: GOOD ( 18.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Mar 13, 2026, at 17:24, Conor Dooley wrote: > On Fri, Mar 13, 2026 at 06:07:35PM +0800, aspeedyh wrote: >> This series adds initial support for the eSPI controller found on ASPEED >> AST2600 BMC SoCs. >> >> The series introduces a eSPI controller framework for ASPEED SoCs under >> drivers/soc/aspeed/, adds AST2600-specific controller support for >> peripheral and flash channels, defines the corresponding devicetree >> binding, and adds the AST2600 eSPI controller node to the SoC dtsi. >> >> The driver is intended to support host-BMC communication over the BMC-side >> eSPI slave controller present on AST2600 systems. > > This all seems to be in the wrong places entirely, shouldn't an eSPI > driver and bindings go in the spi subsystem? >From an initial reading, my impression is that patches 1, 2, 3 and 7 should be modified to use the normal SPI interfaces to implement an spi target driver, possibly a combined host/target driver. Reworking this should be fairly straightforward because the interfaces to the SPI core are well documented. It is possible that the hardware can only be used to provide espi device emulation. From what I could see in the code, there is not much special in there, but I'm not that familiar with SPI Patches 4, 5 and 6 in consequently would need to be reworked so these can implement the TAFS spec independent of the SPI controller, and can be shared e.g. with other OpenBMC targets using the same module and the same user interface. None of this should be aspeed specific. There is a good chance that both the user interface and the placing of the code will need a more debate, but I would suggest first trying to move everything over to use the SPI subsystem but leave other parts untouched for the moment. > FSL's appears to be there. I think this is just a similarly named device: Freescale/NXP's eSPI device driver is unrelated to the Intel eSPI spec but rather implements a normal SPI driver the same way that eDMA and eSDHC are Freescale's implementation of dmaengine and SDHCI drivers. Arnd