From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 53BA3CF8853 for ; Fri, 4 Oct 2024 17:24:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:References:Cc:To:From:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=3pjxg011QqnDWg19JHSs2m4EY1QCBhh2nl6955THq8c=; b=weOPc+UOUtMDu/KwI8iXzGq+Jv QOiOARmvKm8CInQwJrOrA9gpFcdJnbbs+qu9U55TvWYzOg9qY4dT4Fx93tEwZ6dJaU77seokLNE8R 6HO7vKH0d3b/ko8c1gAeD0MpIqUPgkGNCB+dlWUeJ8AhGKi340FWOWbal5WLpmoPVFfjpAvKz2xMT Xw/txCjJBnGmmgTXnYifnzWdRx5naU8tjhuqadR+mYOuU/wdYIVsBITpLXSA26qVxBTlK4uIfX1Px w9yqyaukEqOZA2XmhTaH65TPX39ponlLj9DGW52C0JbH9fCY0vydVA/TwXgS/dcZ5RGbqN5L4wznc C9eZFp8g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1swm1v-0000000DVOd-4BT3; Fri, 04 Oct 2024 17:23:52 +0000 Received: from mgamail.intel.com ([198.175.65.12]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1swlgx-0000000DN6T-2MDS for linux-arm-kernel@lists.infradead.org; Fri, 04 Oct 2024 17:02:13 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728061331; x=1759597331; h=message-id:date:mime-version:subject:from:to:cc: references:in-reply-to:content-transfer-encoding; bh=qDpMplMgxytGjNYaLrwu1Ta+OkMlq1ik67+NV4u5L98=; b=ZzrjUYZBotifQO0Ppq5M2I2A6tHnFeymFIQzPkgPD2AZAOA+BNGL+oBW WLgFflZhkLoCpnikMeYRDUmh+yjNB+FZ3JjfixFkVYKESiKwb3Y3dmAUF rPyXw5ydbAVOKMX3n3WnUKYB+D/7tvYKh2lW7XV30EjDs91U2k63OOlKl YLyRtlW0NqxonwLgvSeFpPdBl+Y7Qt5QzPzUog2RDc5lyAiBzI14SJq4x 069zvwhe97qOYsKCyCjqh/0Zv+0UtiVhRNiv6RW/erE8skx83jpreZgX8 ibDxgiFCQ7vBxdRI4G0bggjl1P4VbsFObvUd9YE63LYOkOPL9gQha7nJp Q==; X-CSE-ConnectionGUID: Iw+tIwhzQ1yMejYrcsGuYw== X-CSE-MsgGUID: UlU+AZppRKS/JF5Jt6pLfA== X-IronPort-AV: E=McAfee;i="6700,10204,11215"; a="38684814" X-IronPort-AV: E=Sophos;i="6.11,178,1725346800"; d="scan'208";a="38684814" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2024 10:02:10 -0700 X-CSE-ConnectionGUID: OiBFHAZeRWKuRfDw2NqBDA== X-CSE-MsgGUID: eCujfT4nS961gNw3nQeuhQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,178,1725346800"; d="scan'208";a="75577640" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO [10.0.2.15]) ([10.245.166.93]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2024 10:02:02 -0700 Message-ID: <2404a427-a1fb-44fb-99f1-a6dc25d4c21e@intel.com> Date: Fri, 4 Oct 2024 20:01:56 +0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V11 00/10] perf/core: Add ability for an event to "pause" or "resume" AUX area tracing From: Adrian Hunter To: Peter Zijlstra Cc: Ingo Molnar , Mark Rutland , Alexander Shishkin , Heiko Carstens , Thomas Richter , Hendrik Brueckner , Suzuki K Poulose , Mike Leach , James Clark , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Yicong Yang , Jonathan Cameron , Will Deacon , Arnaldo Carvalho de Melo , Jiri Olsa , Namhyung Kim , Ian Rogers , Andi Kleen , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org References: <20240806155514.17900-1-adrian.hunter@intel.com> Content-Language: en-US Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki In-Reply-To: <20240806155514.17900-1-adrian.hunter@intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241004_100211_681459_5F2E4A4A X-CRM114-Status: GOOD ( 40.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 6/08/24 18:55, Adrian Hunter wrote: > Hi > > Note for V11: > Moving aux_paused into a union within struct hw_perf_event caused > a regression because aux_paused was being written unconditionally > even though it is valid only for AUX (e.g. Intel PT) PMUs. > That is fixed in V11. Any comments? > > Hardware traces, such as instruction traces, can produce a vast amount of > trace data, so being able to reduce tracing to more specific circumstances > can be useful. > > The ability to pause or resume tracing when another event happens, can do > that. > > These patches add such a facilty and show how it would work for Intel > Processor Trace. > > Maintainers of other AUX area tracing implementations are requested to > consider if this is something they might employ and then whether or not > the ABI would work for them. Note, thank you to James Clark (ARM) for > evaluating the API for Coresight. Suzuki K Poulose (ARM) also responded > positively to the RFC. > > Changes to perf tools are now (since V4) fleshed out. > > Please note, Intel® Architecture Instruction Set Extensions and Future > Features Programming Reference March 2024 319433-052, currently: > > https://cdrdv2.intel.com/v1/dl/getContent/671368 > > introduces hardware pause / resume for Intel PT in a feature named > Intel PT Trigger Tracing. > > For that more fields in perf_event_attr will be necessary. The main > differences are: > - it can be applied not just to overflows, but optionally to > every event > - a packet is emitted into the trace, optionally with IP > information > - no PMI > - works with PMC and DR (breakpoint) events only > > Here are the proposed additions to perf_event_attr, please comment: > > diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/linux/perf_event.h > index 0c557f0a17b3..05dcc43f11bb 100644 > --- a/tools/include/uapi/linux/perf_event.h > +++ b/tools/include/uapi/linux/perf_event.h > @@ -369,6 +369,22 @@ enum perf_event_read_format { > PERF_FORMAT_MAX = 1U << 5, /* non-ABI */ > }; > > +enum { > + PERF_AUX_ACTION_START_PAUSED = 1U << 0, > + PERF_AUX_ACTION_PAUSE = 1U << 1, > + PERF_AUX_ACTION_RESUME = 1U << 2, > + PERF_AUX_ACTION_EMIT = 1U << 3, > + PERF_AUX_ACTION_NR = 0x1f << 4, > + PERF_AUX_ACTION_NO_IP = 1U << 9, > + PERF_AUX_ACTION_PAUSE_ON_EVT = 1U << 10, > + PERF_AUX_ACTION_RESUME_ON_EVT = 1U << 11, > + PERF_AUX_ACTION_EMIT_ON_EVT = 1U << 12, > + PERF_AUX_ACTION_NR_ON_EVT = 0x1f << 13, > + PERF_AUX_ACTION_NO_IP_ON_EVT = 1U << 18, > + PERF_AUX_ACTION_MASK = ~PERF_AUX_ACTION_START_PAUSED, > + PERF_AUX_PAUSE_RESUME_MASK = PERF_AUX_ACTION_PAUSE | PERF_AUX_ACTION_RESUME, > +}; > + > #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ > #define PERF_ATTR_SIZE_VER1 72 /* add: config2 */ > #define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */ > @@ -515,10 +531,19 @@ struct perf_event_attr { > union { > __u32 aux_action; > struct { > - __u32 aux_start_paused : 1, /* start AUX area tracing paused */ > - aux_pause : 1, /* on overflow, pause AUX area tracing */ > - aux_resume : 1, /* on overflow, resume AUX area tracing */ > - __reserved_3 : 29; > + __u32 aux_start_paused : 1, /* start AUX area tracing paused */ > + aux_pause : 1, /* on overflow, pause AUX area tracing */ > + aux_resume : 1, /* on overflow, resume AUX area tracing */ > + aux_emit : 1, /* generate AUX records instead of events */ > + aux_nr : 5, /* AUX area tracing reference number */ > + aux_no_ip : 1, /* suppress IP in AUX records */ > + /* Following apply to event occurrence not overflows */ > + aux_pause_on_evt : 1, /* on event, pause AUX area tracing */ > + aux_resume_on_evt : 1, /* on event, resume AUX area tracing */ > + aux_emit_on_evt : 1, /* generate AUX records instead of events */ > + aux_nr_on_evt : 5, /* AUX area tracing reference number */ > + aux_no_ip_on_evt : 1, /* suppress IP in AUX records */ > + __reserved_3 : 13; > }; > }; > > > Changes in V11: > perf/core: Add aux_pause, aux_resume, aux_start_paused > Make assignment to event->hw.aux_paused conditional on > (pmu->capabilities & PERF_PMU_CAP_AUX_PAUSE). > > perf/x86/intel: Do not enable large PEBS for events with aux actions or aux sampling > Remove definition of has_aux_action() because it has > already been added as an inline function. > > perf/x86/intel/pt: Fix sampling synchronization > perf tools: Enable evsel__is_aux_event() to work for ARM/ARM64 > perf tools: Enable evsel__is_aux_event() to work for S390_CPUMSF > Dropped because they have already been applied > > Changes in V10: > perf/core: Add aux_pause, aux_resume, aux_start_paused > Move aux_paused into a union within struct hw_perf_event. > Additional comment wrt PERF_EF_PAUSE/PERF_EF_RESUME. > Factor out has_aux_action() as an inline function. > Use scoped_guard for irqsave. > Move calls of perf_event_aux_pause() from __perf_event_output() > to __perf_event_overflow(). > > Changes in V9: > perf/x86/intel/pt: Fix sampling synchronization > New patch > > perf/core: Add aux_pause, aux_resume, aux_start_paused > Move aux_paused to struct hw_perf_event > > perf/x86/intel/pt: Add support for pause / resume > Add more comments and barriers for resume_allowed and > pause_allowed > Always use WRITE_ONCE with resume_allowed > > > Changes in V8: > > perf tools: Parse aux-action > Fix clang warning: > util/auxtrace.c:821:7: error: missing field 'aux_action' initializer [-Werror,-Wmissing-field-initializers] > 821 | {NULL}, > | ^ > > Changes in V7: > > Add Andi's Reviewed-by for patches 2-12 > Re-base > > Changes in V6: > > perf/core: Add aux_pause, aux_resume, aux_start_paused > Removed READ/WRITE_ONCE from __perf_event_aux_pause() > Expanded comment about guarding against NMI > > Changes in V5: > > perf/core: Add aux_pause, aux_resume, aux_start_paused > Added James' Ack > > perf/x86/intel: Do not enable large PEBS for events with aux actions or aux sampling > New patch > > perf tools > Added Ian's Ack > > Changes in V4: > > perf/core: Add aux_pause, aux_resume, aux_start_paused > Rename aux_output_cfg -> aux_action > Reorder aux_action bits from: > aux_pause, aux_resume, aux_start_paused > to: > aux_start_paused, aux_pause, aux_resume > Fix aux_action bits __u64 -> __u32 > > coresight: Have a stab at support for pause / resume > Dropped > > perf tools > All new patches > > Changes in RFC V3: > > coresight: Have a stab at support for pause / resume > 'mode' -> 'flags' so it at least compiles > > Changes in RFC V2: > > Use ->stop() / ->start() instead of ->pause_resume() > Move aux_start_paused bit into aux_output_cfg > Tighten up when Intel PT pause / resume is allowed > Add an example of how it might work for CoreSight > > > Adrian Hunter (10): > perf/core: Add aux_pause, aux_resume, aux_start_paused > perf/x86/intel/pt: Add support for pause / resume > perf/x86/intel: Do not enable large PEBS for events with aux actions or aux sampling > perf tools: Add aux_start_paused, aux_pause and aux_resume > perf tools: Add aux-action config term > perf tools: Parse aux-action > perf tools: Add missing_features for aux_start_paused, aux_pause, aux_resume > perf intel-pt: Improve man page format > perf intel-pt: Add documentation for pause / resume > perf intel-pt: Add a test for pause / resume > > arch/x86/events/intel/core.c | 4 +- > arch/x86/events/intel/pt.c | 69 +++- > arch/x86/events/intel/pt.h | 4 + > include/linux/perf_event.h | 28 ++ > include/uapi/linux/perf_event.h | 11 +- > kernel/events/core.c | 72 +++- > kernel/events/internal.h | 1 + > tools/include/uapi/linux/perf_event.h | 11 +- > tools/perf/Documentation/perf-intel-pt.txt | 596 ++++++++++++++++++----------- > tools/perf/Documentation/perf-record.txt | 4 + > tools/perf/builtin-record.c | 4 +- > tools/perf/tests/shell/test_intel_pt.sh | 28 ++ > tools/perf/util/auxtrace.c | 67 +++- > tools/perf/util/auxtrace.h | 6 +- > tools/perf/util/evsel.c | 13 +- > tools/perf/util/evsel.h | 1 + > tools/perf/util/evsel_config.h | 1 + > tools/perf/util/parse-events.c | 10 + > tools/perf/util/parse-events.h | 1 + > tools/perf/util/parse-events.l | 1 + > tools/perf/util/perf_event_attr_fprintf.c | 3 + > tools/perf/util/pmu.c | 1 + > 22 files changed, 698 insertions(+), 238 deletions(-) > > > Regards > Adrian