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charset="iso-8859-1" X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250228_015844_175939_FC1E48B7 X-CRM114-Status: GOOD ( 18.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Marek, Am Donnerstag, 27. Februar 2025, 17:58:02 CET schrieb Marek Vasut: > The instance of the GPU populated in Freescale i.MX95 does require > release from reset by writing into a single GPUMIX block controller > GPURESET register bit 0. Implement support for this reset register. >=20 > Signed-off-by: Marek Vasut > --- > Cc: Boris Brezillon > Cc: Conor Dooley > Cc: David Airlie > Cc: Fabio Estevam > Cc: Krzysztof Kozlowski > Cc: Liviu Dudau > Cc: Maarten Lankhorst > Cc: Maxime Ripard > Cc: Pengutronix Kernel Team > Cc: Philipp Zabel > Cc: Rob Herring > Cc: Sascha Hauer > Cc: Sebastian Reichel > Cc: Shawn Guo > Cc: Simona Vetter > Cc: Steven Price > Cc: Thomas Zimmermann > Cc: devicetree@vger.kernel.org > Cc: dri-devel@lists.freedesktop.org > Cc: imx@lists.linux.dev > Cc: linux-arm-kernel@lists.infradead.org > --- > drivers/reset/reset-simple.c | 8 ++++++++ > 1 file changed, 8 insertions(+) >=20 > diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c > index 2760678398308..1415a941fd6eb 100644 > --- a/drivers/reset/reset-simple.c > +++ b/drivers/reset/reset-simple.c > @@ -133,9 +133,17 @@ static const struct reset_simple_devdata reset_simpl= e_active_low =3D { > .status_active_low =3D true, > }; > =20 > +static const struct reset_simple_devdata reset_simple_fsl_imx95_gpu_blk_= ctrl =3D { > + .reg_offset =3D 0x8, Shouldn't you add ".nr_resets =3D 1"? Otherwise this will have 8 resets (resource_size(res) * BITS_PER_BYTE). On a side note: RM says this is a write-once register. Do we consider writi= ng this register again? BTW: Would it be possible to disable it completely (until reset) by writing= 1? Best regards Alexander > + .active_low =3D true, > + .status_active_low =3D true, > +}; > + > static const struct of_device_id reset_simple_dt_ids[] =3D { > { .compatible =3D "altr,stratix10-rst-mgr", > .data =3D &reset_simple_socfpga }, > + { .compatible =3D "fsl,imx95-gpu-blk-ctrl", > + .data =3D &reset_simple_fsl_imx95_gpu_blk_ctrl }, > { .compatible =3D "st,stm32-rcc", }, > { .compatible =3D "allwinner,sun6i-a31-clock-reset", > .data =3D &reset_simple_active_low }, >=20 =2D-=20 TQ-Systems GmbH | M=FChlstra=DFe 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht M=FCnchen, HRB 105018 Gesch=E4ftsf=FChrer: Detlef Schneider, R=FCdiger Stahl, Stefan Schneider http://www.tq-group.com/