From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 6/7] DMA: sun6i: Add driver for the Allwinner A31 DMA controller
Date: Mon, 10 Mar 2014 16:34:04 +0100 [thread overview]
Message-ID: <2475487.axlvKsBQ0c@wuerfel> (raw)
In-Reply-To: <1394462512-11620-7-git-send-email-maxime.ripard@free-electrons.com>
On Monday 10 March 2014 15:41:51 Maxime Ripard wrote:
> +/*
> + * Hardware representation of the LLI
> + *
> + * The hardware will be fed the physical address of this structure,
> + * and read its content in order to start the transfer.
> + */
> +struct sun6i_dma_lli {
> + u32 cfg;
> + u32 src;
> + u32 dst;
> + u32 len;
> + u32 para;
> + u32 p_lli_next;
> + struct sun6i_dma_lli *v_lli_next;
> +} __packed;
It looks strange to have a pointer in a hardware structure, since
the pointer doesn't make sense to the device.
Also, the '__packed' attribute seems strange. Are you sure
you want to reduce the alignment from 4 bytes to 1 byte?
> +static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id)
> +{
> + struct sun6i_dma_dev *sdev = dev_id;
> + struct sun6i_vchan *vchan;
> + struct sun6i_pchan *pchan;
> + int i, j, ret = IRQ_NONE;
> + u32 status;
> +
> + for (i = 0; i < 2; i++) {
> + status = readl(sdev->base + DMA_IRQ_STAT(i));
> + if (!status)
> + continue;
> +
> + dev_dbg(sdev->slave.dev, "DMA irq status %s: 0x%x\n",
> + i ? "high" : "low", status);
> +
> + writel(status, sdev->base + DMA_IRQ_STAT(i));
> +
> + for (j = 0; (j < 8) && status; j++) {
> + if (status & DMA_IRQ_QUEUE) {
> + pchan = sdev->pchans + j;
> + vchan = pchan->vchan;
> +
> + if (vchan) {
> + unsigned long flags;
> +
> + spin_lock_irqsave(&vchan->vc.lock,
> + flags);
Interrupts are already disabled here.
> + sdc->clk = devm_clk_get(&pdev->dev, NULL);
> + if (IS_ERR(sdc->clk)) {
> + dev_err(&pdev->dev, "No clock specified\n");
> + return PTR_ERR(sdc->clk);
> + }
> +
> + mux = devm_clk_get(&pdev->dev, "ahb1_mux");
> + if (IS_ERR(mux)) {
> + dev_err(&pdev->dev, "Couldn't get AHB1 Mux\n");
> + return PTR_ERR(mux);
> + }
> +
> + pll6 = devm_clk_get(&pdev->dev, "pll6");
> + if (IS_ERR(pll6)) {
> + dev_err(&pdev->dev, "Couldn't get PLL6\n");
> + return PTR_ERR(pll6);
> + }
> +
> + ret = clk_set_parent(mux, pll6);
> + if (ret) {
> + dev_err(&pdev->dev, "Couldn't reparent AHB1 on PLL6\n");
> + return ret;
> + }
Neither "pll6" nor "ahb1_mux" are listed in the DT binding. Also, why
is it the driver's business to set the parent?
Arnd
next prev parent reply other threads:[~2014-03-10 15:34 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-10 14:41 [PATCH v4 0/7] Add support for the Allwinner A31 DMA Controller Maxime Ripard
2014-03-10 14:41 ` [PATCH v4 1/7] clk: sunxi: Remove calls to clk_put Maxime Ripard
2014-03-10 14:41 ` [PATCH v4 2/7] ARM: sunxi: Split out the various machines into separate files Maxime Ripard
2014-03-10 14:41 ` [PATCH v4 3/7] ARM: sunxi: Move the clock protection to machine hooks Maxime Ripard
2014-03-10 14:41 ` [PATCH v4 4/7] ARM: sun6i: Protect CPU clock Maxime Ripard
2014-03-10 14:41 ` [PATCH v4 5/7] ARM: sun6i: Protect SDRAM gating bit Maxime Ripard
2014-03-10 14:41 ` [PATCH v4 6/7] DMA: sun6i: Add driver for the Allwinner A31 DMA controller Maxime Ripard
2014-03-10 15:34 ` Arnd Bergmann [this message]
2014-03-10 16:51 ` Maxime Ripard
2014-03-10 17:57 ` Arnd Bergmann
2014-03-11 8:50 ` Maxime Ripard
2014-03-11 9:52 ` Shevchenko, Andriy
2014-03-11 10:08 ` Maxime Ripard
2014-03-11 10:22 ` Shevchenko, Andriy
2014-03-10 14:41 ` [PATCH v4 7/7] ARM: sun6i: dt: Add A31 DMA controller to DTSI Maxime Ripard
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