* [PATCH 0/4 v2] Miscellaneous s3c64xx fixes.
@ 2011-08-21 23:48 Tomasz Figa
2011-08-21 23:48 ` [PATCH 1/4 v2] ARM: s3c64xx: DMA: Use S3C64XX_SDMA_SEL register name instead of numeric address Tomasz Figa
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Tomasz Figa @ 2011-08-21 23:48 UTC (permalink / raw)
To: linux-arm-kernel
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 1/4 v2] ARM: s3c64xx: DMA: Use S3C64XX_SDMA_SEL register name instead of numeric address. 2011-08-21 23:48 [PATCH 0/4 v2] Miscellaneous s3c64xx fixes Tomasz Figa @ 2011-08-21 23:48 ` Tomasz Figa 2011-08-21 23:49 ` [PATCH 2/4 v2] ARM: s3c64xx: Save/restore S3C64XX_SDMA_SEL on suspend/resume Tomasz Figa ` (2 subsequent siblings) 3 siblings, 0 replies; 9+ messages in thread From: Tomasz Figa @ 2011-08-21 23:48 UTC (permalink / raw) To: linux-arm-kernel ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 2/4 v2] ARM: s3c64xx: Save/restore S3C64XX_SDMA_SEL on suspend/resume. 2011-08-21 23:48 [PATCH 0/4 v2] Miscellaneous s3c64xx fixes Tomasz Figa 2011-08-21 23:48 ` [PATCH 1/4 v2] ARM: s3c64xx: DMA: Use S3C64XX_SDMA_SEL register name instead of numeric address Tomasz Figa @ 2011-08-21 23:49 ` Tomasz Figa 2011-08-21 23:49 ` [PATCH 3/4 v2] ARM: s3c64xx: Save/restore S3C64XX_MODEM_MIFPCON on suspend/resume to preserve LCD bypass state Tomasz Figa 2011-08-21 23:50 ` [PATCH 4/4 v2] ARM: s3c64xx: Add support for synchronous clock operation Tomasz Figa 3 siblings, 0 replies; 9+ messages in thread From: Tomasz Figa @ 2011-08-21 23:49 UTC (permalink / raw) To: linux-arm-kernel ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/4 v2] ARM: s3c64xx: Save/restore S3C64XX_MODEM_MIFPCON on suspend/resume to preserve LCD bypass state. 2011-08-21 23:48 [PATCH 0/4 v2] Miscellaneous s3c64xx fixes Tomasz Figa 2011-08-21 23:48 ` [PATCH 1/4 v2] ARM: s3c64xx: DMA: Use S3C64XX_SDMA_SEL register name instead of numeric address Tomasz Figa 2011-08-21 23:49 ` [PATCH 2/4 v2] ARM: s3c64xx: Save/restore S3C64XX_SDMA_SEL on suspend/resume Tomasz Figa @ 2011-08-21 23:49 ` Tomasz Figa 2011-08-21 23:50 ` [PATCH 4/4 v2] ARM: s3c64xx: Add support for synchronous clock operation Tomasz Figa 3 siblings, 0 replies; 9+ messages in thread From: Tomasz Figa @ 2011-08-21 23:49 UTC (permalink / raw) To: linux-arm-kernel ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 4/4 v2] ARM: s3c64xx: Add support for synchronous clock operation. 2011-08-21 23:48 [PATCH 0/4 v2] Miscellaneous s3c64xx fixes Tomasz Figa ` (2 preceding siblings ...) 2011-08-21 23:49 ` [PATCH 3/4 v2] ARM: s3c64xx: Save/restore S3C64XX_MODEM_MIFPCON on suspend/resume to preserve LCD bypass state Tomasz Figa @ 2011-08-21 23:50 ` Tomasz Figa 2011-08-23 2:42 ` Kukjin Kim 3 siblings, 1 reply; 9+ messages in thread From: Tomasz Figa @ 2011-08-21 23:50 UTC (permalink / raw) To: linux-arm-kernel ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 4/4 v2] ARM: s3c64xx: Add support for synchronous clock operation. 2011-08-21 23:50 ` [PATCH 4/4 v2] ARM: s3c64xx: Add support for synchronous clock operation Tomasz Figa @ 2011-08-23 2:42 ` Kukjin Kim 2011-08-23 10:40 ` [PATCH 4/4 v3] " Tomasz Figa 0 siblings, 1 reply; 9+ messages in thread From: Kukjin Kim @ 2011-08-23 2:42 UTC (permalink / raw) To: linux-arm-kernel Tomasz Figa wrote: > > From 4ebfc49563b24eea6a689d0323bb3524b1bcbabf Mon Sep 17 00:00:00 2001 > From: Tomasz Figa <tomasz.figa@gmail.com> > Date: Fri, 19 Aug 2011 11:54:31 +0200 > Subject: [PATCH 4/4 v2] ARM: s3c64xx: Add support for synchronous clock > operation. > > Some boards based on S3C6410 use synchronous clocking, which means that > HCLKx2 > and other system clocks are generated from APLL instead of MPLL. > > This patch adds support for such boards, by calculating hclk2 depending on > the status of S3C_OTHERS_SYNCMUXSEL bit in S3C64XX_OTHERS registers. > > Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> > --- > arch/arm/mach-s3c64xx/clock.c | 8 +++++++- > arch/arm/mach-s3c64xx/include/mach/regs-sys.h | 3 ++- > 2 files changed, 9 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c > index fdfc4d5..a7dab43 100644 > --- a/arch/arm/mach-s3c64xx/clock.c > +++ b/arch/arm/mach-s3c64xx/clock.c > @@ -780,7 +780,13 @@ void __init_or_cpufreq s3c6400_setup_clocks(void) > printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n", > apll, mpll, epll); > > - hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); > + if(__raw_readl(S3C64XX_OTHERS) & S3C64XX_OTHERS_SYNCMUXSEL) > + /* Synchronous mode */ > + hclk2 = apll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); > + else > + /* Asynchronous mode */ > + hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); > + > hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK); > pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK); > > diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h b/arch/arm/mach- > s3c64xx/include/mach/regs-sys.h > index 774e0de..00c5d8b 100644 > --- a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h > +++ b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h > @@ -25,6 +25,7 @@ > > #define S3C64XX_OTHERS S3C_SYSREG(0x900) > > -#define S3C64XX_OTHERS_USBMASK (1 << 16) > +#define S3C64XX_OTHERS_USBMASK (1 << 16) Hi Tomasz, Please don't include other changes in this patch which is for supporting synchronous mode. If required, should be separated patch. As a note, others looks ok to me. I think, you need to re-submit only this one and I will apply your whole series after getting updated this one. Thanks. Best regards, Kgene. -- Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. > +#define S3C64XX_OTHERS_SYNCMUXSEL (1 << 6) > > #endif /* _PLAT_REGS_SYS_H */ > -- > 1.7.6 ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 4/4 v3] ARM: s3c64xx: Add support for synchronous clock operation. 2011-08-23 2:42 ` Kukjin Kim @ 2011-08-23 10:40 ` Tomasz Figa 2011-08-25 23:33 ` Kukjin Kim 0 siblings, 1 reply; 9+ messages in thread From: Tomasz Figa @ 2011-08-23 10:40 UTC (permalink / raw) To: linux-arm-kernel ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 4/4 v3] ARM: s3c64xx: Add support for synchronous clock operation. 2011-08-23 10:40 ` [PATCH 4/4 v3] " Tomasz Figa @ 2011-08-25 23:33 ` Kukjin Kim 0 siblings, 0 replies; 9+ messages in thread From: Kukjin Kim @ 2011-08-25 23:33 UTC (permalink / raw) To: linux-arm-kernel Tomasz Figa wrote: > > From 1518d67b93432272312a55c4602040c580f46a0c Mon Sep 17 00:00:00 2001 > From: Tomasz Figa <tomasz.figa@gmail.com> > Date: Fri, 19 Aug 2011 11:54:31 +0200 > Subject: [PATCH 4/4 v3] ARM: s3c64xx: Add support for synchronous clock > operation. > > Some boards based on S3C6410 use synchronous clocking, which means that > HCLKx2 > and other system clocks are generated from APLL instead of MPLL. > > This patch adds support for such boards, by calculating hclk2 depending on > the status of S3C_OTHERS_SYNCMUXSEL bit in S3C64XX_OTHERS regist > > Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> > --- > arch/arm/mach-s3c64xx/clock.c | 8 +++++++- > arch/arm/mach-s3c64xx/include/mach/regs-sys.h | 1 + > 2 files changed, 8 insertions(+), 1 deletions(-) > > diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c > index fdfc4d5..a7dab43 100644 > --- a/arch/arm/mach-s3c64xx/clock.c > +++ b/arch/arm/mach-s3c64xx/clock.c > @@ -780,7 +780,13 @@ void __init_or_cpufreq s3c6400_setup_clocks(void) > printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n", > apll, mpll, epll); > > - hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); > + if(__raw_readl(S3C64XX_OTHERS) & S3C64XX_OTHERS_SYNCMUXSEL) > + /* Synchronous mode */ > + hclk2 = apll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); > + else > + /* Asynchronous mode */ > + hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); > + > hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK); > pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK); > > diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h b/arch/arm/mach- > s3c64xx/include/mach/regs-sys.h > index 774e0de..b91e020 100644 > --- a/arch/arm/mach-s3c64xx/include/mach/regs-sys.h > +++ b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h > @@ -26,5 +26,6 @@ > #define S3C64XX_OTHERS S3C_SYSREG(0x900) > > #define S3C64XX_OTHERS_USBMASK (1 << 16) > +#define S3C64XX_OTHERS_SYNCMUXSEL (1 << 6) > > #endif /* _PLAT_REGS_SYS_H */ > -- > 1.7.6 OK, applied. Thanks. Best regards, Kgene. -- Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/4 v2] ARM: s3c64xx: Save/restore S3C64XX_MODEM_MIFPCON on suspend/resume to preserve LCD bypass state. @ 2011-07-21 12:57 Tomasz Figa 0 siblings, 0 replies; 9+ messages in thread From: Tomasz Figa @ 2011-07-21 12:57 UTC (permalink / raw) To: linux-arm-kernel This patch makes sure that the LCD bypass state is preserved during sleep mode. It achieves this by saving the S3C64XX_MODEM_MIFPCON register, which is not handled by any other code currently. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> --- arch/arm/mach-s3c64xx/pm.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c index b9c0536..193e5ef 100644 --- a/arch/arm/mach-s3c64xx/pm.c +++ b/arch/arm/mach-s3c64xx/pm.c @@ -28,6 +28,7 @@ #include <mach/regs-clock.h> #include <mach/regs-syscon-power.h> #include <mach/regs-gpio-memport.h> +#include <mach/regs-modem.h> #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK void s3c_pm_debug_smdkled(u32 set, u32 clear) @@ -86,6 +87,7 @@ static struct sleep_save misc_save[] = { SAVE_ITEM(S3C64XX_MEM1CONSLP), SAVE_ITEM(S3C64XX_SDMA_SEL), + SAVE_ITEM(S3C64XX_MODEM_MIFPCON), }; void s3c_pm_configure_extint(void) -- 1.7.6 ^ permalink raw reply related [flat|nested] 9+ messages in thread
end of thread, other threads:[~2011-08-25 23:33 UTC | newest] Thread overview: 9+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2011-08-21 23:48 [PATCH 0/4 v2] Miscellaneous s3c64xx fixes Tomasz Figa 2011-08-21 23:48 ` [PATCH 1/4 v2] ARM: s3c64xx: DMA: Use S3C64XX_SDMA_SEL register name instead of numeric address Tomasz Figa 2011-08-21 23:49 ` [PATCH 2/4 v2] ARM: s3c64xx: Save/restore S3C64XX_SDMA_SEL on suspend/resume Tomasz Figa 2011-08-21 23:49 ` [PATCH 3/4 v2] ARM: s3c64xx: Save/restore S3C64XX_MODEM_MIFPCON on suspend/resume to preserve LCD bypass state Tomasz Figa 2011-08-21 23:50 ` [PATCH 4/4 v2] ARM: s3c64xx: Add support for synchronous clock operation Tomasz Figa 2011-08-23 2:42 ` Kukjin Kim 2011-08-23 10:40 ` [PATCH 4/4 v3] " Tomasz Figa 2011-08-25 23:33 ` Kukjin Kim -- strict thread matches above, loose matches on Subject: below -- 2011-07-21 12:57 [PATCH 3/4 v2] ARM: s3c64xx: Save/restore S3C64XX_MODEM_MIFPCON on suspend/resume to preserve LCD bypass state Tomasz Figa
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