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Thu, 04 Aug 2022 04:17:12 -0700 (PDT) Message-ID: <258c3ed7-2247-d4c3-73be-ddcddee3a3a0@linaro.org> Date: Thu, 4 Aug 2022 13:17:10 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.12.0 Subject: Re: [PATCH v3 3/3] dt-bindings: bus: Add Freescale i.MX8qxp pixel link MSI bus binding Content-Language: en-US To: Liu Ying , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, saravanak@google.com, gregkh@linuxfoundation.org, geert+renesas@glider.be, robh@kernel.org References: <20220804061133.4110734-1-victor.liu@nxp.com> <20220804061133.4110734-4-victor.liu@nxp.com> From: Krzysztof Kozlowski In-Reply-To: <20220804061133.4110734-4-victor.liu@nxp.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220804_041720_033717_C01E1461 X-CRM114-Status: GOOD ( 13.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 04/08/2022 08:11, Liu Ying wrote: > Freescale i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. > It is used to access peripherals in i.MX8qm/qxp imaging, LVDS, MIPI > DSI and HDMI TX subsystems, like I2C controller, PWM controller, > MIPI DSI controller and Control and Status Registers (CSR) module. > > Reference simple-pm-bus bindings and add Freescale i.MX8qxp pixel > link MSI bus specific bindings. > > Signed-off-by: Liu Ying Thank you for your patch. There is something to discuss/improve. > + > +examples: > + - | > + #include > + #include > + bus@56200000 { > + compatible = "fsl,imx8qxp-display-pixel-link-msi-bus", "simple-pm-bus"; > + reg = <0x56200000 0x20000>; > + #address-cells = <1>; > + #size-cells = <1>; > + interrupt-parent = <&dc0_irqsteer>; > + interrupts = <320>; > + ranges; > + clocks = <&dc0_disp_ctrl_link_mst0_lpcg IMX_LPCG_CLK_4>, > + <&dc0_disp_ctrl_link_mst0_lpcg IMX_LPCG_CLK_4>; > + clock-names = "msi", "ahb"; > + power-domains = <&pd IMX_SC_R_DC_0>; The example should be complete, so you should have here children. Otherwise it is not a bus. Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel