[PATCH 1/4] arm64: dts: exynos5433: Add default GIC address cells

[PATCH 1/4] arm64: dts: exynos5433: Add default GIC address cells

[Krzysztof Kozlowski]

Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  exynos5433-tm2-common.dtsi:1000.2-41: Warning (interrupt_map): /soc@0/pcie@15700000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@11001000, using 0 as fallbac

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 0b9053b9b2b5..fa2029e280a5 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -937,6 +937,7 @@ reboot: syscon-reboot {
 
 		gic: interrupt-controller@11001000 {
 			compatible = "arm,gic-400";
+			#address-cells = <0>;
 			#interrupt-cells = <3>;
 			interrupt-controller;
 			reg = <0x11001000 0x1000>,
-- 
2.48.1

[PATCH 2/4] arm64: dts: google: gs101: Add default GIC address cells

[Krzysztof Kozlowski]

Add missing address-cells 0 to GIC interrupt node.  Value '0' is correct
because GIC interrupt controller does not have children.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 arch/arm64/boot/dts/exynos/google/gs101.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index c0f8c25861a9..31c99526470d 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -341,6 +341,7 @@ watchdog_cl1: watchdog@10070000 {
 
 		gic: interrupt-controller@10400000 {
 			compatible = "arm,gic-v3";
+			#address-cells = <0>;
 			#interrupt-cells = <4>;
 			interrupt-controller;
 			reg = <0x10400000 0x10000>, /* GICD */
-- 
2.48.1

[PATCH 3/4] arm64: dts: fsd: Add default GIC address cells

[Krzysztof Kozlowski]

Add missing address-cells 0 to GIC interrupt node.  Value '0' is correct
because GIC interrupt controller does not have children.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 arch/arm64/boot/dts/tesla/fsd.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi
index a5ebb3f9b18f..5b06e2667b89 100644
--- a/arch/arm64/boot/dts/tesla/fsd.dtsi
+++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
@@ -363,6 +363,7 @@ soc: soc@0 {
 
 		gic: interrupt-controller@10400000 {
 			compatible = "arm,gic-v3";
+			#address-cells = <0>;
 			#interrupt-cells = <3>;
 			interrupt-controller;
 			reg = <0x0 0x10400000 0x0 0x10000>, /* GICD */
-- 
2.48.1

[PATCH 4/4] arm64: dts: exynos2200: Add default GIC address cells

[Krzysztof Kozlowski]

Add missing address-cells 0 to GIC interrupt node.  Value '0' is correct
because GIC interrupt controller does not have children.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 arch/arm64/boot/dts/exynos/exynos2200.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos2200.dtsi b/arch/arm64/boot/dts/exynos/exynos2200.dtsi
index 6b5ac02d010f..b1fe315b40fd 100644
--- a/arch/arm64/boot/dts/exynos/exynos2200.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos2200.dtsi
@@ -273,6 +273,7 @@ gic: interrupt-controller@10200000 {
 			reg = <0x0 0x10200000 0x0 0x10000>,     /* GICD */
 			      <0x0 0x10240000 0x0 0x200000>;    /* GICR * 8 */
 
+			#address-cells = <0>;
 			#interrupt-cells = <4>;
 			interrupt-controller;
 			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
-- 
2.48.1

RE: [PATCH 3/4] arm64: dts: fsd: Add default GIC address cells

[Alim Akhtar]

Hi Krzysztof

> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: Friday, August 22, 2025 5:44 PM
> To: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>; Rob Herring
> <robh@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor
> Dooley <conor+dt@kernel.org>; Alim Akhtar <alim.akhtar@samsung.com>;
> Peter Griffin <peter.griffin@linaro.org>; André Draszik
> <andre.draszik@linaro.org>; Tudor Ambarus <tudor.ambarus@linaro.org>;
> linux-fsd@tesla.com; linux-arm-kernel@lists.infradead.org; linux-samsung-
> soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Subject: [PATCH 3/4] arm64: dts: fsd: Add default GIC address cells
> 
> Add missing address-cells 0 to GIC interrupt node.  Value '0' is correct
> because GIC interrupt controller does not have children.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>

>  arch/arm64/boot/dts/tesla/fsd.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi
> b/arch/arm64/boot/dts/tesla/fsd.dtsi
> index a5ebb3f9b18f..5b06e2667b89 100644
> --- a/arch/arm64/boot/dts/tesla/fsd.dtsi
> +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
> @@ -363,6 +363,7 @@ soc: soc@0 {
> 
>  		gic: interrupt-controller@10400000 {
>  			compatible = "arm,gic-v3";
> +			#address-cells = <0>;
>  			#interrupt-cells = <3>;
>  			interrupt-controller;
>  			reg = <0x0 0x10400000 0x0 0x10000>, /* GICD */
> --
> 2.48.1

RE: [PATCH 2/4] arm64: dts: google: gs101: Add default GIC address cells

[Alim Akhtar]

Hi Krzysztof

> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: Friday, August 22, 2025 5:44 PM
> To: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>; Rob Herring
> <robh@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor
> Dooley <conor+dt@kernel.org>; Alim Akhtar <alim.akhtar@samsung.com>;
> Peter Griffin <peter.griffin@linaro.org>; André Draszik
> <andre.draszik@linaro.org>; Tudor Ambarus <tudor.ambarus@linaro.org>;
> linux-fsd@tesla.com; linux-arm-kernel@lists.infradead.org; linux-samsung-
> soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Subject: [PATCH 2/4] arm64: dts: google: gs101: Add default GIC address cells
> 
> Add missing address-cells 0 to GIC interrupt node.  Value '0' is correct
> because GIC interrupt controller does not have children.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>

>  arch/arm64/boot/dts/exynos/google/gs101.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> index c0f8c25861a9..31c99526470d 100644
> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> @@ -341,6 +341,7 @@ watchdog_cl1: watchdog@10070000 {
> 
>  		gic: interrupt-controller@10400000 {
>  			compatible = "arm,gic-v3";
> +			#address-cells = <0>;
>  			#interrupt-cells = <4>;
>  			interrupt-controller;
>  			reg = <0x10400000 0x10000>, /* GICD */
> --
> 2.48.1

RE: [PATCH 1/4] arm64: dts: exynos5433: Add default GIC address cells

[Alim Akhtar]

Hi Krzysztof

> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: Friday, August 22, 2025 5:44 PM
> To: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>; Rob Herring
> <robh@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor
> Dooley <conor+dt@kernel.org>; Alim Akhtar <alim.akhtar@samsung.com>;
> Peter Griffin <peter.griffin@linaro.org>; André Draszik
> <andre.draszik@linaro.org>; Tudor Ambarus <tudor.ambarus@linaro.org>;
> linux-fsd@tesla.com; linux-arm-kernel@lists.infradead.org; linux-samsung-
> soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Subject: [PATCH 1/4] arm64: dts: exynos5433: Add default GIC address cells
> 
> Add missing address-cells 0 to GIC interrupt node to silence W=1
> warning:
> 
>   exynos5433-tm2-common.dtsi:1000.2-41: Warning (interrupt_map):
> /soc@0/pcie@15700000:interrupt-map:
>     Missing property '#address-cells' in node /soc@0/interrupt-
> controller@11001000, using 0 as fallbac
> 
> Value '0' is correct because:
> 1. GIC interrupt controller does not have children, 2. interrupt-map property
> (in PCI node) consists of five components and
>    the fourth component "parent unit address", which size is defined by
>    '#address-cells' of the node pointed to by the interrupt-parent
>    component, is not used (=0).
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>

>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> index 0b9053b9b2b5..fa2029e280a5 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -937,6 +937,7 @@ reboot: syscon-reboot {
> 
>  		gic: interrupt-controller@11001000 {
>  			compatible = "arm,gic-400";
> +			#address-cells = <0>;
>  			#interrupt-cells = <3>;
>  			interrupt-controller;
>  			reg = <0x11001000 0x1000>,
> --
> 2.48.1

RE: [PATCH 4/4] arm64: dts: exynos2200: Add default GIC address cells

[Alim Akhtar]

Hi Krzysztof

> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: Friday, August 22, 2025 5:44 PM
> To: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>; Rob Herring
> <robh@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor
> Dooley <conor+dt@kernel.org>; Alim Akhtar <alim.akhtar@samsung.com>;
> Peter Griffin <peter.griffin@linaro.org>; André Draszik
> <andre.draszik@linaro.org>; Tudor Ambarus <tudor.ambarus@linaro.org>;
> linux-fsd@tesla.com; linux-arm-kernel@lists.infradead.org; linux-samsung-
> soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Subject: [PATCH 4/4] arm64: dts: exynos2200: Add default GIC address cells
> 
> Add missing address-cells 0 to GIC interrupt node.  Value '0' is correct
> because GIC interrupt controller does not have children.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>

Re: (subset) [PATCH 1/4] arm64: dts: exynos5433: Add default GIC address cells

[Krzysztof Kozlowski]

On Fri, 22 Aug 2025 14:14:24 +0200, Krzysztof Kozlowski wrote:
> Add missing address-cells 0 to GIC interrupt node to silence W=1
> warning:
> 
>   exynos5433-tm2-common.dtsi:1000.2-41: Warning (interrupt_map): /soc@0/pcie@15700000:interrupt-map:
>     Missing property '#address-cells' in node /soc@0/interrupt-controller@11001000, using 0 as fallbac
> 
> Value '0' is correct because:
> 1. GIC interrupt controller does not have children,
> 2. interrupt-map property (in PCI node) consists of five components and
>    the fourth component "parent unit address", which size is defined by
>    '#address-cells' of the node pointed to by the interrupt-parent
>    component, is not used (=0).
> 
> [...]

Applied, thanks!

[1/4] arm64: dts: exynos5433: Add default GIC address cells
      https://git.kernel.org/krzk/linux/c/b3a62f6c3573e448e8b0697a622e7bba0ddf9945

Best regards,
-- 
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Re: (subset) [PATCH 2/4] arm64: dts: google: gs101: Add default GIC address cells

[Krzysztof Kozlowski]

On Fri, 22 Aug 2025 14:14:25 +0200, Krzysztof Kozlowski wrote:
> Add missing address-cells 0 to GIC interrupt node.  Value '0' is correct
> because GIC interrupt controller does not have children.
> 
> 

Applied, thanks!

[2/4] arm64: dts: google: gs101: Add default GIC address cells
      https://git.kernel.org/krzk/linux/c/a75d45adb261cbced86701d2512098044a6d310f

Best regards,
-- 
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Re: (subset) [PATCH 3/4] arm64: dts: fsd: Add default GIC address cells

[Krzysztof Kozlowski]

On Fri, 22 Aug 2025 14:14:26 +0200, Krzysztof Kozlowski wrote:
> Add missing address-cells 0 to GIC interrupt node.  Value '0' is correct
> because GIC interrupt controller does not have children.
> 
> 

Applied, thanks!

[3/4] arm64: dts: fsd: Add default GIC address cells
      https://git.kernel.org/krzk/linux/c/a874b387213bd80b1288884aeb427cb7599eb5ea

Best regards,
-- 
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>