From mboxrd@z Thu Jan 1 00:00:00 1970 From: laurent.pinchart@ideasonboard.com (Laurent Pinchart) Date: Tue, 10 Nov 2015 11:11:36 +0200 Subject: [PATCH 1/3] ARM: shmobile: r8a7793: Add DMAC devices to DT In-Reply-To: <1447139641-11480-2-git-send-email-horms+renesas@verge.net.au> References: <1447139641-11480-1-git-send-email-horms+renesas@verge.net.au> <1447139641-11480-2-git-send-email-horms+renesas@verge.net.au> Message-ID: <2661832.Y18F3NymRL@avalon> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Simon, Thank you for the patch. On Tuesday 10 November 2015 16:13:59 Simon Horman wrote: > Instantiate the two system DMA controllers in the r8a7793 device tree. > > Based on similar work for the r8a7793 by Laurent Pinchart. > > Cc: Laurent Pinchart > Signed-off-by: Simon Horman Reviewed-by: Laurent Pinchart > --- > arch/arm/boot/dts/r8a7793.dtsi | 72 +++++++++++++++++++++++++++++++++++++++ > 1 file changed, 72 insertions(+) > > diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi > index 4f6480f8845f..187a82dc7d9f 100644 > --- a/arch/arm/boot/dts/r8a7793.dtsi > +++ b/arch/arm/boot/dts/r8a7793.dtsi > @@ -128,6 +128,68 @@ > #gpio-range-cells = <3>; > }; > > + dmac0: dma-controller at e6700000 { > + compatible = "renesas,rcar-dmac"; > + reg = <0 0xe6700000 0 0x20000>; > + interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH > + 0 200 IRQ_TYPE_LEVEL_HIGH > + 0 201 IRQ_TYPE_LEVEL_HIGH > + 0 202 IRQ_TYPE_LEVEL_HIGH > + 0 203 IRQ_TYPE_LEVEL_HIGH > + 0 204 IRQ_TYPE_LEVEL_HIGH > + 0 205 IRQ_TYPE_LEVEL_HIGH > + 0 206 IRQ_TYPE_LEVEL_HIGH > + 0 207 IRQ_TYPE_LEVEL_HIGH > + 0 208 IRQ_TYPE_LEVEL_HIGH > + 0 209 IRQ_TYPE_LEVEL_HIGH > + 0 210 IRQ_TYPE_LEVEL_HIGH > + 0 211 IRQ_TYPE_LEVEL_HIGH > + 0 212 IRQ_TYPE_LEVEL_HIGH > + 0 213 IRQ_TYPE_LEVEL_HIGH > + 0 214 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "error", > + "ch0", "ch1", "ch2", "ch3", > + "ch4", "ch5", "ch6", "ch7", > + "ch8", "ch9", "ch10", "ch11", > + "ch12", "ch13", "ch14"; > + clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC0>; > + clock-names = "fck"; > + power-domains = <&cpg_clocks>; > + #dma-cells = <1>; > + dma-channels = <15>; > + }; > + > + dmac1: dma-controller at e6720000 { > + compatible = "renesas,rcar-dmac"; > + reg = <0 0xe6720000 0 0x20000>; > + interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH > + 0 216 IRQ_TYPE_LEVEL_HIGH > + 0 217 IRQ_TYPE_LEVEL_HIGH > + 0 218 IRQ_TYPE_LEVEL_HIGH > + 0 219 IRQ_TYPE_LEVEL_HIGH > + 0 308 IRQ_TYPE_LEVEL_HIGH > + 0 309 IRQ_TYPE_LEVEL_HIGH > + 0 310 IRQ_TYPE_LEVEL_HIGH > + 0 311 IRQ_TYPE_LEVEL_HIGH > + 0 312 IRQ_TYPE_LEVEL_HIGH > + 0 313 IRQ_TYPE_LEVEL_HIGH > + 0 314 IRQ_TYPE_LEVEL_HIGH > + 0 315 IRQ_TYPE_LEVEL_HIGH > + 0 316 IRQ_TYPE_LEVEL_HIGH > + 0 317 IRQ_TYPE_LEVEL_HIGH > + 0 318 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "error", > + "ch0", "ch1", "ch2", "ch3", > + "ch4", "ch5", "ch6", "ch7", > + "ch8", "ch9", "ch10", "ch11", > + "ch12", "ch13", "ch14"; > + clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC1>; > + clock-names = "fck"; > + power-domains = <&cpg_clocks>; > + #dma-cells = <1>; > + dma-channels = <15>; > + }; > + > scif0: serial at e6e60000 { > compatible = "renesas,scif-r8a7793", "renesas,scif"; > reg = <0 0xe6e60000 0 64>; > @@ -313,6 +375,16 @@ > "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1", > "vsp1-du0", "vsps"; > }; > + mstp2_clks: mstp2_clks at e6150138 { > + compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp- clocks"; > + reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; > + clocks = <&zs_clk>, <&zs_clk>; > + #clock-cells = <1>; > + clock-indices = < > + R8A7793_CLK_SYS_DMAC1 R8A7793_CLK_SYS_DMAC0 > + >; > + clock-output-names = "sys-dmac1", "sys-dmac0"; > + }; > mstp3_clks: mstp3_clks at e615013c { > compatible = "renesas,r8a7793-mstp-clocks", > "renesas,cpg-mstp-clocks"; -- Regards, Laurent Pinchart