[PATCH V2 0/2 RESEND] Add DTS for NanoPi R2S Plus

[PATCH V2 0/2 RESEND] Add DTS for NanoPi R2S Plus

[Sergey Bostandzhyan]

Hi,

as requested, I am resending the patch series, now with hopefully all
relevant addresses on To/Cc.

I noticed, that a DTS for the R2S Plus is not yet available, while the
R2S is already there. The only difference is, that the Plus version has an
eMMC, so we can reuse the R2S definitions and only add an eMMC block, which
I copied from the DTS in the friendlyarm/uboot-rockchip repo.

I applied the same DTS changes to u-boot and tested u-boot 2024.04 with
kernel 6.6.35 on an R2S Plus which I have here and the eMMC became visible
and usable.

Kind regards,
Sergey


Sergey Bostandzhyan (2):
  arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus
  dt-bindings: arm: rockchip: Add NanoPi R2S Plus

 .../devicetree/bindings/arm/rockchip.yaml     |  1 +
 arch/arm64/boot/dts/rockchip/Makefile         |  1 +
 .../dts/rockchip/rk3328-nanopi-r2s-plus.dts   | 31 +++++++++++++++++++
 3 files changed, 33 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts

-- 
2.20.1

[PATCH V2 1/2 RESEND] arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus

[Sergey Bostandzhyan]

The R2S Plus is basically an R2S with additional eMMC.

The eMMC configuration for the DTS has been extracted and copied from
rk3328-nanopi-r2.dts, v2017.09 branch from the friendlyarm/uboot-rockchip
repository.

Signed-off-by: Sergey Bostandzhyan <jin@mediatomb.cc>
---
 arch/arm64/boot/dts/rockchip/Makefile         |  1 +
 .../dts/rockchip/rk3328-nanopi-r2s-plus.dts   | 31 +++++++++++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index fda1b980eb4b..36258dc8dafd 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-plus.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
new file mode 100644
index 000000000000..7b83090a2145
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include "rk3328-nanopi-r2s.dts"
+
+/ {
+	model = "FriendlyElec NanoPi R2S Plus";
+	compatible = "friendlyarm,nanopi-r2s-plus", "rockchip,rk3328";
+
+	aliases {
+		mmc1 = &emmc;
+	};
+};
+
+&emmc {
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+	status = "okay";
+};
-- 
2.20.1

[PATCH V2 2/2 RESEND] dt-bindings: arm: rockchip: Add NanoPi R2S Plus

[Sergey Bostandzhyan]

Add the NanoPi R2S Plus variant, which is an R2S with eMMC.

Signed-off-by: Sergey Bostandzhyan <jin@mediatomb.cc>
---
 Documentation/devicetree/bindings/arm/rockchip.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 1ef09fbfdfaf..e3121d4eba18 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -216,6 +216,7 @@ properties:
               - friendlyarm,nanopi-r2c
               - friendlyarm,nanopi-r2c-plus
               - friendlyarm,nanopi-r2s
+              - friendlyarm,nanopi-r2s-plus
           - const: rockchip,rk3328
 
       - description: FriendlyElec NanoPi4 series boards
-- 
2.20.1

Re: [PATCH V2 0/2 RESEND] Add DTS for NanoPi R2S Plus

[Heiko Stübner]

Hi Sergey,

Am Donnerstag, 1. August 2024, 19:57:34 CEST schrieb Sergey Bostandzhyan:
> Hi,
> 
> as requested, I am resending the patch series, now with hopefully all
> relevant addresses on To/Cc.
> 
> I noticed, that a DTS for the R2S Plus is not yet available, while the
> R2S is already there. The only difference is, that the Plus version has an
> eMMC, so we can reuse the R2S definitions and only add an eMMC block, which
> I copied from the DTS in the friendlyarm/uboot-rockchip repo.
> 
> I applied the same DTS changes to u-boot and tested u-boot 2024.04 with
> kernel 6.6.35 on an R2S Plus which I have here and the eMMC became visible
> and usable.

general remark, please don't send new versions as threaded replies to old
versions. The normal case for git-send-email is to create a new thread
and this continuing inside the old thread confues tooling.

And it's hard to follow too.

Though hopefully the binding might still get an Ack from the dt-maintainers
so I guess don't resend just now :-)


Thanks
Heiko

Re: [PATCH V2 0/2 RESEND] Add DTS for NanoPi R2S Plus

[Bjoern A. Zeeb]

On Thu, 1 Aug 2024, Sergey Bostandzhyan wrote:

> Hi,
>
> as requested, I am resending the patch series, now with hopefully all
> relevant addresses on To/Cc.
>
> I noticed, that a DTS for the R2S Plus is not yet available, while the
> R2S is already there. The only difference is, that the Plus version has an
> eMMC, so we can reuse the R2S definitions and only add an eMMC block, which
> I copied from the DTS in the friendlyarm/uboot-rockchip repo.

The original has a
 	// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

please don't lose the OR MIT as other projects outside Linux do use the
same dts files;  and the original r2s file also preserved it.


-- 
Bjoern A. Zeeb                                                     r15:7

Re: [PATCH V2 0/2 RESEND] Add DTS for NanoPi R2S Plus

[Sergey 'Jin' Bostandzhyan]

Hi,

On Fri, Aug 02, 2024 at 09:46:40AM +0000, Bjoern A. Zeeb wrote:
> >I noticed, that a DTS for the R2S Plus is not yet available, while the
> >R2S is already there. The only difference is, that the Plus version has an
> >eMMC, so we can reuse the R2S definitions and only add an eMMC block, which
> >I copied from the DTS in the friendlyarm/uboot-rockchip repo.
> 
> The original has a
> 	// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> 
> please don't lose the OR MIT as other projects outside Linux do use the
> same dts files;  and the original r2s file also preserved it.

Uhm... I am confused now, I copy-pasted the emmc block from this file:
https://github.com/friendlyarm/uboot-rockchip/blob/nanopi4-v2017.09/arch/arm/dts/rk3328-nanopi-r2.dts#L7

The header does not have the "OR MIT" in there, it's just
"SPDX-License-Identifier:     GPL-2.0+" which is what I also copied
over, together with the (c) part.

The source which I was using is described in the commit message:

The eMMC configuration for the DTS has been extracted and copied from
rk3328-nanopi-r2.dts, v2017.09 branch from the friendlyarm/uboot-rockchip 
repository.

Maybe you looked at a different branch? Shall I still add the "OR
MIT" or leave it as in the original file which I copied it from?

Kind regards,
Sergey

Re: [PATCH V2 1/2 RESEND] arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus

[Daniel Golle]

On Thu, Aug 01, 2024 at 05:57:35PM +0000, Sergey Bostandzhyan wrote:
> The R2S Plus is basically an R2S with additional eMMC.
> 
> The eMMC configuration for the DTS has been extracted and copied from
> rk3328-nanopi-r2.dts, v2017.09 branch from the friendlyarm/uboot-rockchip
> repository.
> 
> Signed-off-by: Sergey Bostandzhyan <jin@mediatomb.cc>
> ---
>  arch/arm64/boot/dts/rockchip/Makefile         |  1 +
>  .../dts/rockchip/rk3328-nanopi-r2s-plus.dts   | 31 +++++++++++++++++++
>  2 files changed, 32 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> 
> diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> index fda1b980eb4b..36258dc8dafd 100644
> --- a/arch/arm64/boot/dts/rockchip/Makefile
> +++ b/arch/arm64/boot/dts/rockchip/Makefile
> @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-plus.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> new file mode 100644
> index 000000000000..7b83090a2145
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> @@ -0,0 +1,31 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2018 FriendlyElec Computer Tech. Co., Ltd.
> + * (http://www.friendlyarm.com)
> + *
> + * (C) Copyright 2016 Rockchip Electronics Co., Ltd
> + */
> +
> +/dts-v1/;
> +#include "rk3328-nanopi-r2s.dts"
> +
> +/ {
> +	model = "FriendlyElec NanoPi R2S Plus";
> +	compatible = "friendlyarm,nanopi-r2s-plus", "rockchip,rk3328";
> +
> +	aliases {
> +		mmc1 = &emmc;
> +	};
> +};
> +
> +&emmc {
> +	bus-width = <8>;
> +	cap-mmc-highspeed;
> +	supports-emmc;
> +	disable-wp;
> +	non-removable;
> +	num-slots = <1>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;

I think it's worth adding

	mmc-hs200-1_8v;


I've tried getting the best speed possible and while HS400 with and
without enhanced strobe did NOT work, hs200 works just fine.
[    0.459863] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
[    0.460884] mmc_host mmc1: Bus speed (slot 0) = 150000000Hz (slot req 150000000Hz, actual 150000000HZ div = 0)
...
[    0.728220] dwmmc_rockchip ff520000.mmc: Successfully tuned phase to 194
[    0.728940] mmc1: new HS200 MMC card at address 0001
[    0.730774] mmcblk1: mmc1:0001 A3A551 28.9 GiB
[    0.733262]  mmcblk1: p1 p2
[    0.734562] mmcblk1boot0: mmc1:0001 A3A551 4.00 MiB
[    0.736818] mmcblk1boot1: mmc1:0001 A3A551 4.00 MiB
[    0.738503] mmcblk1rpmb: mmc1:0001 A3A551 16.0 MiB, chardev (245:0)

root@OpenWrt:/# hdparm -t /dev/mmcblk1

/dev/mmcblk1:
 Timing buffered disk reads: 342 MB in  3.00 seconds = 113.81 MB/sec


Without 'mmc-hs200-1_8v' property in DT the eMMC is detected as
[    0.440465] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
[    0.442032] mmc1: new high speed MMC card at address 0001
[    0.444261] mmcblk1: mmc1:0001 A3A551 28.9 GiB
[    0.447388]  mmcblk1: p1 p2
[    0.448744] mmcblk1boot0: mmc1:0001 A3A551 4.00 MiB
[    0.451065] mmcblk1boot1: mmc1:0001 A3A551 4.00 MiB
[    0.452871] mmcblk1rpmb: mmc1:0001 A3A551 16.0 MiB, chardev (245:0)


root@OpenWrt:/# hdparm -t /dev/mmcblk1

/dev/mmcblk1:
 Timing buffered disk reads: 134 MB in  3.03 seconds =  44.18 MB/sec


> +	status = "okay";
> +};

I'm right now trying to get SDIO RTL8822CS working, so far I'm out of luck,
but it can be added later once we got it working.

Re: [PATCH V2 1/2 RESEND] arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus

[Sergey 'Jin' Bostandzhyan]

Daniel,

On Sun, Aug 04, 2024 at 01:27:50AM +0100, Daniel Golle wrote:
> On Thu, Aug 01, 2024 at 05:57:35PM +0000, Sergey Bostandzhyan wrote:
> > The R2S Plus is basically an R2S with additional eMMC.
> > 
> > The eMMC configuration for the DTS has been extracted and copied from
> > rk3328-nanopi-r2.dts, v2017.09 branch from the friendlyarm/uboot-rockchip
> > repository.
> > 
> > Signed-off-by: Sergey Bostandzhyan <jin@mediatomb.cc>
> > ---
> >  arch/arm64/boot/dts/rockchip/Makefile         |  1 +
> >  .../dts/rockchip/rk3328-nanopi-r2s-plus.dts   | 31 +++++++++++++++++++
> >  2 files changed, 32 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > 
> > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> > index fda1b980eb4b..36258dc8dafd 100644
> > --- a/arch/arm64/boot/dts/rockchip/Makefile
> > +++ b/arch/arm64/boot/dts/rockchip/Makefile
> > @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
> >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
> >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus.dtb
> >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
> > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-plus.dtb
> >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
> >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb
> >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
> > diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > new file mode 100644
> > index 000000000000..7b83090a2145
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > @@ -0,0 +1,31 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * (C) Copyright 2018 FriendlyElec Computer Tech. Co., Ltd.
> > + * (http://www.friendlyarm.com)
> > + *
> > + * (C) Copyright 2016 Rockchip Electronics Co., Ltd
> > + */
> > +
> > +/dts-v1/;
> > +#include "rk3328-nanopi-r2s.dts"
> > +
> > +/ {
> > +	model = "FriendlyElec NanoPi R2S Plus";
> > +	compatible = "friendlyarm,nanopi-r2s-plus", "rockchip,rk3328";
> > +
> > +	aliases {
> > +		mmc1 = &emmc;
> > +	};
> > +};
> > +
> > +&emmc {
> > +	bus-width = <8>;
> > +	cap-mmc-highspeed;
> > +	supports-emmc;
> > +	disable-wp;
> > +	non-removable;
> > +	num-slots = <1>;
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
> 
> I think it's worth adding
> 
> 	mmc-hs200-1_8v;
> 
> 
> I've tried getting the best speed possible and while HS400 with and
> without enhanced strobe did NOT work, hs200 works just fine.
> [    0.459863] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
> [    0.460884] mmc_host mmc1: Bus speed (slot 0) = 150000000Hz (slot req 150000000Hz, actual 150000000HZ div = 0)
> ...
> [    0.728220] dwmmc_rockchip ff520000.mmc: Successfully tuned phase to 194
> [    0.728940] mmc1: new HS200 MMC card at address 0001
> [    0.730774] mmcblk1: mmc1:0001 A3A551 28.9 GiB
> [    0.733262]  mmcblk1: p1 p2
> [    0.734562] mmcblk1boot0: mmc1:0001 A3A551 4.00 MiB
> [    0.736818] mmcblk1boot1: mmc1:0001 A3A551 4.00 MiB
> [    0.738503] mmcblk1rpmb: mmc1:0001 A3A551 16.0 MiB, chardev (245:0)
> 
> root@OpenWrt:/# hdparm -t /dev/mmcblk1
> 
> /dev/mmcblk1:
>  Timing buffered disk reads: 342 MB in  3.00 seconds = 113.81 MB/sec
> 
> 
> Without 'mmc-hs200-1_8v' property in DT the eMMC is detected as
> [    0.440465] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
> [    0.442032] mmc1: new high speed MMC card at address 0001
> [    0.444261] mmcblk1: mmc1:0001 A3A551 28.9 GiB
> [    0.447388]  mmcblk1: p1 p2
> [    0.448744] mmcblk1boot0: mmc1:0001 A3A551 4.00 MiB
> [    0.451065] mmcblk1boot1: mmc1:0001 A3A551 4.00 MiB
> [    0.452871] mmcblk1rpmb: mmc1:0001 A3A551 16.0 MiB, chardev (245:0)
> 
> 
> root@OpenWrt:/# hdparm -t /dev/mmcblk1
> 
> /dev/mmcblk1:
>  Timing buffered disk reads: 134 MB in  3.03 seconds =  44.18 MB/sec
> 
> 
> > +	status = "okay";
> > +};
> 
> I'm right now trying to get SDIO RTL8822CS working, so far I'm out of luck,
> but it can be added later once we got it working.

would you be interested in taking over my attempted patches? Thing is,
that I am a userspace guy who only copy-pasted some entries from
FriendlyElec and things happened to work, but I really have no clue what I am
doing when it comes to hardware and DTS. I see that some changes were suggested, 
not only by you above, but also by others earlier and I have little
understanding of where I should be inserting what and how.

At this point I think it would make more sense if someone who actually
understands what they are doing would continue to tune the DTS :)

So it'd be great if either you or anyone else would be willing to take
over?

Kind regards,
Sergey

Re: [PATCH V2 0/2 RESEND] Add DTS for NanoPi R2S Plus

[Rob Herring (Arm)]

On Thu, 01 Aug 2024 17:57:34 +0000, Sergey Bostandzhyan wrote:
> Hi,
> 
> as requested, I am resending the patch series, now with hopefully all
> relevant addresses on To/Cc.
> 
> I noticed, that a DTS for the R2S Plus is not yet available, while the
> R2S is already there. The only difference is, that the Plus version has an
> eMMC, so we can reuse the R2S definitions and only add an eMMC block, which
> I copied from the DTS in the friendlyarm/uboot-rockchip repo.
> 
> I applied the same DTS changes to u-boot and tested u-boot 2024.04 with
> kernel 6.6.35 on an R2S Plus which I have here and the eMMC became visible
> and usable.
> 
> Kind regards,
> Sergey
> 
> 
> Sergey Bostandzhyan (2):
>   arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus
>   dt-bindings: arm: rockchip: Add NanoPi R2S Plus
> 
>  .../devicetree/bindings/arm/rockchip.yaml     |  1 +
>  arch/arm64/boot/dts/rockchip/Makefile         |  1 +
>  .../dts/rockchip/rk3328-nanopi-r2s-plus.dts   | 31 +++++++++++++++++++
>  3 files changed, 33 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> 
> --
> 2.20.1
> 
> 
> 


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

  pip3 install dtschema --upgrade


New warnings running 'make CHECK_DTBS=y rockchip/rk3328-nanopi-r2s-plus.dtb' for 20240801175736.16591-1-jin@mediatomb.cc:

arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dtb: hdmi@ff3c0000: interrupts: [[0, 35, 4], [0, 71, 4]] is too long
	from schema $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dtb: /phy@ff430000: failed to match any schema with compatible: ['rockchip,rk3328-hdmi-phy']
arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dtb: /clock-controller@ff440000: failed to match any schema with compatible: ['rockchip,rk3328-cru', 'rockchip,cru', 'syscon']
arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dtb: /clock-controller@ff440000: failed to match any schema with compatible: ['rockchip,rk3328-cru', 'rockchip,cru', 'syscon']
arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dtb: mmc@ff520000: Unevaluated properties are not allowed ('num-slots', 'supports-emmc' were unexpected)
	from schema $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#

Re: [PATCH V2 2/2 RESEND] dt-bindings: arm: rockchip: Add NanoPi R2S Plus

[Rob Herring (Arm)]

On Thu, 01 Aug 2024 17:57:36 +0000, Sergey Bostandzhyan wrote:
> Add the NanoPi R2S Plus variant, which is an R2S with eMMC.
> 
> Signed-off-by: Sergey Bostandzhyan <jin@mediatomb.cc>
> ---
>  Documentation/devicetree/bindings/arm/rockchip.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring (Arm) <robh@kernel.org>

Re: [PATCH V2 1/2 RESEND] arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus

[Heiko Stübner]

Hi,

Am Montag, 5. August 2024, 10:59:35 CEST schrieb Sergey 'Jin' Bostandzhyan:
> On Sun, Aug 04, 2024 at 01:27:50AM +0100, Daniel Golle wrote:
> > On Thu, Aug 01, 2024 at 05:57:35PM +0000, Sergey Bostandzhyan wrote:
> > > The R2S Plus is basically an R2S with additional eMMC.
> > > 
> > > The eMMC configuration for the DTS has been extracted and copied from
> > > rk3328-nanopi-r2.dts, v2017.09 branch from the friendlyarm/uboot-rockchip
> > > repository.
> > > 
> > > Signed-off-by: Sergey Bostandzhyan <jin@mediatomb.cc>
> > > ---
> > >  arch/arm64/boot/dts/rockchip/Makefile         |  1 +
> > >  .../dts/rockchip/rk3328-nanopi-r2s-plus.dts   | 31 +++++++++++++++++++
> > >  2 files changed, 32 insertions(+)
> > >  create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > > 
> > > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> > > index fda1b980eb4b..36258dc8dafd 100644
> > > --- a/arch/arm64/boot/dts/rockchip/Makefile
> > > +++ b/arch/arm64/boot/dts/rockchip/Makefile
> > > @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
> > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
> > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus.dtb
> > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
> > > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-plus.dtb
> > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
> > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb
> > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
> > > diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > > new file mode 100644
> > > index 000000000000..7b83090a2145
> > > --- /dev/null
> > > +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > > @@ -0,0 +1,31 @@
> > > +// SPDX-License-Identifier: GPL-2.0+
> > > +/*
> > > + * (C) Copyright 2018 FriendlyElec Computer Tech. Co., Ltd.
> > > + * (http://www.friendlyarm.com)
> > > + *
> > > + * (C) Copyright 2016 Rockchip Electronics Co., Ltd
> > > + */
> > > +
> > > +/dts-v1/;
> > > +#include "rk3328-nanopi-r2s.dts"
> > > +
> > > +/ {
> > > +	model = "FriendlyElec NanoPi R2S Plus";
> > > +	compatible = "friendlyarm,nanopi-r2s-plus", "rockchip,rk3328";
> > > +
> > > +	aliases {
> > > +		mmc1 = &emmc;
> > > +	};
> > > +};
> > > +
> > > +&emmc {
> > > +	bus-width = <8>;
> > > +	cap-mmc-highspeed;
> > > +	supports-emmc;
> > > +	disable-wp;
> > > +	non-removable;
> > > +	num-slots = <1>;
> > > +	pinctrl-names = "default";
> > > +	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
> > 
> > I think it's worth adding
> > 
> > 	mmc-hs200-1_8v;
> > 
> > 
> > I've tried getting the best speed possible and while HS400 with and
> > without enhanced strobe did NOT work, hs200 works just fine.
> > [    0.459863] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
> > [    0.460884] mmc_host mmc1: Bus speed (slot 0) = 150000000Hz (slot req 150000000Hz, actual 150000000HZ div = 0)
> > ...
> > [    0.728220] dwmmc_rockchip ff520000.mmc: Successfully tuned phase to 194
> > [    0.728940] mmc1: new HS200 MMC card at address 0001
> > [    0.730774] mmcblk1: mmc1:0001 A3A551 28.9 GiB
> > [    0.733262]  mmcblk1: p1 p2
> > [    0.734562] mmcblk1boot0: mmc1:0001 A3A551 4.00 MiB
> > [    0.736818] mmcblk1boot1: mmc1:0001 A3A551 4.00 MiB
> > [    0.738503] mmcblk1rpmb: mmc1:0001 A3A551 16.0 MiB, chardev (245:0)
> > 
> > root@OpenWrt:/# hdparm -t /dev/mmcblk1
> > 
> > /dev/mmcblk1:
> >  Timing buffered disk reads: 342 MB in  3.00 seconds = 113.81 MB/sec
> > 
> > 
> > Without 'mmc-hs200-1_8v' property in DT the eMMC is detected as
> > [    0.440465] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
> > [    0.442032] mmc1: new high speed MMC card at address 0001
> > [    0.444261] mmcblk1: mmc1:0001 A3A551 28.9 GiB
> > [    0.447388]  mmcblk1: p1 p2
> > [    0.448744] mmcblk1boot0: mmc1:0001 A3A551 4.00 MiB
> > [    0.451065] mmcblk1boot1: mmc1:0001 A3A551 4.00 MiB
> > [    0.452871] mmcblk1rpmb: mmc1:0001 A3A551 16.0 MiB, chardev (245:0)
> > 
> > 
> > root@OpenWrt:/# hdparm -t /dev/mmcblk1
> > 
> > /dev/mmcblk1:
> >  Timing buffered disk reads: 134 MB in  3.03 seconds =  44.18 MB/sec
> > 
> > 
> > > +	status = "okay";
> > > +};
> > 
> > I'm right now trying to get SDIO RTL8822CS working, so far I'm out of luck,
> > but it can be added later once we got it working.
> 
> would you be interested in taking over my attempted patches? Thing is,
> that I am a userspace guy who only copy-pasted some entries from
> FriendlyElec and things happened to work, but I really have no clue what I am
> doing when it comes to hardware and DTS. I see that some changes were suggested, 
> not only by you above, but also by others earlier and I have little
> understanding of where I should be inserting what and how.
> 
> At this point I think it would make more sense if someone who actually
> understands what they are doing would continue to tune the DTS :)
> 
> So it'd be great if either you or anyone else would be willing to take
> over?

Though, a board devicetree is a nice way to get "your feet wet" in the
kernel :-) and for a lot of people scratching ones own itches gets them
started.

The devicetree is easy enough, also looks correct and you even got the
binding change correct - and you're the person with the actual board :-) .

Could you possibly test if the   mmc-hs200-1_8v; property works for you?


Thanks a lot
Heiko

Re: [PATCH V2 1/2 RESEND] arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus

[Sergey 'Jin' Bostandzhyan]

Hi,

On Sat, Aug 10, 2024 at 09:11:56PM +0200, Heiko Stübner wrote:
> Am Montag, 5. August 2024, 10:59:35 CEST schrieb Sergey 'Jin' Bostandzhyan:
> > On Sun, Aug 04, 2024 at 01:27:50AM +0100, Daniel Golle wrote:
> > > On Thu, Aug 01, 2024 at 05:57:35PM +0000, Sergey Bostandzhyan wrote:
> > > > The R2S Plus is basically an R2S with additional eMMC.
> > > > 
> > > > The eMMC configuration for the DTS has been extracted and copied from
> > > > rk3328-nanopi-r2.dts, v2017.09 branch from the friendlyarm/uboot-rockchip
> > > > repository.
> > > > 
> > > > Signed-off-by: Sergey Bostandzhyan <jin@mediatomb.cc>
> > > > ---
> > > >  arch/arm64/boot/dts/rockchip/Makefile         |  1 +
> > > >  .../dts/rockchip/rk3328-nanopi-r2s-plus.dts   | 31 +++++++++++++++++++
> > > >  2 files changed, 32 insertions(+)
> > > >  create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > > > 
> > > > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> > > > index fda1b980eb4b..36258dc8dafd 100644
> > > > --- a/arch/arm64/boot/dts/rockchip/Makefile
> > > > +++ b/arch/arm64/boot/dts/rockchip/Makefile
> > > > @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
> > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
> > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus.dtb
> > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
> > > > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-plus.dtb
> > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
> > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb
> > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
> > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > > > new file mode 100644
> > > > index 000000000000..7b83090a2145
> > > > --- /dev/null
> > > > +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > > > @@ -0,0 +1,31 @@
> > > > +// SPDX-License-Identifier: GPL-2.0+
> > > > +/*
> > > > + * (C) Copyright 2018 FriendlyElec Computer Tech. Co., Ltd.
> > > > + * (http://www.friendlyarm.com)
> > > > + *
> > > > + * (C) Copyright 2016 Rockchip Electronics Co., Ltd
> > > > + */
> > > > +
> > > > +/dts-v1/;
> > > > +#include "rk3328-nanopi-r2s.dts"
> > > > +
> > > > +/ {
> > > > +	model = "FriendlyElec NanoPi R2S Plus";
> > > > +	compatible = "friendlyarm,nanopi-r2s-plus", "rockchip,rk3328";
> > > > +
> > > > +	aliases {
> > > > +		mmc1 = &emmc;
> > > > +	};
> > > > +};
> > > > +
> > > > +&emmc {
> > > > +	bus-width = <8>;
> > > > +	cap-mmc-highspeed;
> > > > +	supports-emmc;
> > > > +	disable-wp;
> > > > +	non-removable;
> > > > +	num-slots = <1>;
> > > > +	pinctrl-names = "default";
> > > > +	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
> > > 
> > > I think it's worth adding
> > > 
> > > 	mmc-hs200-1_8v;
> > > 
> > > 
> > > I've tried getting the best speed possible and while HS400 with and
> > > without enhanced strobe did NOT work, hs200 works just fine.
> > > [    0.459863] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
> > > [    0.460884] mmc_host mmc1: Bus speed (slot 0) = 150000000Hz (slot req 150000000Hz, actual 150000000HZ div = 0)
> > > ...
> > > [    0.728220] dwmmc_rockchip ff520000.mmc: Successfully tuned phase to 194
> > > [    0.728940] mmc1: new HS200 MMC card at address 0001
> > > [    0.730774] mmcblk1: mmc1:0001 A3A551 28.9 GiB
> > > [    0.733262]  mmcblk1: p1 p2
> > > [    0.734562] mmcblk1boot0: mmc1:0001 A3A551 4.00 MiB
> > > [    0.736818] mmcblk1boot1: mmc1:0001 A3A551 4.00 MiB
> > > [    0.738503] mmcblk1rpmb: mmc1:0001 A3A551 16.0 MiB, chardev (245:0)
> > > 
> > > root@OpenWrt:/# hdparm -t /dev/mmcblk1
> > > 
> > > /dev/mmcblk1:
> > >  Timing buffered disk reads: 342 MB in  3.00 seconds = 113.81 MB/sec
> > > 
> > > 
> > > Without 'mmc-hs200-1_8v' property in DT the eMMC is detected as
> > > [    0.440465] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
> > > [    0.442032] mmc1: new high speed MMC card at address 0001
> > > [    0.444261] mmcblk1: mmc1:0001 A3A551 28.9 GiB
> > > [    0.447388]  mmcblk1: p1 p2
> > > [    0.448744] mmcblk1boot0: mmc1:0001 A3A551 4.00 MiB
> > > [    0.451065] mmcblk1boot1: mmc1:0001 A3A551 4.00 MiB
> > > [    0.452871] mmcblk1rpmb: mmc1:0001 A3A551 16.0 MiB, chardev (245:0)
> > > 
> > > 
> > > root@OpenWrt:/# hdparm -t /dev/mmcblk1
> > > 
> > > /dev/mmcblk1:
> > >  Timing buffered disk reads: 134 MB in  3.03 seconds =  44.18 MB/sec
> > > 
> > > 
> > > > +	status = "okay";
> > > > +};
> > > 
> > > I'm right now trying to get SDIO RTL8822CS working, so far I'm out of luck,
> > > but it can be added later once we got it working.
> > 
> > would you be interested in taking over my attempted patches? Thing is,
> > that I am a userspace guy who only copy-pasted some entries from
> > FriendlyElec and things happened to work, but I really have no clue what I am
> > doing when it comes to hardware and DTS. I see that some changes were suggested, 
> > not only by you above, but also by others earlier and I have little
> > understanding of where I should be inserting what and how.
> > 
> > At this point I think it would make more sense if someone who actually
> > understands what they are doing would continue to tune the DTS :)
> > 
> > So it'd be great if either you or anyone else would be willing to take
> > over?
> 
> Though, a board devicetree is a nice way to get "your feet wet" in the
> kernel :-) and for a lot of people scratching ones own itches gets them
> started.

While this may very well be true, my main issue is not the DT syntax,
but the lack of understanding of the underlying hardware and also a lack of
enthusiasm to dive into the hardware topics - I prefer to stay in
userspace where the kernel provides a very nice abstraction to all those 
details ;)

> The devicetree is easy enough, also looks correct and you even got the
> binding change correct - and you're the person with the actual board :-) .
> 
> Could you possibly test if the   mmc-hs200-1_8v; property works for you?

It does, I get pretty much the same results as Daniel:

root@nanopi-r2s-plus:~# hdparm -t /dev/mmcblk1
/dev/mmcblk1:
 Timing buffered disk reads: 134 MB in  3.04 seconds =  44.13 MB/sec

With mmc-hs200-1_8v:

root@nanopi-r2s-plus:~# hdparm -t /dev/mmcblk1
 /dev/mmcblk1:
  Timing buffered disk reads: 340 MB in  3.01 seconds = 113.08 MB/sec

Should I add a commit on top with this change and submit a v3 patchset?

On Thu, Aug 01, 2024 at 11:22:27PM +0200, Heiko Stübner wrote:
> general remark, please don't send new versions as threaded replies to
> old
> versions. The normal case for git-send-email is to create a new thread
> and this continuing inside the old thread confues tooling.

In case you tell me to go ahead with a v3 set, should it be in this
thread or not? I understood RESEND's should be new, but updates should
stay in the thread, right?

Sorry, I actually did read the guides, but seems misunderstood what I should
be doing as I inserted the in-reply-to header in my last RESEND.

Kind regards,
Sergey

Re: [PATCH V2 1/2 RESEND] arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus

[Diederik de Haas]

[-- Attachment #1: Type: text/plain, Size: 296 bytes --]

On Wed Aug 14, 2024 at 1:21 PM CEST, Sergey 'Jin' Bostandzhyan wrote:
> In case you tell me to go ahead with a v3 set, should it be in this
> thread or not? I understood RESEND's should be new, but updates should
> stay in the thread, right?

No, a new series should be its own thread too.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH V2 1/2 RESEND] arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus

[Diederik de Haas]

[-- Attachment #1: Type: text/plain, Size: 483 bytes --]

On Wed Aug 14, 2024 at 1:30 PM CEST, Diederik de Haas wrote:
> On Wed Aug 14, 2024 at 1:21 PM CEST, Sergey 'Jin' Bostandzhyan wrote:
> > In case you tell me to go ahead with a v3 set, should it be in this
> > thread or not? I understood RESEND's should be new, but updates should
> > stay in the thread, right?
>
> No, a new series should be its own thread too.

More correctly and hopefully more clearly:

No, a new patch version (series) should be its own thread too.


[-- Attachment #2: signature.asc --]
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Re: [PATCH V2 1/2 RESEND] arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus

[Heiko Stübner]

Am Mittwoch, 14. August 2024, 13:21:38 CEST schrieb Sergey 'Jin' Bostandzhyan:
> Hi,
> 
> On Sat, Aug 10, 2024 at 09:11:56PM +0200, Heiko Stübner wrote:
> > Am Montag, 5. August 2024, 10:59:35 CEST schrieb Sergey 'Jin' Bostandzhyan:
> > > On Sun, Aug 04, 2024 at 01:27:50AM +0100, Daniel Golle wrote:
> > > > On Thu, Aug 01, 2024 at 05:57:35PM +0000, Sergey Bostandzhyan wrote:
> > > > > The R2S Plus is basically an R2S with additional eMMC.
> > > > > 
> > > > > The eMMC configuration for the DTS has been extracted and copied from
> > > > > rk3328-nanopi-r2.dts, v2017.09 branch from the friendlyarm/uboot-rockchip
> > > > > repository.
> > > > > 
> > > > > Signed-off-by: Sergey Bostandzhyan <jin@mediatomb.cc>
> > > > > ---
> > > > >  arch/arm64/boot/dts/rockchip/Makefile         |  1 +
> > > > >  .../dts/rockchip/rk3328-nanopi-r2s-plus.dts   | 31 +++++++++++++++++++
> > > > >  2 files changed, 32 insertions(+)
> > > > >  create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > > > > 
> > > > > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> > > > > index fda1b980eb4b..36258dc8dafd 100644
> > > > > --- a/arch/arm64/boot/dts/rockchip/Makefile
> > > > > +++ b/arch/arm64/boot/dts/rockchip/Makefile
> > > > > @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
> > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
> > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus.dtb
> > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
> > > > > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-plus.dtb
> > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
> > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb
> > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
> > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > > > > new file mode 100644
> > > > > index 000000000000..7b83090a2145
> > > > > --- /dev/null
> > > > > +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > > > > @@ -0,0 +1,31 @@
> > > > > +// SPDX-License-Identifier: GPL-2.0+
> > > > > +/*
> > > > > + * (C) Copyright 2018 FriendlyElec Computer Tech. Co., Ltd.
> > > > > + * (http://www.friendlyarm.com)
> > > > > + *
> > > > > + * (C) Copyright 2016 Rockchip Electronics Co., Ltd
> > > > > + */
> > > > > +
> > > > > +/dts-v1/;
> > > > > +#include "rk3328-nanopi-r2s.dts"
> > > > > +
> > > > > +/ {
> > > > > +	model = "FriendlyElec NanoPi R2S Plus";
> > > > > +	compatible = "friendlyarm,nanopi-r2s-plus", "rockchip,rk3328";
> > > > > +
> > > > > +	aliases {
> > > > > +		mmc1 = &emmc;
> > > > > +	};
> > > > > +};
> > > > > +
> > > > > +&emmc {
> > > > > +	bus-width = <8>;
> > > > > +	cap-mmc-highspeed;
> > > > > +	supports-emmc;
> > > > > +	disable-wp;
> > > > > +	non-removable;
> > > > > +	num-slots = <1>;
> > > > > +	pinctrl-names = "default";
> > > > > +	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
> > > > 
> > > > I think it's worth adding
> > > > 
> > > > 	mmc-hs200-1_8v;
> > > > 
> > > > 
> > > > I've tried getting the best speed possible and while HS400 with and
> > > > without enhanced strobe did NOT work, hs200 works just fine.
> > > > [    0.459863] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
> > > > [    0.460884] mmc_host mmc1: Bus speed (slot 0) = 150000000Hz (slot req 150000000Hz, actual 150000000HZ div = 0)
> > > > ...
> > > > [    0.728220] dwmmc_rockchip ff520000.mmc: Successfully tuned phase to 194
> > > > [    0.728940] mmc1: new HS200 MMC card at address 0001
> > > > [    0.730774] mmcblk1: mmc1:0001 A3A551 28.9 GiB
> > > > [    0.733262]  mmcblk1: p1 p2
> > > > [    0.734562] mmcblk1boot0: mmc1:0001 A3A551 4.00 MiB
> > > > [    0.736818] mmcblk1boot1: mmc1:0001 A3A551 4.00 MiB
> > > > [    0.738503] mmcblk1rpmb: mmc1:0001 A3A551 16.0 MiB, chardev (245:0)
> > > > 
> > > > root@OpenWrt:/# hdparm -t /dev/mmcblk1
> > > > 
> > > > /dev/mmcblk1:
> > > >  Timing buffered disk reads: 342 MB in  3.00 seconds = 113.81 MB/sec
> > > > 
> > > > 
> > > > Without 'mmc-hs200-1_8v' property in DT the eMMC is detected as
> > > > [    0.440465] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
> > > > [    0.442032] mmc1: new high speed MMC card at address 0001
> > > > [    0.444261] mmcblk1: mmc1:0001 A3A551 28.9 GiB
> > > > [    0.447388]  mmcblk1: p1 p2
> > > > [    0.448744] mmcblk1boot0: mmc1:0001 A3A551 4.00 MiB
> > > > [    0.451065] mmcblk1boot1: mmc1:0001 A3A551 4.00 MiB
> > > > [    0.452871] mmcblk1rpmb: mmc1:0001 A3A551 16.0 MiB, chardev (245:0)
> > > > 
> > > > 
> > > > root@OpenWrt:/# hdparm -t /dev/mmcblk1
> > > > 
> > > > /dev/mmcblk1:
> > > >  Timing buffered disk reads: 134 MB in  3.03 seconds =  44.18 MB/sec
> > > > 
> > > > 
> > > > > +	status = "okay";
> > > > > +};
> > > > 
> > > > I'm right now trying to get SDIO RTL8822CS working, so far I'm out of luck,
> > > > but it can be added later once we got it working.
> > > 
> > > would you be interested in taking over my attempted patches? Thing is,
> > > that I am a userspace guy who only copy-pasted some entries from
> > > FriendlyElec and things happened to work, but I really have no clue what I am
> > > doing when it comes to hardware and DTS. I see that some changes were suggested, 
> > > not only by you above, but also by others earlier and I have little
> > > understanding of where I should be inserting what and how.
> > > 
> > > At this point I think it would make more sense if someone who actually
> > > understands what they are doing would continue to tune the DTS :)
> > > 
> > > So it'd be great if either you or anyone else would be willing to take
> > > over?
> > 
> > Though, a board devicetree is a nice way to get "your feet wet" in the
> > kernel :-) and for a lot of people scratching ones own itches gets them
> > started.
> 
> While this may very well be true, my main issue is not the DT syntax,
> but the lack of understanding of the underlying hardware and also a lack of
> enthusiasm to dive into the hardware topics - I prefer to stay in
> userspace where the kernel provides a very nice abstraction to all those 
> details ;)

No worries :-) .

Though in this case you're "on the hook" for the board devicetree :-D .


> > The devicetree is easy enough, also looks correct and you even got the
> > binding change correct - and you're the person with the actual board :-) .
> > 
> > Could you possibly test if the   mmc-hs200-1_8v; property works for you?
> 
> It does, I get pretty much the same results as Daniel:
> 
> root@nanopi-r2s-plus:~# hdparm -t /dev/mmcblk1
> /dev/mmcblk1:
>  Timing buffered disk reads: 134 MB in  3.04 seconds =  44.13 MB/sec
> 
> With mmc-hs200-1_8v:
> 
> root@nanopi-r2s-plus:~# hdparm -t /dev/mmcblk1
>  /dev/mmcblk1:
>   Timing buffered disk reads: 340 MB in  3.01 seconds = 113.08 MB/sec
> 
> Should I add a commit on top with this change and submit a v3 patchset?
> 
> On Thu, Aug 01, 2024 at 11:22:27PM +0200, Heiko Stübner wrote:
> > general remark, please don't send new versions as threaded replies to
> > old
> > versions. The normal case for git-send-email is to create a new thread
> > and this continuing inside the old thread confues tooling.
> 
> In case you tell me to go ahead with a v3 set, should it be in this
> thread or not? I understood RESEND's should be new, but updates should
> stay in the thread, right?
> 
> Sorry, I actually did read the guides, but seems misunderstood what I should
> be doing as I inserted the in-reply-to header in my last RESEND.

Please do a v3 ... in a new thread.

Also for the process, please add the Ack you received for patch 2
in that v3.


Thanks
Heiko

Re: [PATCH V2 1/2 RESEND] arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus

[Sergey 'Jin' Bostandzhyan]

On Wed, Aug 14, 2024 at 01:36:43PM +0200, Heiko Stübner wrote:
> Am Mittwoch, 14. August 2024, 13:21:38 CEST schrieb Sergey 'Jin' Bostandzhyan:
> > Hi,
> > 
> > On Sat, Aug 10, 2024 at 09:11:56PM +0200, Heiko Stübner wrote:
> > > Am Montag, 5. August 2024, 10:59:35 CEST schrieb Sergey 'Jin' Bostandzhyan:
> > > > On Sun, Aug 04, 2024 at 01:27:50AM +0100, Daniel Golle wrote:
> > > > > On Thu, Aug 01, 2024 at 05:57:35PM +0000, Sergey Bostandzhyan wrote:
> > > > > > The R2S Plus is basically an R2S with additional eMMC.
> > > > > > 
> > > > > > The eMMC configuration for the DTS has been extracted and copied from
> > > > > > rk3328-nanopi-r2.dts, v2017.09 branch from the friendlyarm/uboot-rockchip
> > > > > > repository.
> > > > > > 
> > > > > > Signed-off-by: Sergey Bostandzhyan <jin@mediatomb.cc>
> > > > > > ---
> > > > > >  arch/arm64/boot/dts/rockchip/Makefile         |  1 +
> > > > > >  .../dts/rockchip/rk3328-nanopi-r2s-plus.dts   | 31 +++++++++++++++++++
> > > > > >  2 files changed, 32 insertions(+)
> > > > > >  create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > > > > > 
> > > > > > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> > > > > > index fda1b980eb4b..36258dc8dafd 100644
> > > > > > --- a/arch/arm64/boot/dts/rockchip/Makefile
> > > > > > +++ b/arch/arm64/boot/dts/rockchip/Makefile
> > > > > > @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
> > > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
> > > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus.dtb
> > > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
> > > > > > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-plus.dtb
> > > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
> > > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb
> > > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
> > > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > > > > > new file mode 100644
> > > > > > index 000000000000..7b83090a2145
> > > > > > --- /dev/null
> > > > > > +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > > > > > @@ -0,0 +1,31 @@
> > > > > > +// SPDX-License-Identifier: GPL-2.0+
> > > > > > +/*
> > > > > > + * (C) Copyright 2018 FriendlyElec Computer Tech. Co., Ltd.
> > > > > > + * (http://www.friendlyarm.com)
> > > > > > + *
> > > > > > + * (C) Copyright 2016 Rockchip Electronics Co., Ltd
> > > > > > + */
> > > > > > +
> > > > > > +/dts-v1/;
> > > > > > +#include "rk3328-nanopi-r2s.dts"
> > > > > > +
> > > > > > +/ {
> > > > > > +	model = "FriendlyElec NanoPi R2S Plus";
> > > > > > +	compatible = "friendlyarm,nanopi-r2s-plus", "rockchip,rk3328";
> > > > > > +
> > > > > > +	aliases {
> > > > > > +		mmc1 = &emmc;
> > > > > > +	};
> > > > > > +};
> > > > > > +
> > > > > > +&emmc {
> > > > > > +	bus-width = <8>;
> > > > > > +	cap-mmc-highspeed;
> > > > > > +	supports-emmc;
> > > > > > +	disable-wp;
> > > > > > +	non-removable;
> > > > > > +	num-slots = <1>;
> > > > > > +	pinctrl-names = "default";
> > > > > > +	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
> > > > > 
> > > > > I think it's worth adding
> > > > > 
> > > > > 	mmc-hs200-1_8v;
> > > > > 
> > > > > 
> > > > > I've tried getting the best speed possible and while HS400 with and
> > > > > without enhanced strobe did NOT work, hs200 works just fine.
> > > > > [    0.459863] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
> > > > > [    0.460884] mmc_host mmc1: Bus speed (slot 0) = 150000000Hz (slot req 150000000Hz, actual 150000000HZ div = 0)
> > > > > ...
> > > > > [    0.728220] dwmmc_rockchip ff520000.mmc: Successfully tuned phase to 194
> > > > > [    0.728940] mmc1: new HS200 MMC card at address 0001
> > > > > [    0.730774] mmcblk1: mmc1:0001 A3A551 28.9 GiB
> > > > > [    0.733262]  mmcblk1: p1 p2
> > > > > [    0.734562] mmcblk1boot0: mmc1:0001 A3A551 4.00 MiB
> > > > > [    0.736818] mmcblk1boot1: mmc1:0001 A3A551 4.00 MiB
> > > > > [    0.738503] mmcblk1rpmb: mmc1:0001 A3A551 16.0 MiB, chardev (245:0)
> > > > > 
> > > > > root@OpenWrt:/# hdparm -t /dev/mmcblk1
> > > > > 
> > > > > /dev/mmcblk1:
> > > > >  Timing buffered disk reads: 342 MB in  3.00 seconds = 113.81 MB/sec
> > > > > 
> > > > > 
> > > > > Without 'mmc-hs200-1_8v' property in DT the eMMC is detected as
> > > > > [    0.440465] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
> > > > > [    0.442032] mmc1: new high speed MMC card at address 0001
> > > > > [    0.444261] mmcblk1: mmc1:0001 A3A551 28.9 GiB
> > > > > [    0.447388]  mmcblk1: p1 p2
> > > > > [    0.448744] mmcblk1boot0: mmc1:0001 A3A551 4.00 MiB
> > > > > [    0.451065] mmcblk1boot1: mmc1:0001 A3A551 4.00 MiB
> > > > > [    0.452871] mmcblk1rpmb: mmc1:0001 A3A551 16.0 MiB, chardev (245:0)
> > > > > 
> > > > > 
> > > > > root@OpenWrt:/# hdparm -t /dev/mmcblk1
> > > > > 
> > > > > /dev/mmcblk1:
> > > > >  Timing buffered disk reads: 134 MB in  3.03 seconds =  44.18 MB/sec
> > > > > 
> > > > > 
> > > > > > +	status = "okay";
> > > > > > +};
> > > > > 
> > > > > I'm right now trying to get SDIO RTL8822CS working, so far I'm out of luck,
> > > > > but it can be added later once we got it working.
> > > > 
> > > > would you be interested in taking over my attempted patches? Thing is,
> > > > that I am a userspace guy who only copy-pasted some entries from
> > > > FriendlyElec and things happened to work, but I really have no clue what I am
> > > > doing when it comes to hardware and DTS. I see that some changes were suggested, 
> > > > not only by you above, but also by others earlier and I have little
> > > > understanding of where I should be inserting what and how.
> > > > 
> > > > At this point I think it would make more sense if someone who actually
> > > > understands what they are doing would continue to tune the DTS :)
> > > > 
> > > > So it'd be great if either you or anyone else would be willing to take
> > > > over?
> > > 
> > > Though, a board devicetree is a nice way to get "your feet wet" in the
> > > kernel :-) and for a lot of people scratching ones own itches gets them
> > > started.
> > 
> > While this may very well be true, my main issue is not the DT syntax,
> > but the lack of understanding of the underlying hardware and also a lack of
> > enthusiasm to dive into the hardware topics - I prefer to stay in
> > userspace where the kernel provides a very nice abstraction to all those 
> > details ;)
> 
> No worries :-) .
> 
> Though in this case you're "on the hook" for the board devicetree :-D .
> 
> 
> > > The devicetree is easy enough, also looks correct and you even got the
> > > binding change correct - and you're the person with the actual board :-) .
> > > 
> > > Could you possibly test if the   mmc-hs200-1_8v; property works for you?
> > 
> > It does, I get pretty much the same results as Daniel:
> > 
> > root@nanopi-r2s-plus:~# hdparm -t /dev/mmcblk1
> > /dev/mmcblk1:
> >  Timing buffered disk reads: 134 MB in  3.04 seconds =  44.13 MB/sec
> > 
> > With mmc-hs200-1_8v:
> > 
> > root@nanopi-r2s-plus:~# hdparm -t /dev/mmcblk1
> >  /dev/mmcblk1:
> >   Timing buffered disk reads: 340 MB in  3.01 seconds = 113.08 MB/sec
> > 
> > Should I add a commit on top with this change and submit a v3 patchset?
> > 
> > On Thu, Aug 01, 2024 at 11:22:27PM +0200, Heiko Stübner wrote:
> > > general remark, please don't send new versions as threaded replies to
> > > old
> > > versions. The normal case for git-send-email is to create a new thread
> > > and this continuing inside the old thread confues tooling.
> > 
> > In case you tell me to go ahead with a v3 set, should it be in this
> > thread or not? I understood RESEND's should be new, but updates should
> > stay in the thread, right?
> > 
> > Sorry, I actually did read the guides, but seems misunderstood what I should
> > be doing as I inserted the in-reply-to header in my last RESEND.
> 
> Please do a v3 ... in a new thread.

There was one other note though to which I did not receive a clear
repsonse. Bjoern A. Zeeb noticed, that the newer version from the
rockhip repo has // SPDX-License-Identifier: (GPL-2.0+ OR MIT) while the
one which I copied the code from did not have the "OR MIT" part, hence I
also did not have it in my patch.

Am I supposed to leave it as is, since I copied the block from the
sources which indeed were GP-2.0 only or should I add the "OR MIT" part
as it is apparently the case in newer versions of the dts file from
rockhcip?

> Also for the process, please add the Ack you received for patch 2
> in that v3.

You mean, ammend the appropriate commit and add the Acked-By to the
commit message? OK, will do.

On Wed, Aug 14, 2024 at 01:34:13PM +0200, Diederik de Haas wrote:
> On Wed Aug 14, 2024 at 1:30 PM CEST, Diederik de Haas wrote:
> > On Wed Aug 14, 2024 at 1:21 PM CEST, Sergey 'Jin' Bostandzhyan
> > wrote:
> > > In case you tell me to go ahead with a v3 set, should it be in
> > > this
> > > thread or not? I understood RESEND's should be new, but updates
> > > should
> > > stay in the thread, right?
> >
> > No, a new series should be its own thread too.
> 
> More correctly and hopefully more clearly:

Understood, thank you!

Kind regards,
Sergey

Re: [PATCH V2 1/2 RESEND] arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S Plus

[Heiko Stübner]

Am Mittwoch, 14. August 2024, 14:24:03 CEST schrieb Sergey 'Jin' Bostandzhyan:
> On Wed, Aug 14, 2024 at 01:36:43PM +0200, Heiko Stübner wrote:
> > Am Mittwoch, 14. August 2024, 13:21:38 CEST schrieb Sergey 'Jin' Bostandzhyan:
> > > Hi,
> > > 
> > > On Sat, Aug 10, 2024 at 09:11:56PM +0200, Heiko Stübner wrote:
> > > > Am Montag, 5. August 2024, 10:59:35 CEST schrieb Sergey 'Jin' Bostandzhyan:
> > > > > On Sun, Aug 04, 2024 at 01:27:50AM +0100, Daniel Golle wrote:
> > > > > > On Thu, Aug 01, 2024 at 05:57:35PM +0000, Sergey Bostandzhyan wrote:
> > > > > > > The R2S Plus is basically an R2S with additional eMMC.
> > > > > > > 
> > > > > > > The eMMC configuration for the DTS has been extracted and copied from
> > > > > > > rk3328-nanopi-r2.dts, v2017.09 branch from the friendlyarm/uboot-rockchip
> > > > > > > repository.
> > > > > > > 
> > > > > > > Signed-off-by: Sergey Bostandzhyan <jin@mediatomb.cc>
> > > > > > > ---
> > > > > > >  arch/arm64/boot/dts/rockchip/Makefile         |  1 +
> > > > > > >  .../dts/rockchip/rk3328-nanopi-r2s-plus.dts   | 31 +++++++++++++++++++
> > > > > > >  2 files changed, 32 insertions(+)
> > > > > > >  create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > > > > > > 
> > > > > > > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
> > > > > > > index fda1b980eb4b..36258dc8dafd 100644
> > > > > > > --- a/arch/arm64/boot/dts/rockchip/Makefile
> > > > > > > +++ b/arch/arm64/boot/dts/rockchip/Makefile
> > > > > > > @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
> > > > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
> > > > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus.dtb
> > > > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
> > > > > > > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-plus.dtb
> > > > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
> > > > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb
> > > > > > >  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
> > > > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > > > > > > new file mode 100644
> > > > > > > index 000000000000..7b83090a2145
> > > > > > > --- /dev/null
> > > > > > > +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus.dts
> > > > > > > @@ -0,0 +1,31 @@
> > > > > > > +// SPDX-License-Identifier: GPL-2.0+
> > > > > > > +/*
> > > > > > > + * (C) Copyright 2018 FriendlyElec Computer Tech. Co., Ltd.
> > > > > > > + * (http://www.friendlyarm.com)
> > > > > > > + *
> > > > > > > + * (C) Copyright 2016 Rockchip Electronics Co., Ltd
> > > > > > > + */
> > > > > > > +
> > > > > > > +/dts-v1/;
> > > > > > > +#include "rk3328-nanopi-r2s.dts"
> > > > > > > +
> > > > > > > +/ {
> > > > > > > +	model = "FriendlyElec NanoPi R2S Plus";
> > > > > > > +	compatible = "friendlyarm,nanopi-r2s-plus", "rockchip,rk3328";
> > > > > > > +
> > > > > > > +	aliases {
> > > > > > > +		mmc1 = &emmc;
> > > > > > > +	};
> > > > > > > +};
> > > > > > > +
> > > > > > > +&emmc {
> > > > > > > +	bus-width = <8>;
> > > > > > > +	cap-mmc-highspeed;
> > > > > > > +	supports-emmc;
> > > > > > > +	disable-wp;
> > > > > > > +	non-removable;
> > > > > > > +	num-slots = <1>;
> > > > > > > +	pinctrl-names = "default";
> > > > > > > +	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
> > > > > > 
> > > > > > I think it's worth adding
> > > > > > 
> > > > > > 	mmc-hs200-1_8v;
> > > > > > 
> > > > > > 
> > > > > > I've tried getting the best speed possible and while HS400 with and
> > > > > > without enhanced strobe did NOT work, hs200 works just fine.
> > > > > > [    0.459863] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
> > > > > > [    0.460884] mmc_host mmc1: Bus speed (slot 0) = 150000000Hz (slot req 150000000Hz, actual 150000000HZ div = 0)
> > > > > > ...
> > > > > > [    0.728220] dwmmc_rockchip ff520000.mmc: Successfully tuned phase to 194
> > > > > > [    0.728940] mmc1: new HS200 MMC card at address 0001
> > > > > > [    0.730774] mmcblk1: mmc1:0001 A3A551 28.9 GiB
> > > > > > [    0.733262]  mmcblk1: p1 p2
> > > > > > [    0.734562] mmcblk1boot0: mmc1:0001 A3A551 4.00 MiB
> > > > > > [    0.736818] mmcblk1boot1: mmc1:0001 A3A551 4.00 MiB
> > > > > > [    0.738503] mmcblk1rpmb: mmc1:0001 A3A551 16.0 MiB, chardev (245:0)
> > > > > > 
> > > > > > root@OpenWrt:/# hdparm -t /dev/mmcblk1
> > > > > > 
> > > > > > /dev/mmcblk1:
> > > > > >  Timing buffered disk reads: 342 MB in  3.00 seconds = 113.81 MB/sec
> > > > > > 
> > > > > > 
> > > > > > Without 'mmc-hs200-1_8v' property in DT the eMMC is detected as
> > > > > > [    0.440465] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
> > > > > > [    0.442032] mmc1: new high speed MMC card at address 0001
> > > > > > [    0.444261] mmcblk1: mmc1:0001 A3A551 28.9 GiB
> > > > > > [    0.447388]  mmcblk1: p1 p2
> > > > > > [    0.448744] mmcblk1boot0: mmc1:0001 A3A551 4.00 MiB
> > > > > > [    0.451065] mmcblk1boot1: mmc1:0001 A3A551 4.00 MiB
> > > > > > [    0.452871] mmcblk1rpmb: mmc1:0001 A3A551 16.0 MiB, chardev (245:0)
> > > > > > 
> > > > > > 
> > > > > > root@OpenWrt:/# hdparm -t /dev/mmcblk1
> > > > > > 
> > > > > > /dev/mmcblk1:
> > > > > >  Timing buffered disk reads: 134 MB in  3.03 seconds =  44.18 MB/sec
> > > > > > 
> > > > > > 
> > > > > > > +	status = "okay";
> > > > > > > +};
> > > > > > 
> > > > > > I'm right now trying to get SDIO RTL8822CS working, so far I'm out of luck,
> > > > > > but it can be added later once we got it working.
> > > > > 
> > > > > would you be interested in taking over my attempted patches? Thing is,
> > > > > that I am a userspace guy who only copy-pasted some entries from
> > > > > FriendlyElec and things happened to work, but I really have no clue what I am
> > > > > doing when it comes to hardware and DTS. I see that some changes were suggested, 
> > > > > not only by you above, but also by others earlier and I have little
> > > > > understanding of where I should be inserting what and how.
> > > > > 
> > > > > At this point I think it would make more sense if someone who actually
> > > > > understands what they are doing would continue to tune the DTS :)
> > > > > 
> > > > > So it'd be great if either you or anyone else would be willing to take
> > > > > over?
> > > > 
> > > > Though, a board devicetree is a nice way to get "your feet wet" in the
> > > > kernel :-) and for a lot of people scratching ones own itches gets them
> > > > started.
> > > 
> > > While this may very well be true, my main issue is not the DT syntax,
> > > but the lack of understanding of the underlying hardware and also a lack of
> > > enthusiasm to dive into the hardware topics - I prefer to stay in
> > > userspace where the kernel provides a very nice abstraction to all those 
> > > details ;)
> > 
> > No worries :-) .
> > 
> > Though in this case you're "on the hook" for the board devicetree :-D .
> > 
> > 
> > > > The devicetree is easy enough, also looks correct and you even got the
> > > > binding change correct - and you're the person with the actual board :-) .
> > > > 
> > > > Could you possibly test if the   mmc-hs200-1_8v; property works for you?
> > > 
> > > It does, I get pretty much the same results as Daniel:
> > > 
> > > root@nanopi-r2s-plus:~# hdparm -t /dev/mmcblk1
> > > /dev/mmcblk1:
> > >  Timing buffered disk reads: 134 MB in  3.04 seconds =  44.13 MB/sec
> > > 
> > > With mmc-hs200-1_8v:
> > > 
> > > root@nanopi-r2s-plus:~# hdparm -t /dev/mmcblk1
> > >  /dev/mmcblk1:
> > >   Timing buffered disk reads: 340 MB in  3.01 seconds = 113.08 MB/sec
> > > 
> > > Should I add a commit on top with this change and submit a v3 patchset?
> > > 
> > > On Thu, Aug 01, 2024 at 11:22:27PM +0200, Heiko Stübner wrote:
> > > > general remark, please don't send new versions as threaded replies to
> > > > old
> > > > versions. The normal case for git-send-email is to create a new thread
> > > > and this continuing inside the old thread confues tooling.
> > > 
> > > In case you tell me to go ahead with a v3 set, should it be in this
> > > thread or not? I understood RESEND's should be new, but updates should
> > > stay in the thread, right?
> > > 
> > > Sorry, I actually did read the guides, but seems misunderstood what I should
> > > be doing as I inserted the in-reply-to header in my last RESEND.
> > 
> > Please do a v3 ... in a new thread.
> 
> There was one other note though to which I did not receive a clear
> repsonse. Bjoern A. Zeeb noticed, that the newer version from the
> rockhip repo has // SPDX-License-Identifier: (GPL-2.0+ OR MIT) while the
> one which I copied the code from did not have the "OR MIT" part, hence I
> also did not have it in my patch.
> 
> Am I supposed to leave it as is, since I copied the block from the
> sources which indeed were GP-2.0 only or should I add the "OR MIT" part
> as it is apparently the case in newer versions of the dts file from
> rockhcip?

the code you based your dts on changed licenses, so I guess you're also
allowed to change. You could very well also just have "copied it again"
from those new sources under GPL+MIT ;-)

And yep, dual licensing is preferred.

> > Also for the process, please add the Ack you received for patch 2
> > in that v3.
> 
> You mean, ammend the appropriate commit and add the Acked-By to the
> commit message? OK, will do.

correct. That is the expecting thing to do. DT maintainers see so many
patches that they won't keep track of "oh I have seen that already", so
would in the worst case, re-review the binding patch. By adding the Ack
they can just see (and probably tooling can simply filter out) those that
are already done.


> On Wed, Aug 14, 2024 at 01:34:13PM +0200, Diederik de Haas wrote:
> > On Wed Aug 14, 2024 at 1:30 PM CEST, Diederik de Haas wrote:
> > > On Wed Aug 14, 2024 at 1:21 PM CEST, Sergey 'Jin' Bostandzhyan
> > > wrote:
> > > > In case you tell me to go ahead with a v3 set, should it be in
> > > > this
> > > > thread or not? I understood RESEND's should be new, but updates
> > > > should
> > > > stay in the thread, right?
> > >
> > > No, a new series should be its own thread too.
> > 
> > More correctly and hopefully more clearly:
> 
> Understood, thank you!
> 
> Kind regards,
> Sergey
> 
>