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[82.149.1.233]) by smtp.gmail.com with ESMTPSA id n4-20020a5d4204000000b003143867d2ebsm3153306wrq.63.2023.08.04.12.02.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Aug 2023 12:02:59 -0700 (PDT) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Samuel Holland , Andre Przywara Cc: Icenowy Zheng , Piotr Oniszczuk , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/3] arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DT Date: Fri, 04 Aug 2023 21:02:58 +0200 Message-ID: <2691030.mvXUDI8C0e@jernej-laptop> In-Reply-To: <20230804170856.1237202-2-andre.przywara@arm.com> References: <20230804170856.1237202-1-andre.przywara@arm.com> <20230804170856.1237202-2-andre.przywara@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230804_120306_493021_2710729D X-CRM114-Status: GOOD ( 25.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Dne petek, 04. avgust 2023 ob 19:08:54 CEST je Andre Przywara napisal(a): > The Orange Pi Zero 2 got a successor (Zero 3), which shares quite some > DT nodes with the Zero 2, but comes with a different PMIC. > > Move the common parts (except the PMIC) into a new shared file, and > include that from the existing board .dts file. > > No functional change, the generated DTB is the same, except for some > phandle numbering differences. > > Signed-off-by: Andre Przywara Acked-by: Jernej Skrabec Best regards, Jernej > --- > .../allwinner/sun50i-h616-orangepi-zero.dtsi | 134 ++++++++++++++++++ > .../allwinner/sun50i-h616-orangepi-zero2.dts | 119 +--------------- > 2 files changed, 135 insertions(+), 118 deletions(-) > create mode 100644 > arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi > b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi new file > mode 100644 > index 0000000000000..8788c129b2887 > --- /dev/null > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi > @@ -0,0 +1,134 @@ > +// SPDX-License-Identifier: (GPL-2.0+ or MIT) > +/* > + * Copyright (C) 2020 Arm Ltd. > + * > + * DT nodes common between Orange Pi Zero 2 and Orange Pi Zero 3. > + * Excludes PMIC nodes and properties, since they are different between the > two. + */ > + > +#include "sun50i-h616.dtsi" > + > +#include > +#include > +#include > + > +/ { > + aliases { > + ethernet0 = &emac0; > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + led-0 { > + function = LED_FUNCTION_POWER; > + color = ; > + gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ > + default-state = "on"; > + }; > + > + led-1 { > + function = LED_FUNCTION_STATUS; > + color = ; > + gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */ > + }; > + }; > + > + reg_vcc5v: vcc5v { > + /* board wide 5V supply directly from the USB-C socket */ > + compatible = "regulator-fixed"; > + regulator-name = "vcc-5v"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-always-on; > + }; > + > + reg_usb1_vbus: regulator-usb1-vbus { > + compatible = "regulator-fixed"; > + regulator-name = "usb1-vbus"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <®_vcc5v>; > + enable-active-high; > + gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */ > + }; > +}; > + > +&ehci1 { > + status = "okay"; > +}; > + > +/* USB 2 & 3 are on headers only. */ > + > +&emac0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&ext_rgmii_pins>; > + phy-mode = "rgmii"; > + phy-handle = <&ext_rgmii_phy>; > + allwinner,rx-delay-ps = <3100>; > + allwinner,tx-delay-ps = <700>; > + status = "okay"; > +}; > + > +&mdio0 { > + ext_rgmii_phy: ethernet-phy@1 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <1>; > + }; > +}; > + > +&mmc0 { > + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ > + bus-width = <4>; > + status = "okay"; > +}; > + > +&ohci1 { > + status = "okay"; > +}; > + > +&spi0 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; > + > + flash@0 { > + #address-cells = <1>; > + #size-cells = <1>; > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <40000000>; > + }; > +}; > + > +&uart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart0_ph_pins>; > + status = "okay"; > +}; > + > +&usbotg { > + /* > + * PHY0 pins are connected to a USB-C socket, but a role switch > + * is not implemented: both CC pins are pulled to GND. > + * The VBUS pins power the device, so a fixed peripheral mode > + * is the best choice. > + * The board can be powered via GPIOs, in this case port0 *can* > + * act as a host (with a cable/adapter ignoring CC), as VBUS is > + * then provided by the GPIOs. Any user of this setup would > + * need to adjust the DT accordingly: dr_mode set to "host", > + * enabling OHCI0 and EHCI0. > + */ > + dr_mode = "peripheral"; > + status = "okay"; > +}; > + > +&usbphy { > + usb1_vbus-supply = <®_usb1_vbus>; > + status = "okay"; > +}; > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts > b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts index > cb8600d0ea1ef..d6e732b12c52d 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts > @@ -5,95 +5,19 @@ > > /dts-v1/; > > -#include "sun50i-h616.dtsi" > - > -#include > -#include > -#include > +#include "sun50i-h616-orangepi-zero.dtsi" > > / { > model = "OrangePi Zero2"; > compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616"; > - > - aliases { > - ethernet0 = &emac0; > - serial0 = &uart0; > - }; > - > - chosen { > - stdout-path = "serial0:115200n8"; > - }; > - > - leds { > - compatible = "gpio-leds"; > - > - led-0 { > - function = LED_FUNCTION_POWER; > - color = ; > - gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ > - default-state = "on"; > - }; > - > - led-1 { > - function = LED_FUNCTION_STATUS; > - color = ; > - gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */ > - }; > - }; > - > - reg_vcc5v: vcc5v { > - /* board wide 5V supply directly from the USB-C socket */ > - compatible = "regulator-fixed"; > - regulator-name = "vcc-5v"; > - regulator-min-microvolt = <5000000>; > - regulator-max-microvolt = <5000000>; > - regulator-always-on; > - }; > - > - reg_usb1_vbus: regulator-usb1-vbus { > - compatible = "regulator-fixed"; > - regulator-name = "usb1-vbus"; > - regulator-min-microvolt = <5000000>; > - regulator-max-microvolt = <5000000>; > - vin-supply = <®_vcc5v>; > - enable-active-high; > - gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */ > - }; > }; > > -&ehci1 { > - status = "okay"; > -}; > - > -/* USB 2 & 3 are on headers only. */ > - > &emac0 { > - pinctrl-names = "default"; > - pinctrl-0 = <&ext_rgmii_pins>; > - phy-mode = "rgmii"; > - phy-handle = <&ext_rgmii_phy>; > phy-supply = <®_dcdce>; > - allwinner,rx-delay-ps = <3100>; > - allwinner,tx-delay-ps = <700>; > - status = "okay"; > -}; > - > -&mdio0 { > - ext_rgmii_phy: ethernet-phy@1 { > - compatible = "ethernet-phy-ieee802.3-c22"; > - reg = <1>; > - }; > }; > > &mmc0 { > vmmc-supply = <®_dcdce>; > - cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ > - bus-width = <4>; > - status = "okay"; > -}; > - > -&ohci1 { > - status = "okay"; > }; > > &r_rsb { > @@ -211,44 +135,3 @@ &pio { > vcc-ph-supply = <®_aldo1>; > vcc-pi-supply = <®_aldo1>; > }; > - > -&spi0 { > - status = "okay"; > - pinctrl-names = "default"; > - pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; > - > - flash@0 { > - #address-cells = <1>; > - #size-cells = <1>; > - compatible = "jedec,spi-nor"; > - reg = <0>; > - spi-max-frequency = <40000000>; > - }; > -}; > - > -&uart0 { > - pinctrl-names = "default"; > - pinctrl-0 = <&uart0_ph_pins>; > - status = "okay"; > -}; > - > -&usbotg { > - /* > - * PHY0 pins are connected to a USB-C socket, but a role switch > - * is not implemented: both CC pins are pulled to GND. > - * The VBUS pins power the device, so a fixed peripheral mode > - * is the best choice. > - * The board can be powered via GPIOs, in this case port0 *can* > - * act as a host (with a cable/adapter ignoring CC), as VBUS is > - * then provided by the GPIOs. Any user of this setup would > - * need to adjust the DT accordingly: dr_mode set to "host", > - * enabling OHCI0 and EHCI0. > - */ > - dr_mode = "peripheral"; > - status = "okay"; > -}; > - > -&usbphy { > - usb1_vbus-supply = <®_usb1_vbus>; > - status = "okay"; > -}; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel