From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Bibek Kumar Patro <quic_bibekkum@quicinc.com>,
will@kernel.org, robin.murphy@arm.com, joro@8bytes.org,
dmitry.baryshkov@linaro.org, a39.skl@gmail.com,
quic_saipraka@quicinc.com, quic_pkondeti@quicinc.com,
quic_molvera@quicinc.com
Cc: linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org, qipl.kernel.upstream@quicinc.com
Subject: Re: [PATCH 3/3] iommu/arm-smmu: re-enable context caching in smmu reset operation
Date: Sat, 4 Nov 2023 12:30:54 +0100 [thread overview]
Message-ID: <26af3ecc-8b3f-4b10-b594-eae57de501cb@linaro.org> (raw)
In-Reply-To: <20231103215124.1095-4-quic_bibekkum@quicinc.com>
On 11/3/23 22:51, Bibek Kumar Patro wrote:
> Context caching is re-enabled in the prefetch buffer for Qualcomm SoCs
> through SoC specific reset ops, which is disabled in the default MMU-500
> reset ops, but is expected for context banks using ACTLR register to
> retain the prefetch value during reset and runtime suspend.
>
> Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
> ---
> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 26 ++++++++++++++++++----
> 1 file changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> index 590b7c285299..f342b4778cf1 100644
> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> @@ -457,11 +457,29 @@ static int qcom_smmu_def_domain_type(struct device *dev)
> return match ? IOMMU_DOMAIN_IDENTITY : 0;
> }
>
> +#define ARM_MMU500_ACTLR_CPRE BIT(1)
> +
> +static int qcom_smmu500_reset(struct arm_smmu_device *smmu)
> +{
> + int i;
> + u32 reg;
> +
> + arm_mmu500_reset(smmu);
> +
> + for (i = 0; i < smmu->num_context_banks; ++i) {
This loop deserves a comment above it like
/* Re-enable context caching after reset */
Konrad
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next prev parent reply other threads:[~2023-11-04 11:31 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-03 21:51 [PATCH 0/3] iommu/arm-smmu: introduction of ACTLR implementation for Qualcomm SoCs Bibek Kumar Patro
2023-11-03 21:51 ` [PATCH 1/3] iommu/arm-smmu: introduction of ACTLR for custom prefetcher settings Bibek Kumar Patro
2023-11-03 22:03 ` Dmitry Baryshkov
2023-11-06 6:12 ` Bibek Kumar Patro
2023-11-14 10:20 ` Bibek Kumar Patro
2023-11-14 10:36 ` Dmitry Baryshkov
2023-11-03 21:51 ` [PATCH 2/3] iommu/arm-smmu: add ACTLR data and support for SM8550 Bibek Kumar Patro
2023-11-03 22:01 ` Dmitry Baryshkov
2023-11-03 22:38 ` Bibek Kumar Patro
2023-11-03 22:41 ` Dmitry Baryshkov
2023-11-06 6:09 ` Bibek Kumar Patro
2023-11-06 9:05 ` Dmitry Baryshkov
2023-11-06 12:09 ` Bibek Kumar Patro
2023-11-10 9:55 ` Pratyush Brahma
2023-11-04 11:29 ` Konrad Dybcio
2023-11-06 6:26 ` Bibek Kumar Patro
2023-11-04 15:29 ` kernel test robot
2023-11-03 21:51 ` [PATCH 3/3] iommu/arm-smmu: re-enable context caching in smmu reset operation Bibek Kumar Patro
2023-11-03 21:58 ` Dmitry Baryshkov
2023-11-03 22:06 ` Bibek Kumar Patro
2023-11-03 22:23 ` Dmitry Baryshkov
2023-11-03 22:42 ` Bibek Kumar Patro
2023-11-04 11:30 ` Konrad Dybcio [this message]
2023-11-06 6:28 ` Bibek Kumar Patro
2023-11-03 22:44 ` [PATCH 0/3] iommu/arm-smmu: introduction of ACTLR implementation for Qualcomm SoCs Dmitry Baryshkov
2023-11-06 6:39 ` Bibek Kumar Patro
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