From: heiko@sntech.de (Heiko Stuebner)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 1/8] dt-bindings: add documentation of rk3036 clock controller
Date: Thu, 05 Nov 2015 00:39:25 +0100 [thread overview]
Message-ID: <2700959.OiVQMNL8Ss@phil> (raw)
In-Reply-To: <1446639503-11763-2-git-send-email-zhengxing@rock-chips.com>
Hi,
Am Mittwoch, 4. November 2015, 20:18:16 schrieb Xing Zheng:
> Add the devicetree binding for the cru on the rk3036 which quite similar
> structured as previous clock controllers.
>
> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> ---
your recipient-list is missing the clock maintainers+lists - sorry for
not noticing this earlier.
While the devicetree-maintainers may Review it, we expect the clock-
maintainers to actually apply all 4 clock-related patches.
Same comment is true for
[PATCH v6 2/8] clk: rockchip: add dt-binding header for rk3036
Heiko
>
> Changes in v6: None
>
> .../bindings/clock/rockchip,rk3036-cru.txt | 56 ++++++++++++++++++++
> 1 file changed, 56 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt
>
> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt
> new file mode 100644
> index 0000000..ace0599
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt
> @@ -0,0 +1,56 @@
> +* Rockchip RK3036 Clock and Reset Unit
> +
> +The RK3036 clock controller generates and supplies clock to various
> +controllers within the SoC and also implements a reset controller for SoC
> +peripherals.
> +
> +Required Properties:
> +
> +- compatible: should be "rockchip,rk3036-cru"
> +- reg: physical base address of the controller and length of memory mapped
> + region.
> +- #clock-cells: should be 1.
> +- #reset-cells: should be 1.
> +
> +Optional Properties:
> +
> +- rockchip,grf: phandle to the syscon managing the "general register files"
> + If missing pll rates are not changeable, due to the missing pll lock status.
> +
> +Each clock is assigned an identifier and client nodes can use this identifier
> +to specify the clock which they consume. All available clocks are defined as
> +preprocessor macros in the dt-bindings/clock/rk3036-cru.h headers and can be
> +used in device tree sources. Similar macros exist for the reset sources in
> +these files.
> +
> +External clocks:
> +
> +There are several clocks that are generated outside the SoC. It is expected
> +that they are defined using standard clock bindings with following
> +clock-output-names:
> + - "xin24m" - crystal input - required,
> + - "ext_i2s" - external I2S clock - optional,
> + - "ext_gmac" - external GMAC clock - optional
> +
> +Example: Clock controller node:
> +
> + cru: cru at 20000000 {
> + compatible = "rockchip,rk3036-cru";
> + reg = <0x20000000 0x1000>;
> + rockchip,grf = <&grf>;
> +
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + };
> +
> +Example: UART controller node that consumes the clock generated by the clock
> + controller:
> +
> + uart0: serial at 20060000 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x20060000 0x100>;
> + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + clocks = <&cru SCLK_UART0>;
> + };
>
next prev parent reply other threads:[~2015-11-04 23:39 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-04 12:18 [PATCH v6 0/8] Build and support rk3036 SoC platform Xing Zheng
2015-11-04 12:18 ` [PATCH v6 1/8] dt-bindings: add documentation of rk3036 clock controller Xing Zheng
2015-11-04 23:39 ` Heiko Stuebner [this message]
2015-11-05 3:05 ` Xing Zheng
2015-11-05 3:22 ` Rob Herring
2015-11-04 12:18 ` [PATCH v6 3/8] clk: rockchip: add new pll-type for rk3036 and similar socs Xing Zheng
2015-11-04 23:50 ` [PATCH v6.1 " Heiko Stuebner
2015-11-04 12:18 ` [PATCH v6 4/8] clk: rockchip: add clock controller for rk3036 Xing Zheng
2015-11-04 23:51 ` [PATCH v6.1 " Heiko Stuebner
2015-11-04 12:24 ` [PATCH v6 5/8] ARM: dts: rockchip: add core rk3036 dts Xing Zheng
2015-11-04 12:25 ` [PATCH v6 6/8] ARM: rockchip: add support smp for rk3036 Xing Zheng
2015-11-04 23:33 ` Heiko Stuebner
2015-11-05 3:00 ` Xing Zheng
2015-11-05 3:21 ` Rob Herring
2015-11-04 12:25 ` [PATCH v6 7/8] ARM: dts: enable " Xing Zheng
2015-11-04 12:25 ` [PATCH v6 8/8] rockchip: make sure timer5 is enabled on rk3036 platforms Xing Zheng
2015-11-04 23:35 ` Heiko Stuebner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=2700959.OiVQMNL8Ss@phil \
--to=heiko@sntech.de \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).