Hi Sascha,

Le mercredi 19 août 2026 à 12:37 +0200, Sascha Hauer a écrit :
> +/* ------------------------------------------------------------------ */
> +/* Register byte offsets from dec_base                                 */
> +/* ------------------------------------------------------------------ */
> +
> +/* REG0: IP version / product ID */
> +#define VDPU720_REG_VERSION		0x000
> +#define VDPU720_PROD_NUM		GENMASK(31, 16)
> +#define VDPU720_BIT_DEPTH		BIT(8)

Can you share a dump and share these register reset values. Looking at the
layout, clearly its highly modified, but probably derived from VSI multi-codec,
but I'm thinking perhaps we'll learn more from that. Its always nice to justify
when adding more chips that are not strictly VSI designs (or maybe it is) to the
hantro dirver.

Nicolas