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Wed, 25 Sep 2024 01:43:06 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 25 Sep 2024 16:43:02 +0800 Received: from [172.21.84.99] (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 25 Sep 2024 16:43:01 +0800 Message-ID: <2821ef09-1b32-082d-69d1-e09a3a302447@mediatek.com> Date: Wed, 25 Sep 2024 16:42:59 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH 3/6] dt-bindings: display: mediatek: Fix clocks count constraint for new SoCs Content-Language: en-US To: Conor Dooley , AngeloGioacchino Del Regno , , CC: Chun-Kuang Hu , Philipp Zabel , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Yong Wu , Joerg Roedel , Will Deacon , Robin Murphy , Matthias Brugger , , , , , , , Alexandre Mergnat , Bear Wang , Pablo Sun , Macpaul Lin , Sen Chu , Chris-qj chen , "MediaTek Chromebook Upstream" , Chen-Yu Tsai References: <20240924103156.13119-1-macpaul.lin@mediatek.com> <20240924103156.13119-3-macpaul.lin@mediatek.com> <20240924-commute-collision-13ad39717d31@spud> From: Macpaul Lin In-Reply-To: <20240924-commute-collision-13ad39717d31@spud> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--11.313000-8.000000 X-TMASE-MatchedRID: QfHZjzml1E8OwH4pD14DsPHkpkyUphL9Wot5Z16+u76+UkTh6A/DwT8f ilvi6fr90mFsFMx0VZMOYgThO+DmXx2P280ZiGmRdARARTk4h59bAoaK+wS4jRSX1u8BLtZAFRE 6l+a4SRTiTN0gJqFURMzVnE1oQDqoavi5Lq9+Ha1s7yIvC2pwGtF9F+XaXgXeZ5yuplze9ptTyk OINBDQU+cQv6iXuAzrwVMUpfyfKUIAwWnlblYdAsxmTzofEWOOazzS+36ix9ybKItl61J/ycnjL TA/UDoAA6QGdvwfwZZWRVlrjsKO8N0H8LFZNFG7bkV4e2xSge75AqQykow+yePbmdtfeypRXtRV FLwJOwOr2TwTTCELzrAUyUg9ogFt X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--11.313000-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 972967CB0576905A235A1CA79982300AA079E3A940A8E8B2F8C6AB1ADA60F2932000:8 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240925_014315_136743_2F659BC5 X-CRM114-Status: GOOD ( 19.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 9/25/24 00:00, Conor Dooley wrote: > On Tue, Sep 24, 2024 at 01:42:01PM +0200, AngeloGioacchino Del Regno wrote: >> Il 24/09/24 12:31, Macpaul Lin ha scritto: >>> The display node in mt8195.dtsi was triggering a CHECK_DTBS error due >>> to an excessively long 'clocks' property: >>> display@14f06000: clocks: [[31, 14], [31, 43], [31, 44]] is too long >>> >>> To resolve this issue, add "maxItems: 3" to the 'clocks' property in >>> the DT schema. >>> >>> Fixes: 4ed545e7d100 ("dt-bindings: display: mediatek: disp: split each block to individual yaml") >>> Signed-off-by: Macpaul Lin >>> --- >>> .../devicetree/bindings/display/mediatek/mediatek,split.yaml | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml >>> index e4affc854f3d..42d2d483cc29 100644 >>> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml >>> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml >>> @@ -57,6 +57,7 @@ properties: >>> clocks: >>> items: >>> - description: SPLIT Clock >> >> That's at least confusing (granted that it works) - either add a description for >> each clock and then set `minItems: 1` (preferred), or remove this "SPLIT Clock" >> description and allow a maximum of 3 clocks. >> >> Removing the description can be done - IMO - because "SPLIT Clock" is, well, >> saying that the SPLIT block gets a SPLIT clock ... stating the obvious, anyway. > > Right, but what are the other two new clocks? Are they as obvious? > There's no clock-names here to give any more information as to what the > other clocks are supposed to be. > > Kinda unrelated, but I think that "SPLIT Clock" probably isn't what the > name of the clock in the IP block is anyway, sounds more like the name > for it on the provider end.. Thanks for the suggestions. I think Moudy could help on the new fixes for both DT schem and mt8195.dtsi. This patch could be separated from origin patch set. Thanks Macpaul Lin