public inbox for linux-arm-kernel@lists.infradead.org
 help / color / mirror / Atom feed
From: Anshuman Khandual <anshuman.khandual@arm.com>
To: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, suzuki.poulose@arm.com,
	yangyicong@huawei.com, Sami Mujawar <sami.mujawar@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Mike Leach <mike.leach@linaro.org>, Leo Yan <leo.yan@linaro.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	James Clark <james.clark@arm.com>,
	coresight@lists.linaro.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH V4 1/4] arm_pmu: acpi: Refactor arm_spe_acpi_register_device()
Date: Wed, 16 Aug 2023 12:00:36 +0530	[thread overview]
Message-ID: <294158a2-19cf-66f0-ea27-a0243f99f907@arm.com> (raw)
In-Reply-To: <20230811110035.GA6993@willie-the-truck>



On 8/11/23 16:30, Will Deacon wrote:
> On Fri, Aug 11, 2023 at 03:55:43PM +0530, Anshuman Khandual wrote:
>>
>>
>> On 8/11/23 15:42, Will Deacon wrote:
>>> On Fri, Aug 11, 2023 at 02:13:42PM +0530, Anshuman Khandual wrote:
>>>> On 8/8/23 13:52, Anshuman Khandual wrote:
>>>>> +	/*
>>>>> +	 * Sanity check all the GICC tables for the same interrupt
>>>>> +	 * number. For now, only support homogeneous ACPI machines.
>>>>> +	 */
>>>>> +	for_each_possible_cpu(cpu) {
>>>>> +		struct acpi_madt_generic_interrupt *gicc;
>>>>> +
>>>>> +		gicc = acpi_cpu_get_madt_gicc(cpu);
>>>>> +		if (gicc->header.length < len)
>>>>> +			return gsi ? -ENXIO : 0;
>>>>> +
>>>>> +		this_gsi = parse_gsi(gicc);
>>>>> +		if (!this_gsi)
>>>>> +			return gsi ? -ENXIO : 0;
>>>>> +
>>>>> +		this_hetid = find_acpi_cpu_topology_hetero_id(cpu);
>>>>> +		if (!gsi) {
>>>>> +			hetid = this_hetid;
>>>>> +			gsi = this_gsi;
>>>>> +		} else if (hetid != this_hetid || gsi != this_gsi) {
>>>>> +			pr_warn("ACPI: %s: must be homogeneous\n", pdev->name);
>>>>> +			return -ENXIO;
>>>>> +		}
>>>>> +	}
>>>>
>>>> As discussed on the previous version i.e V3 thread, will move the
>>>> 'this_gsi' check after parse_gsi(), inside if (!gsi) conditional
>>>> block. This will treat subsequent cpu parse_gsi()'s failure as a
>>>> mismatch thus triggering the pr_warn() message.
>>>>
>>>> diff --git a/drivers/perf/arm_pmu_acpi.c b/drivers/perf/arm_pmu_acpi.c
>>>> index 845683ca7c64..6eae772d6298 100644
>>>> --- a/drivers/perf/arm_pmu_acpi.c
>>>> +++ b/drivers/perf/arm_pmu_acpi.c
>>>> @@ -98,11 +98,11 @@ arm_acpi_register_pmu_device(struct platform_device *pdev, u8 len,
>>>>                         return gsi ? -ENXIO : 0;
>>>>  
>>>>                 this_gsi = parse_gsi(gicc);
>>>> -               if (!this_gsi)
>>>> -                       return gsi ? -ENXIO : 0;
>>>> -
>>>>                 this_hetid = find_acpi_cpu_topology_hetero_id(cpu);
>>>>                 if (!gsi) {
>>>> +                       if (!this_gsi)
>>>> +                               return 0;
>>>
>>> Why do you need this hunk?
>>
>> Otherwise '0' gsi on all cpus would just clear the above homogeneity
>> test, and end up in acpi_register_gsi() making it fail, but with the
>> following warning before returning with -ENXIO.
>>
>> irq = acpi_register_gsi(NULL, gsi, ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_HIGH);
>> if (irq < 0) {
>> 	pr_warn("ACPI: %s Unable to register interrupt: %d\n", pdev->name, gsi);
>> 	return -ENXIO;
>> }
> 
> Ah gotcha, thanks.
> 
>> Is this behaviour better than returning 0 after detecting '0' gsi in
>> the first cpu to avoid the above mentioned scenario ? Although 0 gsi
>> followed by non-zero ones will still end up warning about a mismatch.
> 
> Can we move the check _after_ the loop, then? That way, we still detect
> mismatches but we'll quietly return 0 if nobody has an interrupt.

Sure, will fold in the following changes instead. 

diff --git a/drivers/perf/arm_pmu_acpi.c b/drivers/perf/arm_pmu_acpi.c
index 845683ca7c64..d7beb035345a 100644
--- a/drivers/perf/arm_pmu_acpi.c
+++ b/drivers/perf/arm_pmu_acpi.c
@@ -98,9 +98,6 @@ arm_acpi_register_pmu_device(struct platform_device *pdev, u8 len,
                        return gsi ? -ENXIO : 0;
 
                this_gsi = parse_gsi(gicc);
-               if (!this_gsi)
-                       return gsi ? -ENXIO : 0;
-
                this_hetid = find_acpi_cpu_topology_hetero_id(cpu);
                if (!gsi) {
                        hetid = this_hetid;
@@ -111,6 +108,15 @@ arm_acpi_register_pmu_device(struct platform_device *pdev, u8 len,
                }
        }
 
+       /*
+        * This is a special case where no cpu on
+        * the system has the interrupt and which
+        * could not have been detected via above
+        * homogeneous mismatch test.
+        */
+       if (!this_gsi)
+               return 0;
+
        irq = acpi_register_gsi(NULL, gsi, ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_HIGH);
        if (irq < 0) {
                pr_warn("ACPI: %s Unable to register interrupt: %d\n", pdev->name, gsi);

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2023-08-16  6:31 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-08  8:22 [PATCH V4 0/4] coresight: trbe: Enable ACPI based devices Anshuman Khandual
2023-08-08  8:22 ` [PATCH V4 1/4] arm_pmu: acpi: Refactor arm_spe_acpi_register_device() Anshuman Khandual
2023-08-08  8:48   ` Suzuki K Poulose
2023-08-08 13:16     ` Will Deacon
2023-08-09 12:54       ` Suzuki K Poulose
2023-08-11  5:02         ` Anshuman Khandual
2023-08-11 10:19         ` Will Deacon
2023-08-16  6:56           ` Anshuman Khandual
2023-08-11  8:43   ` Anshuman Khandual
2023-08-11 10:12     ` Will Deacon
2023-08-11 10:25       ` Anshuman Khandual
2023-08-11 11:00         ` Will Deacon
2023-08-16  6:30           ` Anshuman Khandual [this message]
2023-08-08  8:22 ` [PATCH V4 2/4] arm_pmu: acpi: Add a representative platform device for TRBE Anshuman Khandual
2023-08-08  8:22 ` [PATCH V4 3/4] coresight: trbe: Add a representative coresight_platform_data " Anshuman Khandual
2023-08-08  8:22 ` [PATCH V4 4/4] coresight: trbe: Enable ACPI based TRBE devices Anshuman Khandual

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=294158a2-19cf-66f0-ea27-a0243f99f907@arm.com \
    --to=anshuman.khandual@arm.com \
    --cc=alexander.shishkin@linux.intel.com \
    --cc=catalin.marinas@arm.com \
    --cc=coresight@lists.linaro.org \
    --cc=james.clark@arm.com \
    --cc=leo.yan@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=mike.leach@linaro.org \
    --cc=sami.mujawar@arm.com \
    --cc=suzuki.poulose@arm.com \
    --cc=will@kernel.org \
    --cc=yangyicong@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox