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From: Shanker Donthineni <sdonthineni@nvidia.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, James Morse <james.morse@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] arm64: gic: increase the number of IRQ descriptors
Date: Wed, 4 Jan 2023 07:47:03 -0600	[thread overview]
Message-ID: <2a0116a8-fbd0-d866-ada0-ed50f0523f1d@nvidia.com> (raw)
In-Reply-To: <86sfgq7jb3.wl-maz@kernel.org>

Hi Marc,

On 1/4/23 03:14, Marc Zyngier wrote:
> External email: Use caution opening links or attachments
> 
> 
> On Wed, 04 Jan 2023 02:37:38 +0000,
> Shanker Donthineni <sdonthineni@nvidia.com> wrote:
>>
>> The default value of NR_IRQS is not sufficient to support GICv4.1
>> features and ~56K LPIs. This parameter would be too small for certain
>> server platforms where it has many IO devices and is capable of
>> direct injection of vSGI and vLPI features.
>>
>> Currently, maximum of 64 + 8192 (IRQ_BITMAP_BITS) IRQ descriptors
>> are allowed. The vCPU creation fails after reaching count ~400 with
>> kvm-arm.vgic_v4_enable=1.
>>
>> This patch increases NR_IRQS to 1^19 to cover 56K LPIs and 262144
>> vSGIs (16K vPEs x 16).
>>
>> Signed-off-by: Shanker Donthineni <sdonthineni@nvidia.com>
>> ---
>> Changes since v1:
>>   -create from v6.2-rc1 and edit commit text
>>
>>   arch/arm64/include/asm/irq.h | 4 ++++
>>   1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/irq.h b/arch/arm64/include/asm/irq.h
>> index fac08e18bcd5..3fffc0b8b704 100644
>> --- a/arch/arm64/include/asm/irq.h
>> +++ b/arch/arm64/include/asm/irq.h
>> @@ -4,6 +4,10 @@
>>
>>   #ifndef __ASSEMBLER__
>>
>> +#if defined(CONFIG_ARM_GIC_V3_ITS)
>> +#define  NR_IRQS  (1 << 19)
>> +#endif
>> +
>>   #include <asm-generic/irq.h>
>>
>>   struct pt_regs;
> 
> Sorry, but I don't think this is an acceptable change. This is a large
> overhead that affects *everyone*, and that will eventually be too
> small anyway with larger systems and larger interrupt spaces.
> 
> A better way to address this would be to move to a more dynamic
> allocation, converting the irqdesc rb-tree into an xarray, getting rid
> of the bitmaps (the allocation bitmap and the resend one), and track
> everything in the xarray.

The actual memory allocation for IRQ descriptors is still dynamic for ARM64.
This change increases static memory for variable 'allocated_irqs' by 64KB,
feel not a noticeable overhead.

If 64KB is too high, can we change NR_IRQS to 65536.

#ifdef CONFIG_SPARSE_IRQ
# define IRQ_BITMAP_BITS	(NR_IRQS + 8196)
#else
# define IRQ_BITMAP_BITS	NR_IRQS
#endif

static DECLARE_BITMAP(allocated_irqs, IRQ_BITMAP_BITS);

For ARM64, CONFIG_SPARSE_IR is set to y.

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  reply	other threads:[~2023-01-04 14:19 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-04  2:37 [PATCH v2] arm64: gic: increase the number of IRQ descriptors Shanker Donthineni
2023-01-04  9:14 ` Marc Zyngier
2023-01-04 13:47   ` Shanker Donthineni [this message]
2023-01-05 10:59     ` Marc Zyngier
2023-01-05 14:47       ` Shanker Donthineni
2023-01-09 16:41         ` Marc Zyngier
2023-01-09 16:57           ` Shanker Donthineni
2023-01-09 17:13           ` Shanker Donthineni
2023-01-10  8:20             ` Marc Zyngier
2023-01-10 14:22               ` Shanker Donthineni
2023-01-10 22:36                 ` Thomas Gleixner
2023-01-30  1:32                   ` Shanker Donthineni
2023-01-10 17:17               ` Shanker Donthineni

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