From: K Prateek Nayak <kprateek.nayak@amd.com>
To: Andrea Righi <arighi@nvidia.com>
Cc: Ingo Molnar <mingo@redhat.com>,
Peter Zijlstra <peterz@infradead.org>,
Juri Lelli <juri.lelli@redhat.com>,
Vincent Guittot <vincent.guittot@linaro.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Dietmar Eggemann <dietmar.eggemann@arm.com>,
Steven Rostedt <rostedt@goodmis.org>,
Ben Segall <bsegall@google.com>, Mel Gorman <mgorman@suse.de>,
Valentin Schneider <vschneid@redhat.com>,
Mark Rutland <mark.rutland@arm.com>,
Christian Loehle <christian.loehle@arm.com>,
Shrikanth Hegde <sshegde@linux.ibm.com>,
Phil Auld <pauld@redhat.com>, Breno Leitao <leitao@debian.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/2] sched/fair: Honor asymmetric SMT priority in idle selection
Date: Wed, 9 Sep 2026 12:02:12 +0530 [thread overview]
Message-ID: <2abe03fa-63a3-4196-8869-f2372a5a13e7@amd.com> (raw)
In-Reply-To: <aqB05WpYBcZfIZYQ@gpd4>
Hello Andrea,
On 9/9/2026 2:19 AM, Andrea Righi wrote:
>> nit. I personally feel this can be better integrated into the
>> sched_balance_find_dst_cpu(). Something like the following:
>>
>> (Only build tested)
>>
>> diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
>> index b8bd308c2d5b..1012dfb33f08 100644
>> --- a/kernel/sched/fair.c
>> +++ b/kernel/sched/fair.c
>> @@ -12353,6 +12353,17 @@ static inline void update_sg_wakeup_stats(struct sched_domain *sd,
>>
>> }
>>
>> + /*
>> + * If we are on a SD_SHARE_CPUCAPACITY | SD_ASYM_PACKING
>> + * domain, use the group_asym_packing classification to
>> + * decide placement based on rankings of idle siblings.
>> + */
>> + if (unlikely(sched_smt_asym_active() &&
>> + (sd->flags & SD_SHARE_CPUCAPACITY) &&
>> + (sd->flags & SD_ASYM_PACKING) &&
>> + sgs->idle_cpus))
>> + sgs->group_asym_packing = 1;
>
> Integrating the preference in the slow-path selection sounds appealing, but I
> don't think group_asym_packing can be used as a destination classificaiton here.
>
> The intended policy is to prefer PE0 over PE1 when both siblings of the selected
> SMT core are idle. And if PE0 is busy, PE1 should remain a valid destination. It
> shouldn't make a busy PE0 preferable to an idle PE1.
>
> IIUC group_type is ordered for busiest-group selection, group_asym_packing
> describes a source group whole load should be moved to a "more preferred" CPU.
> Marking an idle SMT group as group_asym_packing could make it rank worse than a
> fully busy group.
>
> Example: a fork on SMT2 can have the busy local PE0 classified as
> group_has_spare or group_fully_busy, while the idle PE1 is forced to
> group_asym_packing, sched_balance_find_dst_group() can then consider the busy
> local group the better destination and stack the new task on PE0. That may
> preserve one-thread mode for a short task, but it can also reduce throughput for
> sustained work.
Ah! Sorry for not realizing that earlier. Probably needs a special case in
"group_has_spare" instead of using the "group_asym_packing" which is always
considered busier than some other classifications but we can always work on
it later.
For now, I can confirm that this shows no performance impact on systems
I've tested this on (4th gen EPYC, and a 128C Ampere ARM server) and the
fast-paths are inlined correctly into select_task_rq_fair() so feel free to
include:
Reviewed-by: K Prateek Nayak <kprateek.nayak@amd.com>
Tested-by: K Prateek Nayak <kprateek.nayak@amd.com>
--
Thanks and Regards,
Prateek
next prev parent reply other threads:[~2026-09-09 6:32 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-08 8:23 [PATCH v4 0/2] sched: Enable preferred SMT siblings on NVIDIA Olympus Andrea Righi
2026-09-08 8:23 ` [PATCH 1/2] arm64: topology: Prefer PE0 on NVIDIA Olympus SMT cores Andrea Righi
2026-09-08 20:09 ` K Prateek Nayak
2026-09-08 20:57 ` Andrea Righi
2026-09-08 8:23 ` [PATCH 2/2] sched/fair: Honor asymmetric SMT priority in idle selection Andrea Righi
2026-09-08 19:40 ` K Prateek Nayak
2026-09-08 20:49 ` Andrea Righi
2026-09-09 6:32 ` K Prateek Nayak [this message]
2026-09-09 14:42 ` Vincent Guittot
2026-09-09 15:18 ` Andrea Righi
2026-09-09 15:42 ` Vincent Guittot
2026-09-09 16:22 ` Andrea Righi
2026-09-09 7:20 ` [PATCH v4 0/2] sched: Enable preferred SMT siblings on NVIDIA Olympus Dietmar Eggemann
2026-09-09 7:26 ` Andrea Righi
2026-09-09 12:39 ` Andrea Righi
2026-09-11 13:53 ` Dietmar Eggemann
2026-09-11 22:43 ` Andrea Righi
-- strict thread matches above, loose matches on Subject: below --
2026-09-09 6:26 [PATCH v5 " Andrea Righi
2026-09-09 6:26 ` [PATCH 2/2] sched/fair: Honor asymmetric SMT priority in idle selection Andrea Righi
2026-09-11 14:11 ` Dietmar Eggemann
2026-09-11 22:34 ` Andrea Righi
2026-09-07 16:30 [PATCH v3 0/2] sched: Enable preferred SMT siblings on NVIDIA Olympus Andrea Righi
2026-09-07 16:30 ` [PATCH 2/2] sched/fair: Honor asymmetric SMT priority in idle selection Andrea Righi
2026-09-04 9:18 [PATCH v2 0/2] sched: Enable preferred SMT siblings on NVIDIA Olympus Andrea Righi
2026-09-04 9:18 ` [PATCH 2/2] sched/fair: Honor asymmetric SMT priority in idle selection Andrea Righi
2026-09-07 3:57 ` K Prateek Nayak
2026-09-07 9:11 ` Andrea Righi
2026-09-07 9:40 ` K Prateek Nayak
2026-09-07 9:50 ` Andrea Righi
2026-09-07 16:48 ` Shrikanth Hegde
2026-09-08 5:37 ` Srikar Dronamraju
2026-09-08 6:12 ` Andrea Righi
2026-08-31 18:10 [PATCH 0/2] sched: Enable preferred SMT siblings on NVIDIA Olympus Andrea Righi
2026-08-31 18:10 ` [PATCH 2/2] sched/fair: Honor asymmetric SMT priority in idle selection Andrea Righi
2026-09-03 10:59 ` Dietmar Eggemann
2026-09-04 5:59 ` Andrea Righi
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