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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a83838d023dsm549401766b.64.2024.08.18.14.06.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 18 Aug 2024 14:06:17 -0700 (PDT) Message-ID: <2bc3b0fa-2cd1-e5d2-c324-ad466537d1b3@gmail.com> Date: Mon, 19 Aug 2024 00:06:15 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH v1 08/10] arm64: dts: exynos: Add initial support for exynos8895 SoC Content-Language: en-US To: Krzysztof Kozlowski , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Rob Herring Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org References: <20240807082843.352937-1-ivo.ivanov.ivanov1@gmail.com> <20240807082843.352937-9-ivo.ivanov.ivanov1@gmail.com> <5274b8a1-b81c-3979-ed6c-3572f6a6cfc2@gmail.com> <24ff07b6-a685-471f-8249-3e3450e2d3d3@kernel.org> From: Ivaylo Ivanov In-Reply-To: <24ff07b6-a685-471f-8249-3e3450e2d3d3@kernel.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240818_140620_366168_8BD58896 X-CRM114-Status: GOOD ( 23.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 8/9/24 08:48, Krzysztof Kozlowski wrote: > On 07/08/2024 13:20, Ivaylo Ivanov wrote: >> On 8/7/24 12:20, Krzysztof Kozlowski wrote: >>> On 07/08/2024 10:28, ivo.ivanov.ivanov1@gmail.com wrote: >>>> From: Ivaylo Ivanov >>>> >>>> Exynos 8895 SoC is an ARMv8 mobile SoC found in the Samsung Galaxy >>>> S8 (dreamlte), S8 Plus (dream2lte), Note 8 (greatlte) and the Meizu >>>> 15 Plus (m1891). Add minimal support for that SoC, including: >>>> >>>> - All 8 cores via PSCI >>>> - ChipID >>>> - Generic ARMV8 Timer >>>> - Enumarate all pinctrl nodes >>>> >>>> Further platform support will be added over time. >>>> >>>> Signed-off-by: Ivaylo Ivanov >>>> --- >>>> .../boot/dts/exynos/exynos8895-pinctrl.dtsi | 1378 +++++++++++++++++ >>>> arch/arm64/boot/dts/exynos/exynos8895.dtsi | 253 +++ >>>> 2 files changed, 1631 insertions(+) >>>> create mode 100644 arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi >>>> create mode 100644 arch/arm64/boot/dts/exynos/exynos8895.dtsi >>>> >>>> diff --git a/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi >>>> new file mode 100644 >>>> index 000000000..1dcb61e2e >>>> --- /dev/null >>>> +++ b/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi >>>> @@ -0,0 +1,1378 @@ >>>> +// SPDX-License-Identifier: BSD-3-Clause >>>> +/* >>>> + * Samsung's Exynos 8895 SoC pin-mux and pin-config device tree source >>>> + * >>>> + * Copyright (c) 2024, Ivaylo Ivanov >>>> + */ >>>> + >>>> +#include >>>> +#include "exynos-pinctrl.h" >>>> + >>>> +&pinctrl_alive { >>>> + gpa0: gpa0 { >>> I do not believe this was tested. See maintainer SoC profile for Samsung >>> Exynos. >>> >>> Limited review follows due to lack of testing. >>> >>> >>>> +}; >>>> diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi >>>> new file mode 100644 >>>> index 000000000..3ed381ee5 >>>> --- /dev/null >>>> +++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi >>>> @@ -0,0 +1,253 @@ >>>> +// SPDX-License-Identifier: BSD-3-Clause >>>> +/* >>>> + * Samsung's Exynos 8895 SoC device tree source >>>> + * >>>> + * Copyright (c) 2024, Ivaylo Ivanov >>>> + */ >>>> + >>>> +#include >>>> + >>>> +/ { >>>> + compatible = "samsung,exynos8895"; >>>> + #address-cells = <2>; >>>> + #size-cells = <1>; >>>> + >>>> + interrupt-parent = <&gic>; >>>> + >>>> + aliases { >>>> + pinctrl0 = &pinctrl_alive; >>>> + pinctrl1 = &pinctrl_abox; >>>> + pinctrl2 = &pinctrl_vts; >>>> + pinctrl3 = &pinctrl_fsys0; >>>> + pinctrl4 = &pinctrl_fsys1; >>>> + pinctrl5 = &pinctrl_busc; >>>> + pinctrl6 = &pinctrl_peric0; >>>> + pinctrl7 = &pinctrl_peric1; >>>> + }; >>>> + >>>> + arm-a53-pmu { >>> Are there two pmus? >> Hm. The Downstream kernel has them all under one node with compatible >> >> 'arm,armv8-pmuv3', same as with Exynos 7885. So it should have two PMUs, >> >> one for each cluster. >> >> >> Considering the second cluster consists of Samsung's custom Mongoose M2 >> >> cores, what would be the most adequate thing to do? Keep the first PMU as >> >> "arm,cortex-a53-pmu" and use the SW model "arm,armv8-pmuv3" for the >> >> second PMU? I doubt guessing if these mongoose cores are based on already >> >> existing cortex cores is a great idea. > I was just wondering why there is only one and called a53. I am not sure > what should be for the second, but rather not a software model. > > Best regards, > Krzysztof > Well, as far as I can tell there are 3 options: - use an already defined PMU model for another core (ex. A73) - submit another patch to add a custom mongoose-specific PMU model - omit the mongoose cores PMU entirely My guess is that omitting it entirely with a comment that mentions the issue will be good enough, at least for now. Is that OK for the v3? Best regards, Ivaylo